BD6563FV-LB Datasheet Small Signal IGBT/MOSFET Gate Driver Series Three-Channel Small Signal IGBT/MOSFET Gate Drivers BD6563FV-LB ●General Description BD6563FV-LB is 3-ch gate driver to drive gate of IGBT/MOSFET from 5V input signals. Output signals consist of each high side and low side drive signals in order to make ON/OFF timing control easy. 1 input signal generates 2 output signals which are high side output and low side output signal for 1 channel drive. High side output signal outputs "H" level and high impedance and low side output signal outputs "L" signal and high impedance. ●Key Specifications Output-side supply voltage(max.): 30V Input-side supply voltage: 3.0V to 5.5V Output peak current(≦1us): ±0.6A Input-Output delay time (at VDD=3.3V):380ns(Max.) Input-Output delay time (at VDD=5.0V):345ns(Max.) Operating temperature range: -25℃ to +125℃ ●Features Three-Channel Gate Drivers Separated Turn ON and Turn OFF Output ●Package SSOP-B16 W(Typ.) x D(Typ.) x H(Max.) 5.00mm x 6.40mm x 1.35mm ●Applications Low-side IGBT/MOSFET Gate Drive for DCDC Converter Low-side IGBT/MOSFET Gate Drive for Inverter SSOP-B16 ●Typical Application Circuit OUT_H1, OUT_H2, OUT_H3 IN1, IN2, IN3 BD6563FV-LB OUT_L1, OUT_L2, OUT L3 Figure 1. Typical Application Circuit ○Product structure:Silicon monolithic integrated circuit www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○This product is not designed protection against radioactive rays 1/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Pin Configuration (TOP VIEW) VCC 1 16 OUT_H1 VDD 2 15 OUT_L1 LGND 3 14 PGND IN1 4 13 OUT_H2 IN2 5 12 OUT_L2 IN3 6 11 PGND LGND 7 10 OUT_H3 VCC 8 9 OUT_L3 Figure 2. Pin configuration ●Pin Description Pin No. Pin Name Function 1 VCC Output-side power supply pin 2 VDD Input-side power supply pin 3 LGND Input-side ground pin 4 IN1 Control input 1 pin 5 IN2 Control input 2 pin 6 IN3 Control input 3 pin 7 LGND Input-side ground pin 8 VCC Output-side power supply pin 9 OUT_L3 Low-side output 3 pin 10 OUT_H3 High-side output 3 pin 11 PGND Output-side ground pin 12 OUT_L2 Low-side output 2 pin 13 OUT_H2 High-side output 2 pin 14 PGND Output-side ground pin 15 OUT_L1 Low-side output 1 pin 16 OUT_H1 High-side output 1 pin www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Block Diagram VDD IN1 VCC Level Shift Filter LGND OUT_H1 OUT_L1 PGND IN2 Filter IN3 Filter Level Shift OUT_H2 OUT_L2 Level Shift OUT_H3 OUT_L3 Figure 3. Block Diagram www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Absolute Maximum Ratings Parameter Symbol Limits Units Output-side supply voltage VCCMAX 30 V Input-side supply voltage VDDMAX 7 V INX *1 pin input voltage VINXMAX -0.3 to VDD+0.3 V OUT_HX / OUT_LX *1 pin output voltage VOUTHXMAX VOUTLXMAX -0.3 to VCC+0.3 V OUT_HX *1 pin output current (Peak 1us) IOUTHXMAX -0.6*2 A OUT_LX *1 pin output current (Peak 1us) IOUTLXMAX +0.6*2 A Pd 0.87*3 W Operating temperature range TOPR -25 to +125 ℃ Storage temperature range Tstg -55 to +150 ℃ Tjmax +150 ℃ Power dissipation Junction temperature *1 *2 *3 X=1,2,3 Should not exceed Pd and Tj=150C. Derate above Ta=25C at a rate of 7.0mW/C. Mounted on a glass epoxy of 70 mm 70 mm 1.6 mm. ●Recommended Operating Ratings Parameter Symbol Min. Max. Units Output-side supply voltage VCC 10 25 V Input-side supply voltage VDD 3.0 5.5 V INX *1 high level input voltage VDD VDD×0.7 - V INX *1 low level input voltage VDD - VDD×0.3 V *1 X=1,2,3 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Electrical Characteristics (Unless otherwise specified Ta=-25℃ to 125℃, V DD=3.0V to 5.5V, VCC=10V to 25V) Parameter Symbol Min. Typ. Max. Unit INX *1 pull-down resistance RINX 25 50 100 kΩ Output-side circuit current 1 ICC1 - 0.32 1 mA IN1=IN2=IN3=0V Output-side circuit current 2 ICC2 - 0.43 1 mA IN1=IN2=IN3=25kHz, Duty=50% Input-side circuit current 1 IDD1 - 0 10 uA IN1=IN2=IN3=0V Input-side circuit current 2 IDD2 - 25 100 uA IN1=IN2=IN3=25kHz, Duty=50% High level output voltage VOUTHX VCC-2.0 VCC-1.0 VCC-0.4 V IOUTHX=-100mA Low level output voltage VOUTLX 0.15 0.4 1.0 V IOUTLX=100mA Output delay time H 1 tPLHX1 170 250 330 ns V DD =5.0V Output delay time L 1 tPHLX1 185 265 345 ns V DD =5.0V Delay matching 1, OUT_HX and OUT_LX tPLHX1 – tPHLX1 *1 ⊿tPLHX1-PHLX1 -30 -15 0 ns V DD =5.0V Output delay time H 2 tPLHX2 170 250 330 ns V DD =3.3V Output delay time L 2 tPHLX2 220 300 380 ns V DD =3.3V ⊿tPLHX2-PHLX2 -80 -50 0 ns V DD =3.3V Delay matching, OUT_H1,OUT_H2,OUT_H3 tPLHX – tPLHY *1 ⊿tPLH -20 0 20 ns Delay matching, OUT_L1,OUT_L2,OUT_L3 1 tPHLX – tPHLY * ⊿tPHL -20 0 20 ns Delay matching 2, OUT_HX and OUT_LX 1 tPLHX2 – tPHLX2 * *1 Conditions X=1,2,3, Y=1,2,3 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB 100.0 100.0 85.0 85.0 Ta=-25℃ 70.0 RINX [kΩ] RINX [kΩ] ●Typical Performance Curves 55.0 70.0 VDD=5.5V 55.0 40.0 40.0 VDD=5.0V Ta=25℃ Ta=125℃ 25.0 3.0 3.5 4.0 25.0 4.5 VDD [V] 5.0 5.5 -40 1.0 1.0 0.8 0.8 Ta=125℃ I CC1 [mA] ICC1 [mA] -20 0 20 40 60 Ta [℃] 80 100 120 Figure 5. INX pull-down resistance Figure 4. INX pull-down resistance 0.6 VDD=3.0V 0.4 0.2 0.6 Vcc=25V 0.4 0.2 Ta=25℃ Vcc=15V Vcc=10V Ta=-25℃ 0.0 0.0 10 15 20 25 -25 VCC [V] 25 50 Ta [℃] 75 100 125 Figure 7. Output-side circuit current (at IN1=IN2=IN3=L) Figure 6. Output-side circuit current (at IN1=IN2=IN3=L) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 6/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB 1.0 1.0 0.9 0.9 0.8 0.8 Ta=125℃ 0.6 0.5 0.4 0.3 0.6 0.5 0.4 0.3 Ta=25℃ Ta=-25℃ 0.2 Vcc=25V 0.7 I CC2 [mA] I CC2 [mA] 0.7 0.2 Vcc=15V Vcc=10V 0.1 0.1 0.0 0.0 10 15 20 -25 25 0 25 50 Ta [℃] VCC [V] 9.0 9.0 7.0 7.0 5.0 Ta=125℃ Ta=25℃ 3.0 100 125 Figure 9. Output-side circuit current (at IN1=IN2=IN3=25kHz and Duty=50%) IDD1 [uA] I DD1 [uA] Figure 8. Output-side circuit current (at IN1=IN2=IN3=25kHz and Duty=50%) 75 5.0 VDD=5.5V VDD=5.0V 3.0 VDD=3.0V Ta=-25℃ 1.0 1.0 -1.0 -1.0 3.0 3.5 4.0 4.5 VDD [V] 5.0 5.5 -25 Figure 10. Input-side circuit current (at IN1=IN2=IN3=L) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 25 50 Ta [℃] 75 100 125 Figure 11. Input-side circuit current (at IN1=IN2=IN3=L) 7/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB 100.0 100.0 90.0 Ta=125℃ 80.0 80.0 60.0 IDD2 [uA] I DD2 [uA] 70.0 Ta=125℃ Ta=25℃ 40.0 60.0 50.0 VDD=5.0V VDD=5.5V 40.0 Ta=-25℃ 30.0 Ta=-40℃ Ta=25℃ 20.0 20.0 VDD=3.0V 10.0 0.0 0.0 3.0 3.5 4.0 4.5 VDD [V] 5.0 -25 5.5 0 25 75 100 125 Figure 13. Input-side circuit current (at IN1=IN2=IN3=25kHz and Duty=50%) Figure 12. Input-side circuit current (at IN1=IN2=IN3=25kHz and Duty=50%) VCC -0.40 VCC -0.40 Ta=-25℃ Vcc=25V -0.80 -0.80 Ta=25℃ VOUTHX [V] VOUTHX [V] 50 Ta [℃] -1.20 -1.20 Vcc=10V Vcc=15V Ta=125℃ -1.60 -1.60 -2.00 -2.00 10 15 20 25 -25 VCC [V] Figure 14. High level output voltage www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 25 50 Ta [℃] 75 100 125 Figure 15. High level output voltage 8/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet 0.90 0.90 0.75 0.75 Ta=125℃ VOUTLX [V] VOUTLX [V] BD6563FV-LB 0.60 0.45 Vcc=10V Vcc=15V Vcc=25V 0.60 0.45 Ta=25℃ 0.30 0.30 Ta=-25℃ 0.15 0.15 10 15 20 25 -25 0 25 VCC [V] Figure 16. Low level output voltage 50 Ta [℃] 75 100 125 Figure 17. Low level output voltage 330 330 310 310 Ta=125℃ 290 290 270 270 t PLHX [ns] tPLHX [ns] VDD=5.5V 250 250 230 230 210 210 VDD=5.0V Ta=-25℃ Ta=25℃ 190 190 170 170 3.0 3.5 4.0 4.5 VDD [V] 5.0 5.5 -25 Figure 18. Output delay time H www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 VDD=3.0V 0 25 50 Ta [℃] 75 100 125 Figure 19. Output delay time H 9/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB 380 380 365 365 Ta=125℃ 350 350 335 335 Ta=125℃ 320 305 t PHLX [ns] tPHLX [ns] 305 VDD=3.0V 320 Ta=25℃ 290 275 290 275 260 260 Ta=25℃ 245 245 Ta=-40℃ Ta=-25℃ 230 230 215 215 200 200 VDD=5.5V 185 185 3.0 3.5 4.0 4.5 VDD [V] 5.0 -25 5.5 0 Figure 20. Output delay time L 0 0 -10 -10 -20 -20 -30 -40 Ta=125℃ Ta=25℃ Ta=-25℃ -50 25 50 Ta [℃] 75 100 125 Figure 21. Output delay time L ⊿tPLHX - t PHLX [ns] ⊿tPLHX - t PHLX [ns] VDD=5.0V -60 VDD=5.5V -30 VDD=5.0V -40 -50 -60 VDD=3.0V -70 -70 -80 -80 3.0 3.5 4.0 4.5 VDD [V] 5.0 5.5 -25 25 50 Ta [℃] 75 100 125 Figure 23. Delay matching, OUT_HX and OUT_LX Figure 22. Delay matching, OUT_HX and OUT_LX www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 10/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB 20 20 15 15 10 10 5 5 VDD=5.5V VDD=5.0V ⊿tPLH [ns] ⊿tPLH [ns] VDD=3.0V 0 -5 -5 Ta=125℃ Ta= 25℃ Ta=-25℃ -10 0 -10 -15 -15 -20 -20 3.0 3.5 4.0 4.5 VDD [V] 5.0 5.5 -25 Figure 24. Delay matching, OUT_H1, OUT_H2, OUT_H3 0 25 50 Ta [℃] 75 100 125 Figure 25. Delay matching, OUT_H1, OUT_H2, OUT_H3 20 20 15 15 10 10 5 5 VDD=5.5V VDD=5.0V ⊿tPHL [ns] ⊿tPHL [ns] VDD=3.0V 0 -5 -5 Ta=125℃ Ta= 25℃ Ta=-25℃ -10 0 -10 -15 -15 -20 -20 3.0 3.5 4.0 4.5 VDD [V] 5.0 5.5 -25 Figure 26. Delay matching, OUT_L1, OUT_L2, OUT_L3 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 11/16 0 25 50 Ta [℃] 75 100 125 Figure 27. Delay matching, OUT_L1, OUT_L2, OUT_L3 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Timing Chart VDD VDD/2 INX VDD/2 LGND tPLHX VCC VCC/2 OUT_HX tPHLX (High-Z)*1 VCC/2 OUT_LX *1 (High-Z)*1 PGND Under condition that OUT_HX and OUT_LX are shorted. Figure 28. Timing Chart ●Power Dissipation 1 Power Dissipation : Pd (W) 0.87W 0.75 0.5 0.25 0 0 25 50 75 100 125 150 Ambient Temperature: Ta(℃) Figure 29. SSOP-B16 Derating Curve Please confirm that the IC’s chip temperature Tj is not over 150℃, while considering the IC’s power consumption (W), package power (Pd) and ambient temperature (Ta). When Tj=150℃ is exceeded the functions as a semiconductor do not operate and some problems (ex. Abnormal operation of various parasitic elements and increasing of leak current) occur. Constant use under these circumstances leads to deterioration and eventually IC may destruct. Tjmax=150℃ must be strictly obeyed under all circumstances. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●I/O equivalence circuits Pin No. Name I/O equivalence circuits Function VDD IN1, IN2, IN3 4, 5, 6 IN1, IN2, IN3 Control input X pin LGND VCC OUT_L1, OUT_L2, OUT_L3 9, 12, 15 OUT_L1, OUT_L2, OUT_L3 Low-side output X pin PGND VCC OUT_H1, OUT_H2, OUT_H3 10, 13, 16 OUT_H1, OUT_H2, OUT_H3 High-side output X pin PGND www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 13/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Operational Notes (1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. (3) Power supply Lines Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. (4) GND Potential The potential of LGND pin and PGND pin must be minimum potential in all operating conditions. (5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. (6) Inter-pin shorts and mounting errors When attaching to a printed circuit board, pay close attention to the direction of the IC and displacement. Improper attachment may lead to destruction of the IC. There is also possibility of destruction from short circuits which can be caused by foreign matter entering between outputs or an output and the power supply or GND. (7) Operation in a strong electric field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. (8) Inspection of the application board During inspection of the application board, if a capacitor is connected to a pin with low impedance there is a possibility that it could cause stress to the IC, therefore an electrical discharge should be performed after each process. Also, as a measure again electrostatic discharge, it should be earthed during the assembly process and special care should be taken during transport or storage. Furthermore, when connecting to the jig during the inspection process, the power supply should first be turned off and then removed before the inspection. (9) Input terminal of IC Between each element there is a P+ isolation for element partition and a P substrate. This P layer and each element’s N layer make up the P-N junction, and various parasitic elements are made up. For example, when the resistance and transistor are connected to the terminal as shown in figure 65, ○When GND>(Terminal A) at the resistance and GND>(Terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode. ○Also, when GND>(Terminal B) at the transistor (NPN), The parasitic NPN transistor operates with the N layers of other elements close to the aforementioned parasitic diode. Because of the IC’s structure, the creation of parasitic elements is inevitable from the electrical potential relationship. The operation of parasitic elements causes interference in circuit operation, and can lead to malfunction and destruction. Therefore, be careful not to use it in a way which causes the parasitic elements to operate, such as by applying voltage that is lower than the GND (P substrate) to the input terminal. Transistor (NPN) Resistor Terminal A Terminal B C Terminal B B Terminal A N P+ N P+ P E N N P + Parasitic element P substrate Parasitic element N P+ P B N C E P substrate GND GND Parasitic element GND GND Parasitic element Other adjacent elements Figure 30. Pattern Diagram of Parasitic Element (10) Ground Wiring Patterns When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern potential of any external components, either. The Japanese version of this document is formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document formal version takes priority www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Ordering Information B D 6 5 6 F 3 V - LBE2 Package FV : SSOP-B16 Part Number Packaging and forming specification E2: Embossed tape and reel ●Physical Dimension Tape and Reel Information SSOP-B16 <Tape and Reel information> 5.0±0.2 9 1 Tape Embossed carrier tape Quantity 2500pcs Direction of feed 0.3Min. 4.4±0.2 6.4±0.3 16 E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 8 0.10 1.15±0.1 0.15±0.1 0.1 0.65 1pin 0.22±0.1 (Unit : mm) Reel Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. ●Marking Diagram SSOP-B16 (TOP VIEW) Product Name. D6563 LOT No. 1PIN MARK www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 15/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet BD6563FV-LB ●Revision History Date Revision Changes 05.JUL.2012 001 New Release 13.JUL.2012 002 Page 1 : Change Key Specifications ‘Output peak current’ Page 4 : Change Absolute Maximum Ratings ‘OUT_HX pin output current’ Page 4 : Change Absolute Maximum Ratings ‘OUT_LX pin output current’ www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 16/16 TSZ02201-0717ABZ00030-1-2 13.JUL.2012 Rev.002 Datasheet Notice ●General Precaution 1) Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM’s Products against warning, caution or note contained in this document. 2) All information contained in this document is current as of the issuing date and subject to change without any prior notice. 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The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3) Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4) The Products are not subject to radiation-proof design. 5) Please verify and confirm characteristics of the final or mounted products in using the Products. 6) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8) Confirm that operation temperature is within the specified range described in the product specification. 9) ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Notice - Rev.003 © 2012 ROHM Co., Ltd. All rights reserved. Datasheet ●Precaution for Mounting / Circuit board design 1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification ●Precautions Regarding Application Examples and External Circuits 1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2) You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. 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It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3) Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4) Use Products within the specified time after opening a humidity barrier bag. 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ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or concerning such information. 2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 5) The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice - Rev.003 © 2012 ROHM Co., Ltd. All rights reserved.