PJESD5V0QL4G, L5G LOW CAPACITANCE TVS/ZENER ARRAYS FOR ESD PROTECTION These 4 and 5 TVS/Zener Arrays have been designed to protect sensitive equipment against ESD in CMOS circuitry operating at 5V. These TVS arrays offers an integrated solution to protect 4 or 5 data lines in applications, where the board space is a premium, in a Quad Flat no-Lead package that only occupies an area of 1.8 sq mm. SPECIFICATION FEATURES DRAFT IEC61000-4-2 ESD 20kV Air, 15kV Contact Compliance Low Leakage Current, Maximum of 1µA at rated voltage 1 Maximum Capacitance of 15pF per device at 0Vdc 1MHz Peak Power Dissipation of 20W under 8/20µs Waveform PJESD5V0QL4G Quad Flat No Lead package QFN (1.2x1.5 sq mm, Height: 0.75mm) Lead Free Package 100% Tin Plating, Matte finish 1 GND 2 3 APPLICATIONS 6 Personal Digital Assistant (PDA) Digital Cameras 5 NC 4 PJESD5V0QL5G Portable Instrumentation Mobile Phones and Accessories MP3 Players MAXIMUM RATINGS (Per Device) Symbol Value Units Peak Pulse Power (8/20µs Waveform) P PP 20 W Peak Pulse Current (8/20µs Waveform) I PPM TBD A ESD Voltage (HBM Per MIL STD883C - Method 3015-6) V ESD 20 kV Operating Temperature Range TJ -55 to +150 °C Storage Temperature Range Tstg -55 to +150 °C Typical Max Units 5 V Rating ELECTRICAL CHARACTERISTICS (Per Device) Tj = 25°C Parameter Reverse Stand-Off Voltage Conditions Symbol V WRM Reverse Breakdown Voltage VBR I BR = 1mA Reverse Leakage Current IR VR = 5V Clamping Voltage (8/20µs) Vc I pp = TBD Off State Junction Capacitance Cj 0 Vdc Bias f = 1MHz betweeen I/O lines and 7/18/2006 Min Page 1 6 V 1 µA TBD TBD V TBD 15 pF www.panjit.com PJESD5V0QL4G, L5G TYPICAL CHARACTERISTIC CURVES (Per Device) Tj = 25°C Clamping Voltage vs 8/20µs Ipp Pulse Waveform 110 5 100 90 Percent of Ipp 80 TBD 3 2 50% of Ipp @ 20µs 70 60 50 40 30 Rise time 10-90% - 8µs 20 10 1 0 8 8.2 8.4 8.6 8.8 9 Clamping Voltage, V 0 5 10 15 time, µsec 20 25 30 Typical Capacitance vs. Bias Voltage @1MHz 35 30 Capacitance, pF DRAFT Ipp, Amps 4 25 20 TBD 15 10 5 0 0 7/18/2006 1 2 3 Bias Voltage, Vdc 4 5 Page 2 www.panjit.com PJESD5V0QL4G, L5G PACKAGE DIMENSIONS AND SUGGESTED PAD LAYOUT 0.30±0.05 mm 1.5±0.05 mm DRAFT 0.6±0.05 mm 1.2±0.05 mm 0.20±0.05 mm 0.35±0.05 mm 0.5 mm 22.04 mm 0.75±0.025 mm 0.2±0.025 mm 12.0 12.0 18.0 25.0 23.0 19.7 19.7 Suggested Pad Layout (in mils) 7/18/2006 53.0 49.0 48.0 Alternate Pad Layout SOT666 (in mils) Page 3 www.panjit.com