WEDC WED3DG644V100D1I-S

White Electronic Designs
WED3DG644V-D1
32MB – 4Mx64 SDRAM, UNBUFFERED
FEATURES
DESCRIPTION
„
PC100 and PC133 compatible
„
Burst Mode Operation
„
Auto and Self Refresh capability
„
LVTTL compatible inputs and outputs
„
Serial Presence Detect with EEPROM
The WED3DG644V is a 4Mx64 synchronous DRAM
module which consists of four 4Mx16 SDRAM components
in TSOP II package, and one 2Kb EEPROM in an 8
pin TSOP package for Serial Presence Detect which
are mounted on a 144 pin SO-DIMM multilayer FR4
Substrate.
„
Fully synchronous: All signals are registered on the
positive edge of the system clock
* This product is subject to change without notice.
„
Programmable Burst Lengths: 1, 2, 4, 8 or Full
Page
„
3.3V ± 0.3V Power Supply
„
NOTE: Consult factory for availability of:
• RoHS compliant products
• Vendor source control options
• Industrial temperature option
144 Pin SO-DIMM JEDEC
• D1: 27.94 (1.10”)
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
Pin Front Pin Back Pin Front Pin Back
1
VSS
2
VSS
51 DQ14 52 DQ46
3
DQ0
4 DQ32 53 DQ15 54 DQ47
56 VSSv
5
DQ1
6 DQ33 55
VSS
7
DQ2
8 DQ34 57
NC
58
NC
9
DQ3 10 DQ35 59
NC
60
NC
12
VCC
11
VCC
13 DQ4 14 DQ36
VOLTAGE KEY
15 DQ5 16 DQ37
17 DQ6 18 DQ38 61 CLK0 62 CKE0
19 DQ7 20 DQ39 63
VCC
64
VCC
21
VSS
22
VSS
65 RAS# 66 CAS#
23 DQM0 24 DQM4 67 WE# 68 *CKE1
25 DQM1 26 DQM5 69 CS0# 70 *A12
27
VCC
28
VCC
71 *CS1# 72 *A13
29
A0
30
A3
73 DNU 74 *CK1
31
A1
32
A4
75
VSS
76
VSS
33
A2
34
A5
77
NC
78
NC
36
VSS
79
NC
80
NC
35
VSS
37 DQ8 38 DQ40 81
VCC
82
VCC
39 DQ9 40 DQ41 83 DQ16 84 DQ48
41 DQ10 42 DQ42 85 DQ17 86 DQ49
43 DQ11 44 DQ43 87 DQ18 88 DQ50
46
VCC
89 DQ19 90 DQ51
45
VCC
47 DQ12 48 DQ44 91
VSS
92
VSS
49 DQ13 50 DQ45 93 DQ20 94 DQ52
June 2006
Rev. 3
Pin
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
Back
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10/AP
VCC
DQM2
DQM3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
**SDA
VCC
1
Pin Back
96 DQ53
98 DQ54
100 DQ55
102 VCC
104
A7
106 BA0
108 VSS
110 BA1
112 A11
114 VCC
116 DQM6
118 DQM7
120 VSS
122 DQ56
124 DQ57
126 DQ58
128 DQ59
130 VCC
132 DQ60
134 DQ61
136 DQ62
138 DQ63
140 VSS
142 **SCL
144 VCC
PIN NAMES
A0 – A11
BA0-1
DQ0-63
CLK0
CKE0
CS0#
RAS#
CAS#
WE#
DQM0-7
VCC
VSS
*VREF
SDA
SCL
DNU
NC
Address input (Multiplexed)
Select Bank
Data Input/Output
Clock input
Clock Enable input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Power supply for reference
Serial data I/O
Serial clock
Do not use
No Connect
* These pins are not used in this module.
** These pins should be NC in the system
which does not support SPD.
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
FUNCTIONAL BLOCK DIAGRAM
CS0#
DQM0
DQM4
LDQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQM1
CS#
LDQM
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
UDQM
DQM5
UDQM
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQM2
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQM6
LDQM
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQM3
CS#
LDQM
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQn
10 Ω
UDQM
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
A0-A11
BA0
RAS#
CAS#
WE#
CKE0
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SERIAL PD
SCL
47Ω
WP
SA0
SDA
SA1
10Ω
Every DQpin of SDRAM
SDRAM
SDRAM
10Ω
TWO 0.1 uF CAPACITORS
To all SDRAMS
PER EACH SDRAM
SA2
SDRAM
CLK0
VCC
CS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM7
UDQM
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
VCC
CS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CLK1
SDRAM
10 Ω
10pF
Notes: 1. All resistor values are 10 ohms unless otherwise specified.
2. D1 option does not have series resistors.
June 2006
Rev. 3
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Units
Voltage on any pin relative to VSS
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VCC supply relative to VSS
VCC, VCCQ
-1.0 ~ 4.6
V
TSTG
-55 ~ +150
°C
Power Dissipation
PD
4
W
Short Circuit Current
IOS
50
mA
Storage Temperature
Note: Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Voltage Referenced to: VSS = 0V, TA = 0°C to +70°C
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage
VCC
3.0
3.3
3.6
V
Input High Voltage
VIH
2.0
3.0
VCCQ+0.3
V
Note
1
Input Low Voltage
VIL
-0.3
—
0.8
V
2
Output High Voltage
VOH
2.4
—
—
V
IOH= -2mA
Output Low Voltage
VOL
—
—
0.4
V
IOL= -2mA
Input Leakage Current
ILI
-10
—
10
µA
3
Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns.
2. VIL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns.
3. Any input 0V ≤ VIN ≤ VCCQ
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
CAPACITANCE
TA = 25°C, f = 1MHz, VCC = 3.3V, VREF = 1.4V ± 200mV
Parameter
Symbol
Max
Unit
CIN1
25
pF
Input Capacitance (RAS#,CAS#,WE#)
CIN2
25
pF
Input Capacitance (CKE0)
CIN3
25
pF
Input Capacitance (CLK0)
CIN4
19
pF
Input Capacitance (CS0#)
CIN5
25
pF
Input Capacitance (DQM0-DQM7)
CIN6
8
pF
Input Capacitance (BA0-BA1)
CIN7
25
pF
Data Input/Output Capacitance (DQ0-DQ63)
COUT
10
pF
Input Capacitance (A0-A12)
June 2006
Rev. 3
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
OPERATING CURRENT CHARACTERISTICS
(VCC = 3.3V, TA = 0°C to +70°C)
Version
Parameter
Symbol
Conditions
133/100
Units
Note
300
mA
1
CKE ≤ VIL(max), tCC = 10ns
4
mA
CKE & CLK ≤ VIL(max), tCC = ∞
4
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tcc =10ns
Input signals are charged one time during 20
48
ICC2NS
CKE ≥ VIH(min), CLK ≥VIL(max), tCC = ∞
Input signals are stable
24
ICC3P
CKE ≥ VIL(max), tCC = 10ns
8
ICC3PS
CKE & CLK ≤ VIL(max), tCC = ∞
8
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 10ns
Input signals are changed one time during 20ns
80
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tcc = ∞
Input signals are stable
ICC4
Operating Current
(One bank active)
ICC1
Burst Length = 1
tRC ≤ tRC(min)
IOL = 0mA
Precharge Standby Current
in Power Down Mode
ICC2P
ICC2PS
Precharge Standby Current
in Non-Power Down Mode
Active Standby Current in
Power-Down Mode
Active Standby Current in
Non-Power Down Mode
Operating Current (Burst mode)
Refresh Current
ICC5
Self Refresh Current
ICC6
mA
mA
mA
40
mA
Io = mA
Page burst
4 Banks activated
tCCD = 2CLK
460
mA
1
tRC ≥ tRC(min)
360
mA
2
4
mA
CKE ≤ 0.2V
Notes:
1.
Measured with outputs open.
2.
Refresh period is 64ms.
June 2006
Rev. 3
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
AC OPERATING TEST CONDITIONS
VCC = 3.3V ± 0.3V, 0 ≤ TA ≤ 70°C
Parameter
Value
Unit
AC input levels (VIH/VIL)
2.4/0.4
V
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
1.4
V
tR/tF = 1/1
ns
1.4
V
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Parameter
Symbol
Version
7.5, 10
Unit
Note
Row active to row active delay
tRRD (min)
15
ns
1
RAS# to CAS# delay
tRCD (min)
20
ns
1
Row precharge time
Row active time
tRP (min)
20
ns
1
tRAS (min)
45
ns
1
tRAS (max)
100
us
Row cycle time
tRC (min)
65
ns
1
2
Last data in to row precharge
tRDL (min)
2
CLK
Last data in to Active delay
tDAL (min)
2 CLK + tRP
—
Last data in to new col. address delay
tCDL (min)
1
CLK
2
Last data in to burst stop
tBDL (min)
1
CLK
2
1
CLK
3
ea
4
Col. address to col. address delay
Number of valid output data
tCCD (min)
CAS latency=3
2
CAS latency=2
1
Notes :
1.
The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next higher integer.
2.
Minimum delay is required to complete write.
3.
All parts allow every cycle column address change.
4.
In case of row precharge interrupt, auto precharge and read burst stop.
June 2006
Rev. 3
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
ORDERING INFORMATION FOR D1
Part Number
Clock Speed
CAS Latency
Height*
WED3DG644V10D1x-xx
100MHz
CL=2
27.94 (1.100”)
WED3DG644V7D1x-xx
133MHz
CL=2
27.94 (1.100”)
WED3DG644V75D1x-xx
133MHz
CL=3
27.94 (1.100”)
NOTES:
• Consult Factory for availability of RoHS products. (G = RoHS Compliant)
• Vendor specific part numbers are used to provide memory components source control. The place holder for this is shown as lower case “-x” in the part numbers above and is
to be replaced with the respective vendors code. Consult factory for qualified sourcing options. (M = Micron, S = Samsung & consult factory for others)
• Consult factory for availability of industrial temperature (-40°C to 85°C) option
PACKAGE DIMENSIONS FOR D1
67.74 (2.667) MAX
3.81
(0.150)
TYP
2.01 (0.079) MIN
19.99
(0.787)
WEDC
3.99
(0.157)
23.19
(0.913)
28.24
(1.112)
27.94
(1.100)
MAX
3.99
(0.157)
MIN
3.20
(0.126)
MIN
32.79 (1.291)
4.60 (0.181)
0.99 ± 0.10
(0.039 ± 0.004)
1.50 (0.059)
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES).
June 2006
Rev. 3
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
PART NUMBERING GUIDE
WED 3 D G 64 4 V xxx D1 x -x G
WEDC
MEMORY (SDRAM)
SDRAM
GOLD
DEPTH x64
DENSITY
3.3 Volts
CLOCK SPEED (MHz)
PACKAGE D1 = 144 PIN SO-DIMM
INDUSTRIAL TEMP OPTION
(For commercial leave "blank"
for industrial add "I")
COMPONENT VENDOR NAME
(M = Micron)
(S = Samsung)
G = RoHS COMPLIANT
(For non-compliant "blank"
for RoHS add “G”)
June 2006
Rev. 3
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WED3DG644V-D1
Document Title
32MB – 4Mx64 SDRAM, UNBUFFERED
DRAM DIE OPTIONS:
• SAMSUNG: K-Die
• MICRON: Y14W:G
Revision History
Rev #
History
Release Date
Status
Rev A
Created
11-15-01
Advanced
Rev 0
Changed from Advanced to Final
9-6-02
Final
Rev 1
Updated CAP and IDD specs
6-04
Final
Rev 2
2.1 Added RoHS and lead-free notes
1-06
Final
6-06
Final
2.2 Added vendor source and industrial tem notes
2.3 Added part number matrix
Rev 3
3.1 Updated part number guide
3.2 Updated “ordering information” part number
3.3 Added DRAM die options
June 2006
Rev. 3
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com