INFINEON IPD50N06S4-09

IPD50N06S4-09
OptiMOS®-T2 Power-Transistor
Product Summary
V DS
60
V
R DS(on),max
9.0
mΩ
ID
50
A
Features
PG-TO252-3-11
• N-channel - Enhancement mode
• AEC qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
Type
Package
Marking
IPD50N06S4-09
PG-TO252-3-11
4N0609
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current
ID
Conditions
Value
T C=25°C, V GS=10V1)
50
T C=100°C, V GS=10V2)
47
Unit
A
Pulsed drain current2)
I D,pulse
T C=25°C
200
Avalanche energy, single pulse2)
E AS
I D=25A
87
mJ
Avalanche current, single pulse
I AS
-
50
A
Gate source voltage
V GS
-
±20
V
Power dissipation
P tot
T C=25°C
71
W
Operating and storage temperature
T j, T stg
-
-55 ... +175
°C
IEC climatic category; DIN IEC 68-1
-
-
55/175/56
−
Rev. 1.2
page 1
2009-07-01
IPD50N06S4-09
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics2)
Thermal resistance, junction - case
R thJC
-
-
-
2.1
SMD version, device on PCB
R thJA
minimal footprint
-
-
62
6 cm2 cooling area3)
-
-
40
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0V, I D= 1mA
60
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=34µA
2.0
3.0
4.0
Zero gate voltage drain current
I DSS
V DS=60V, V GS=0V,
T j=25°C
-
0.01
1
-
5
100
V DS=60V, V GS=0V,
T j=125°C2)
V
µA
Gate-source leakage current
I GSS
V GS=20V, V DS=0V
-
-
100
nA
Drain-source on-state resistance
R DS(on)
V GS=10V, I D=50A
-
7.1
9.0
mΩ
Rev. 1.2
page 2
2009-07-01
IPD50N06S4-09
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
2911
3785
-
715
930
Dynamic characteristics2)
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
30
60
Turn-on delay time
t d(on)
-
15
-
Rise time
tr
-
40
-
Turn-off delay time
t d(off)
-
20
-
Fall time
tf
-
5
-
Gate to source charge
Q gs
-
17
22
Gate to drain charge
Q gd
-
4
8
Gate charge total
Qg
-
36
47
Gate plateau voltage
V plateau
-
5.6
-
V
-
-
50
A
-
-
200
0.6
0.95
1.3
V
-
45
-
ns
-
40
-
nC
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=30V, V GS=10V,
I D=50A, R G=3.5Ω
pF
ns
Gate Charge Characteristics2)
V DD=48V, I D=50A,
V GS=0 to 10V
nC
Reverse Diode
Diode continous forward current2)
IS
Diode pulse current2)
I S,pulse
Diode forward voltage
V SD
V GS=0V, I F=50A,
T j=25°C
Reverse recovery time2)
t rr
V R=30V, I F=I S,
di F/dt =100A/µs
Reverse recovery charge2)
Q rr
T C=25°C
1)
Current is limited by bondwire; with an R thJC = 2.1K/W the chip is able to carry 67A at 25°C.
2)
Defined by design. Not subject to production test.
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.2
page 3
2009-07-01
IPD50N06S4-09
1 Power dissipation
2 Drain current
P tot = f(T C); V GS ≥ 6 V
I D = f(T C); V GS ≥ 6 V
80
60
70
50
60
40
I D [A]
P tot [W]
50
40
30
30
20
20
10
10
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D = f(V DS); T C = 25 °C; D = 0
Z thJC = f(t p)
parameter: t p
parameter: D =t p/T
1000
101
0.5
1 µs
100
100
10 µs
Z thJC [K/W]
0.1
I D [A]
100 µs
1 ms
0.05
10-1
0.01
10
10-2
10-3
1
0.1
1
10
100
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 1.2
single pulse
page 4
2009-07-01
IPD50N06S4-09
5 Typ. output characteristics
6 Typ. drain-source on-state resistance
I D = f(V DS); T j = 25 °C
R DS(on) = f(I D); T j = 25 °C
parameter: V GS
parameter: V GS
200
20
8V
10 V
5.5 V
7.5 V
6.5 V
6V
7.5 V
7V
18
160
16
7V
R DS(on) [mΩ]
I D [A]
120
6.5 V
80
14
12
6V
10
40
5.5 V
8
10 V
0
6
0
1
2
3
4
0
40
80
V DS [V]
120
160
200
I D [A]
7 Typ. transfer characteristics
8 Typ. drain-source on-state resistance
I D = f(V GS); V DS = 6V
R DS(on) = f(T j); I D = 50 A; V GS = 10 V
parameter: T j
13
200
-55 °C
25 °C
12
160
11
10
175 °C
I D [A]
R DS(on) [mΩ]
120
80
9
8
7
6
40
5
0
3
4
5
6
7
8
V GS [V]
Rev. 1.2
4
-60
-20
20
60
100
140
180
T j [°C]
page 5
2009-07-01
IPD50N06S4-09
9 Typ. gate threshold voltage
10 Typ. capacitances
V GS(th) = f(T j); V GS = V DS
C = f(V DS); V GS = 0 V; f = 1 MHz
parameter: I D
104
4
Ciss
3.5
C [pF]
V GS(th) [V]
350 µA
3
103
Coss
35 µA
2.5
102
2
Crss
101
1.5
-60
-20
20
60
100
140
0
180
5
10
15
20
25
30
V DS [V]
T j [°C]
11 Typical forward diode characteristicis
12 Avalanche characteristics
IF = f(VSD)
I A S= f(t AV)
parameter: T j
parameter: T j(start)
100
103
25 °C
100 °C
2
10
150 °C
I F [A]
I AV [A]
10
175 °C
25 °C
1
10
175 °C
25 °C
0.6
0.8
1
100
0.1
0
0.2
0.4
1
1.2
1.4
V SD [V]
Rev. 1.2
0.1
1
10
100
1000
t AV [µs]
page 6
2009-07-01
IPD50N06S4-09
13 Avalanche energy
14 Drain-source breakdown voltage
E AS = f(T j)
V BR(DSS) = f(T j); I D = 1 mA
parameter: I D
100
66
80
64
25 A
V BR(DSS) [V]
E AS [mJ]
60
40
62
60
58
20
56
0
25
75
125
-55
175
-15
T j [°C]
25
65
105
145
T j [°C]
15 Typ. gate charge
16 Gate charge waveforms
V GS = f(Q gate); I D = 50 A pulsed
parameter: V DD
10
V GS
12 V
9
48 V
Qg
8
7
V GS [V]
6
5
V g s(th)
4
3
2
Q g (th)
Q sw
1
Q gs
0
0
5
10
15
20
25
30
35
Q gate
Q gd
40
Q gate [nC]
Rev. 1.2
page 7
2009-07-01
IPD50N06S4-09
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2009
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.2
page 8
2009-07-01
IPD50N06S4-09
Revision History
Version
Changes
Date
Revision 1.1
Update of RthJC and related
parameters from 1.7K/W to
22.08.2008 2.1K/W
Revision 1.2
01.07.2009 Update of SOA diagram
Rev. 1.2
page 9
2009-07-01