ONSEMI MSB92T1G

MSB92T1G
PNP Silicon General
Purpose High Voltage
Transistor
This PNP Silicon Planar Transistor is designed for general purpose
amplifier applications. This device is housed in the SC-59 package
which is designed for low power surface mount applications.
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COLLECTOR
3
Features
•This is a Pb-Free Device
MAXIMUM RATINGS (TA = 25°C)
Rating
Symbol
Value
Unit
Collector‐Base Voltage
V(BR)CBO
-300
Vdc
Collector‐Emitter Voltage
V(BR)CEO
-300
Vdc
Emitter‐Base Voltage
V(BR)EBO
-5.0
Vdc
IC
150
mAdc
Collector Current - Continuous
2
BASE
1
EMITTER
MARKING
DIAGRAM
THERMAL CHARACTERISTICS
Symbol
Max
Unit
Power Dissipation (Note 1)
Rating
PD
150
mW
Junction Temperature
TJ
150
°C
Tstg
-55X+150
°C
Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Device mounted on a FR‐4 glass epoxy printed circuit board using the minimum
recommended footprint.
3
2
1
SC-59
CASE 318D
STYLE 1
J2D MG
G
J2D= Device Marking Code
M = Date Code
G = Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
MSB92T1G
SC-59
(Pb-Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
August, 2007 - Rev. 0
1
Publication Order Number:
MSB92T1G/D
MSB92T1G
ELECTRICAL CHARACTERISTICS
Symbol
Min
Max
Unit
Collector‐Emitter Breakdown Voltage
(IC = -1.0 mAdc, IB = 0)
Characteristic
V(BR)CEO
-300
-
Vdc
Collector‐Base Breakdown Voltage
(IC = -100 mAdc, IE = 0)
V(BR)CBO
-300
-
Vdc
Emitter‐Base Breakdown Voltage
(IE = -100 mAdc, IE = 0)
V(BR)EBO
-5.0
-
Vdc
Collector‐Base Cutoff Current
(VCB = -200 Vdc, IE = 0)
ICBO
-
-0.25
mA
Emitter-Base Cutoff Current
(VEB = -3.0 Vdc, IB = 0)
IEBO
-
-0.1
mA
hFE1
hFE2
hFE3
25
40
25
-
Collector‐Emitter Saturation Voltage
(IC = -20 mAdc, IB = -2.0 mAdc)
VCE(sat)
-
-0.5
Vdc
Base-Emitter Saturation Voltage
(IC = -20 mAdc, IB = -2.0 mAdc)
VBE(sat)
-
-0.9
Vdc
fT
50
-
MHz
Ccb
-
6.0
pF
DC Current Gain (Note 2)
(VCE = -10 Vdc, IC = -1.0 mAdc)
(VCE = -10 Vdc, IC = -10 mAdc)
(VCE = -10 Vdc, IC = -30 mAdc)
-
SMALL SIGNAL CHARACTERISTICS
Current-Gain - Bandwidth Product
(IC = -10 mAdc, VCE = -20 Vdc, f = 20 MHz)
Collector-Base Capacitance
(VCB = -20 Vdc, IE = 0, f = 1.0 MHz)
2. Pulse Test: Pulse Width ≤ 300 ms, D.C. ≤ 2%.
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2
MSB92T1G
120
hFE , DC CURRENT GAIN
VCE = 10 Vdc
TJ = +125°C
100
80
25°C
60
40
-55°C
20
0
0.1
1.0
10
100
IC, COLLECTOR CURRENT (mA)
Figure 1. DC Current Gain
100
C, CAPACITANCE (pF)
Ceb @ 1MHz
10
1.0
0.1
0.1
Ccb @ 1MHz
1.0
10
100
VR, REVERSE VOLTAGE (VOLTS)
1000
Figure 2. Capacitance
1.4
V, VOLTAGE (VOLTS)
1.2
VCE(sat) @ 25°C, IC/IB = 10
VCE(sat) @ 125°C, IC/IB = 10
VCE(sat) @ -55°C, IC/IB = 10
VBE(sat) @ 25°C, IC/IB = 10
1.0
0.8
VBE(sat) @ 125°C, IC/IB = 10
VBE(sat) @ -55°C, IC/IB = 10
VBE(on) @ 25°C, VCE = 10 V
VBE(on) @ 125°C, VCE = 10 V
VBE(on) @ -55°C, VCE = 10 V
0.6
0.4
0.2
0.0
0.1
1.0
10
IC, COLLECTOR CURRENT (mA)
100
Figure 3. “ON” Voltages
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3
MSB92T1G
PACKAGE DIMENSIONS
SC-59
CASE 318D-04
ISSUE G
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3
HE
2
E
DIM
A
A1
b
c
D
E
e
L
HE
1
b
e
C
A
MILLIMETERS
NOM
MAX
1.15
1.30
0.06
0.10
0.43
0.50
0.14
0.18
2.90
3.10
1.50
1.70
1.90
2.10
0.40
0.60
2.80
3.00
MIN
0.039
0.001
0.014
0.003
0.106
0.051
0.067
0.008
0.099
INCHES
NOM
0.045
0.002
0.017
0.005
0.114
0.059
0.075
0.016
0.110
MAX
0.051
0.004
0.020
0.007
0.122
0.067
0.083
0.024
0.118
STYLE 1:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
L
A1
MIN
1.00
0.01
0.35
0.09
2.70
1.30
1.70
0.20
2.50
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.4
0.094
1.0
0.039
0.8
0.031
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under
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4
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MSB92T1G/D