ETC AN5195

AN5095/AN5195咩 叫顷/初 顷/建Ⅱ蔓/彳 亍场
l犭
茁 卜
扫描小信号处理集成 电路
弓
妇叫胶 z。 °
佛,,b91ˉ
轺电知媒 成妞舍
1.功 能
ANsO9S/ANs1呖 是 日本松下公司生产的具各
线控制功能的多制式彩色电视机专用
`C总
集成电路 。该集成块内部包括图像 中频信号处理电路、伴音中频信号处理 电路 、亮度信号处
理电路 、色度信号处理 电路、RGB基 色信号处理 电路 、同步分离电路和行、场扫描小信号
形成电路等。长虹公司采用该集成电路生产的彩电规格有 21英 寸、犭 英寸、z9英 寸 ,主 要
型号有 Rz118N、 m516N、 Rz918N等 。
2.应 用 电路
(见 图1)
3.引 脚功能与维侈数据
(见
表1)
表 1 ANs,s/ANs19s引 脚功能与维修数据
脚号
功
电
压 (Vl
态
动
对地电阻
(⒛ α 档 )
能
静
态
1
R钳 位滤波
7.12
7.OT
2
G钳 位滤波
7.11
7.06
3
B钳 位滤波
7.10
7,∝
4
自动消色识别滤波
2.13
3.O3
127
5
消色识别乃Hz、 ω比 识别 /sECAM检 测输 出
0,37
4.60
32
6
APC滤 波
2.41
2.55
∞
∞
l∝
‘
7
4,姆 M比 晶振
2,48
2.53
8
3.兔 MIIz晶 振
3.11
2.84
9
黑 电平检测
4.67
4,18
150
27
0.27
7
字符 R信 号输人
4,79
4.81
∞
G信 号输人
4.82
4,85
∞
10
12
`开
字符
关控制信号输人
o。
∞
∞
W主 芯片 lC
续表
・
(Ⅴ )
态
动
(zmk档 )
一
4.81
4.84
∞
8.85
8.85
1.2
R输 出
2.93
3.32
0.7
16
G输 出
2.97
3.33
0.7
17
B输 出
2.95
3.36
0.7
18
图像识别信号输 出
0.19
6.0②
地
0
o
⒛
自动对 比度控制
2.98
2.73
狃
21
数据线
3.21
3.21
10.3
2
时钟线
4.51
4.51
10.3
”
电源
4.86
4.86
0.3
z
图像中频信号输人
2.66
2.66
笏
犭
图像中频信号输人
2.66
2.66
犭
%
地
0
o
刃
高放 AGC输 出
6.T9
3.%
⒛
音频信号输 出
4.⒛
4.⒛
”
音频去加 重
3.59
3.59
鲳
30
自动频率控制电压输出
4.33
o.67
72
31
外视频信号输 人
1.g/I
1.舛
32
音频去耦
3.TT
3.81
∞
33
清晰度控制 输人
O.89
0
∞
贸
伴音鉴电路 电源滤波/外 音频信号输入
1.・ r⒊
1.zS
∞
35
伴音 中频输人
3.∞
3.09
∞
36
伴音 中频输人
3,09
3.fyz
37
中放 AGC滤 波
3.33
2.61
∞
38
内视频输 人
4.∝
3.95
∞
39
伴音中频 A℃ 滤波
3.m
3.“
妁
内视频输 人 2
3.2
1.91
∞
41
视频检波输 出
4.06
3.锟
∞
绲
agⅢ 也 同步检波滤波 (APC)
2.57
∞
字符 B信 号输人
14
电源
15
丶
13
丙
态
静
对地电阻
・
脚号
压
能
氵
电
功
〓
犭 〓
’
+9V
∞
一
一
9
+5V
o
0
39
∞
・ ・ 〓〓
`
1
〈
1.~冫 s
/
32
W主 芯片 ClC
续表
电
功
脚号
静
(Ⅴ )
对地 电阻
态
动
态
(ztlOk档
侣
同步检波谐振
3.77
3.70
仞
视频输 出
7.59
7.59
弱
亮度信号输 人
4.22
4.09
∞
弱
同步信号 (亮 度信号/全 电视信号 )输 人
2.32
2.33
∞
09
电源
+5V
4.gzI
4.84
0.3
鲳
色度信号输人
4.42
4.42
5.1
匆
地
0
0
0
so
行逆程脉冲输 人
o.67
o.⑤
o.9
51
行振荡 电源 (6.3V)
6.36
6,36
17.3
52
AFCz滤 波
2.84
2.70
53
AFC1滤 波
4.27
4.15
54
行振荡 晶振连接
2.33
23.31
55
X射 线保护
0
0
56
行激励脉 冲输 出
l,17
1.17
57
场钳位
2,2
2.54
∞
58
场激励脉冲输 出
3.85
3.陌
35.6
59
sECsM接 口
1.2r⒉
1.。
⒓
∞
ω
B-Y输 出
2.14
2.14
∞
61
R-Y输 出
2.18
2.18
⒍
沙堡脉冲输 出
0.92
0.88
21.7
B-Y输 人
fR-Y输 入
4.49
4.41
∞
4.67
4.66
∞
“
“
°
压
能
)
∞
∞
9.3
15.6
1
4.相 关 电路 维修 要点
4.1 图像 中频信号处理电路
图像 中频信号处理电路 由集成块② 、④、⑦、⑩ [email protected] ⑩脚外接元件和集成块内部
相关电路组成。该部分电路的作用是对图像中频信号进行放大 、视频检波。通过视频检波电
路 、高放 AGC电 压形成电路、自动频率控制 (AΠ )电 压形成电路 ,得 到并产生视频全 电视
信号、高放 AGC电 压、自动频率控制信号。
视频检波电路所需要的开关脉冲信号 ,由 集成块⑨、⑩脚外接元件和集成块内部相关电
W主 芯片 lC
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图 1 ANsO9s/ANs1呖 应用 电路
10晰 皮控俐
W主 芯片 C
路组成的压控振荡器 (Ⅴ CO)形 [email protected] ⑩脚外接元件异常 ,压 控振荡器不能形成 正常的开
关脉冲信号 ,视 频检波电路和 自动频率控制电压形成电路就不能正常工作 ,即 使集成块②、
④脚有正常的图像 中频信号输人 ,集 成块⑩、④脚也无正常的视频全电视信号和 自动频率控
制电压输出。
集成块⑦脚为中放 AGC电 压滤波端。外接 电容为 AGC滤 波电容。外接电容变质会引起
图像 中频信号处理电路工作异常 ,造 成图像不稳定或无图像故障。该脚外接电容变质的另 一
特点是电视机无信号输人情况下 ,蓝 背景置于关时 ,屏 幕噪点不正常。因此 ,检 修电视机图
像不稳定或无图像故障时 ,只 要电视机蓝背景置于关时 ,屏 幕噪点正常 ,就 不必对该脚外接
电容进行检查。
集成块②脚为高放 AGC电 压输出端。高放 AGC电 压 由集成块 内部 电压形成。高放 AGC
电压起控点由遥控器通过 ′C总 线数据设定。该脚输出的高放 AGC电 压随电视机接收信号的
强弱变化而变化。将该脚从电路上断开 ;不 会造成电视机无图像。在检修电视机接收强信号
不稳定故障时 ,若 测得该脚电压不随信号强弱变化 ,可 判定故障出在集成块 ANS∞ 5。
集成块⑩脚为 自动频率控制 (AΠ )电 压输出端。⑩脚输出的 A刃 电压 由集成块 内部的
Am电 压形成电路形成 。⑩脚输出的 AΠ 电压直接输往微处理器的 AΠ 电压输人端 ,作 为
利用全 自动搜索功能 预置节 目过程 中的电台识别信 号。在采用 AN5095生 产 的彩色 电视机
中 ,除 [email protected] ⑩脚外接元件的性能会直接影响⑩脚输出的 AΠ 电压外 ,`C总 线 AΠ 项
目下的数据调整量也会有影响。⑩脚无 正 常的 A刃 电压输 出 ,电 视机 出现的故 障是 自动搜
索节 目号不变故障。在维修采用 AN5095生 产的彩色电视机 自动搜索节 目号不变故障时 ,若
“
“
进入维修模式调出的 A刃一Dls” 和 AGC— DEr数 据正常 ,则 对 图像 中放电路来讲 ,可
判定引起 自动搜索节 目号不变故障的原因是集成块⑨ 、⑩脚外接元件和集成块 AN5f,95存 在
。
故障。
集成块② 、④脚为图像中频信号输入端 ,④ 脚为检波后的视频 全 电视信号输出端。② 、
④脚输人的图像中频信号经集成块内部的图像中频信号放大电路和视频检波电路处理后 ,得
到视频全电视信号 ,从 集成块④脚输 出。在屏幕噪点正常和集成块② 、④脚有正常的图像 中
频信号输人的情况下 ,④ 脚有无稳定 (判 定集成块④脚有无稳定 的视频信号输 出的方法是
将④脚外 电路断开 ,用 电容将④脚输出的信号直接输往⑩、⑩脚 ,有 稳定的图像 ,就 说明④
:
脚有稳定的视频全电视信号输出)的 视频全 电视信号输出 ,只 与集成块⑨、⑩脚外电路和集
成块有关 。检修④脚无稳定视频全电视信号输出故障时 ,请 检查集成块⑨、⑩脚外电路和集
成块。
4.2 伴啬中频信号处理电路
伴音 中频信号处理电路的任务是对第二伴音中频信号进行放大 、鉴频 ,产 生 qv电 视音
频信号。伴音中频信号处理电路 由集成块②、⑩ 、②、⑩ 、⑩ 、⑩ 、⑦脚外接元件和集成块
内部相关电路组成。
集成块⑩ 、⑩ 、⑩脚均为第二伴音中频信号输人脚。该三脚内部设置有伴音中频信号切
换开头 ,对 输人的图像中频信号进行切换 ,以 选出不同制式的第二伴音中频信号输往伴音中
频信号放大电路。集成块内部 的第二伴音切换 开关 由微处理器通过 PC总 线进行控制。
集成块⑩脚不仅作为第二伴音中频信号输人脚 ,还 作为图像清晰度控制脚。在采用集成
`
。
W主 芯片 C
块 ANsO95生 产的长虹彩色电视机 中 ,由 于不同制式的第二伴音 中频信号切换 由专用集成 电
路完成 ,所 以只选择⑩脚作为第二伴音中频信号输入脚。⑩脚作为清晰度控制脚 ,⑩ 脚用一
只电容接地 ,作 用是消除外部电路 的干扰。因此 ,在 长虹彩电中 ,⑩ 、⑩脚电压正常 ,就 不
″
必对⑩ 、⑩脚外电路进行检查。
集成块⑦脚为外音频信号输人端。在长虹彩色电视机中 ,外 音频信号输人 由专用集成电
路完成 ,故 该脚不用 ,仅 用 一 只电容接地 ,将 外部干扰信号短路到地 ,作 用是消除外部干
扰。
集成块⑩脚外接伴音鉴频锁相环滤波器 ,作 用是对内部锁相环电路检测出的反映压控振
荡器 (Ⅴ C0)频 率和相位的误差信号进行滤波 ,得 到直流电压加到压控振荡器 上 ,控 制压控
振荡器的频率和相位 ,使 压控振荡器的频率和相位稳定 。该脚外接元件性能不 良,会 使集成
块内部的伴音鉴频 电路工作异常 ,出 现伴音噪声大故障。
集成块⑩脚外接伴音去加重兼高频脉冲滤波电容 ,该 电容容量变小或开路 ,伴 音鉴频电
路中的高次谐波脉冲将不能滤除 ,使 电视机接收 lV信 号时出现伴音噪声大或伴音失真故
障。
集成块②脚为 lV音 频信号输出脚 。从集成块⑩脚输人的第二伴音 中频信号 ,经 伴音鉴
频电路处理后 ,得 到音频信号从集成块 ②脚输出。在采用 ANsO95生 产的彩色电视 机中 ,如
果电视机出现的是有伴音 ,只 是噪声大故障 ,检 修时 ,请 检查集成块⑩、② 、⑦、⑩脚外电
路和集成块就行 了 ;如 果出现的是②脚无伴音输出故障 ,则 可判定故障出在集成块。
4.3 色度信号处理电路
色度信号处理电路的任务是通过对色度信号的放大 、制式识别 、解调处理 ,得 到 R-Y、
B-Y色 差信号。色度信号处理电路 由集成块④、⑤ 、⑥ 、⑦脚外接元件和集成块 内部相关
电路组成。④脚外接元件组成消色识别电路的滤波 电路 ,该 脚外接元件不正常 ,会 影响消色
识别电路正常工作 ,使 电视机出现无彩色故障 ,但 不会造成彩色色调不正常故障。因此 ,在
电视机出现色调不正常故障时 ,不 必对④脚外电路进行检查 ,而 只有无彩色故障时 ,才 对其
进行检查。
集成块⑤脚为消色识别信号 、5O/ω Hz识 别信号 、sECAM识 别信号输出端 。该脚输出的
信号由集成块 内部电路形成 ,并 直接输往微处理器。由微处理器 内部 电路处理后 ,通 过 PC
总线控制色度信号解调电路的工作状态 ,选 择与输人色度信号对应的色度信号解调电路进人
。 工作状态。⑤脚外接元件出故障 ,或 集成块 内部无信号输出 ,不 会造成无彩色故障 ,只 会引
起彩色色调异常故障 。因此 ,电 视机出现无彩色故障时 ,不 必对该脚外电路进行检查。只有
当色调不正常时 ,才 对其进行检查。
集成块⑥脚为色副载波恢复电路 AE滤 波端。集成块⑦脚外接 4。 侣M比 晶振 ,⑧ 脚外
接 3.粥 M比 晶振。⑥ 、⑦、⑧脚外接 元件和集成块 内部相关 电路组成色副载波恢复 电路
分别产生 4。 铝MIIz和 3。 猊M比 的色副载波信 号。电视机接收一种制式信号 (PAL或 MsC)
有彩色 ,可 判定⑥脚外电路无故障。造成一种制式无彩色的原 因是晶振或集成块存在故障 。
,
若 电视机接收任何制式信号均无彩色 ,则 检修时 ,需 对⑥脚外电路中的元件和集成块进行检
查 (一 般情况下 ,两 只晶振同时损坏的可能性很小 )。
集成块⑩脚为色副载波信 号输 出端 ,该 脚输 出的色副载波信号直接输往 sECA解 调 电
W主 芯片 IC
路 ,采 用 ANsO95生 产的长虹彩色电视机无 sECAM功 能 ,该 脚不用。
集成块⑩脚为色度信号输人端。该脚输人的色度信号经色度信号解调电路处理后 ,得 到
R-Y、 B-Y色 差信号 ,分 别从集成块⑩ 、①脚输 出。
4.4 亮FR信 号和 RGB基 色信号处理电路
亮度信号处理电路的任务是对亮度信号进行放大、延迟 、黑电平延伸等处理 ,改 善和提
高图像的清晰度 。RGB基 色信号处理电路的任务是通过对 Y、 R-Y、 B-Y信 号进行矩阵变
换和放大 ,产 生符合视放 电路要求 的 RGB基 色信号。亮度信号处理 电路 由集成块⑨ 、⑩、
② 、⑩脚外接元件和集成块内部相关电路组成。
集成块⑨脚为黑电平峰值检测滤波端。外接元件组成滤波电路 ,该 电路不影响电视机重
现图像和声音 。检修电视机光栅正常 ,出 现无图像故障时 ,只 要测得⑨脚电压基本正常 ,就
不必对⑨脚外电路进行检查。
集成块⑩脚为图像清晰度控制 端。该脚外接元件组成 的电路 ,虽 然对图像清晰度有影
响 ,但 只要不是出现短路 ∴就不会造成无图像 、无彩色故障。
集成块⑩脚为 自动对比度 (ABL)控 制脚。该脚外接元件开路 ,不 会造成无图像 、无彩
色故障。
集成块⑩脚为亮度信号输人端 (该 脚也可输人视频全电视信号 ),内 接亮度信号处 理电
路。该脚输人的亮度信号 (视 频全电视信号 ),经 集成块 内部电路处理后 ,不 再输往集成块
外电路 ,而 是从集成块内部输往 RGB基 色信号矩阵电路。亮度信号处 理电路 出故障 ,只 会
造成亮度信号丢失 。如果电视机出现亮度信号丢失故障 ,维 修时 ,将 ④脚输出的视频信号跨
接到⑩脚 ,故 障仍然不变 ,完 全可判定故障出在集成块 AM∞ 5。
RGB基 色信号处理 电路 由集成块①、② 、③ 、⑩、⑩ 、⑦、⑩、⑦脚外接元件和集成
块内部相关电路组成。⑩、⑦脚为色差信号输人端。从⑩、⑦脚输人的色差信号 ,由 集成块
内部的矩阵变换电路进行矩阵变换后 ,得 到 RGB基 色信号从集成块⑩、⑩ 、⑦脚输 出 ,送
往末级视放电路。电视机出现偏色故障时 ,若 查得视放 电路、基带延迟 电路 (由 m溺
V
组成 )和 显像管无故障 ,可 判定故障出在集成块 ANsO95。
集成块①、② 、③脚为 RGB基 色信号钳位端。外接 电容为钳位 电容。钳位 电容不仅直
接影响 RGB基 色信号处理电路的工作状 态 ,还 与过流保护电路关系密切 。钳位 电容出现容
量变小或开路 ,不 仅会造成图像彩色不正常 ,还 会导致集成块内部过流保护电路启动进人工
作状态 ,使 光栅出现一条水平亮线故障。因此 ,当 采用 ANs∞ 5生 产的长虹彩电出现一条水
平亮线故障时 ,除 检查场扫描电路外 ,还 应注意对集成块①、② 、③脚外电路进行检查 。
′
4.5 行场扫描小信号处理
行场扫描小信号处理电路包括同步分离电路 、行振荡电路、行场激励脉冲形成电路 。该
部分电路的任务是从亮度信号或视频全电视信号中分离出同步信号 ,产 生行振荡脉冲信号和
行场激励脉冲信号 。
行场扫描小信号处理电路由集成块⑦、⑩、⑩ 、⑩、⑦、② 、⑩ ~,⑩ 脚外接元件和集成
块内部相关电路组成。
同步分离电路完全集成在集威块内部 。同步分离电路能否从视频全电视信号或亮度信号
`
W主 芯片 C
中分离出行场同步信号 ,与 集成块外电路无任何关系 ,完 全由集成块内部电路决定。
行振荡电路 由集成块① 、②、⑩、⑦脚外接元件和集成块内部相关电路组成。①脚为行
振荡启动电源供电端 ,⑦ 脚外接行振荡电路的晶体振荡器。行振荡器的振荡频率完全 由行振
荡器决定 。检查行振荡器不能启动进人工作状态故障时 ,应 当首先检查集成块①脚电压 ,如
果 电压正常 ,则 行不振荡的原因是晶体和集成块存在故障。
犭
集成块⑩脚为行逆程脉冲信号输人端。⑩脚输人的行逆程脉冲来 自行输出电路。⑩脚输
人的行逆程脉冲信号直接输往集成块 内部的 AFC-2电 路和行消隐电路 。输往 AFCˉ2的 行
脉冲信号由 AFC— 2电 路和集成块⑨脚外接元件共同作用实现行中心 自动调节。输往消隐电
路的行脉冲信号 ,经 行消隐电路处理后 ,送 往沙堡脉冲形成电路 ,由 沙堡脉冲形成电路形成
沙堡脉冲输往亮度控制门限电路和集成块◎脚。在集成块⑩脚有正常的行逆程脉冲输人的情
况下 ,如 果集成块⑨脚无正常的沙堡脉冲输出 ,可 判定集成块内部电路存在故障 ,通 常表现
出的故障是无光栅。因此 ,电 视机出现无光栅故障时 ,不 能忽视对集成块⑩脚外电路进行检
查。
集成块⑩脚外接元件组成了 AFC— 1双 时间常数滤波电路。该滤波电路的性能直接影 响
到行振荡电路的振荡频率和相位。因此 ,如 果行振荡器的振荡频率和相位发生偏移 (表 现在
故障上通常是行中心或行不同步 )时 ,对 集成块外电路而言 ,除 检查行振荡晶体外 ,还 应对
∷
⑩脚外电路进行检查 。
场输出电路 ,既 可能出在视频放大电路 ,也 可能出在 RGB基 色信号箝拉电路或行输出电路。
检修光栅呈现一条水平亮线故 障时 ,如 果发现刚开机时光栅很亮 ,且 有回扫线 ,随 之光栅变
成一条水平亮线 ,这 种故障不是出在集成块 ,而 是出在视放电路上 :
集成块⑨脚为黑电平检测滤波端 ,⑩ 脚为字符消隐信号输人端。字符消隐信号来 自微处
理器的消隐信号输出端。⑨脚外接元件开路不会造成无光栅或亮度信号丢失故障。⑩脚无消
隐信号输人 ,电 视机会出现无字符显示故障。因此 ,当 电视机出现无字符显示故障时 ,⑩ 脚
外电路也应当检查。
⌒
行场输出电路存在过流或 RGB基 色信号箝位电路 (集 成块①、②、③脚 )外 电路和视频放
大电路存在故 障 ,⑩ 脚 内部的过流保护电路将启动进人工作状态 ,使 电视机出现一条水平亮
线故障。因此 ,采 用 AN5095生 产的彩色电视机光栅呈现水平亮线故 障时 ,故 障不一定出在
・
集成块⑩脚为过流保护电路的过流检测脚。⑩脚内部的过流检测电路不仅对该脚的电流
进行检测 ,还 对集成块内部的矩阵电路工作状态进行检测。⑩脚接在行场输出电路上 ,如 果
r・
集成块⑩脚为行激励脉冲信号输出端。行激励脉冲由集成块 内部的行激励脉冲形成电路
产生。如果集成块⑩脚无行激励脉冲信号输出 ,测 量集成块①脚电压又正常 ,则 可判定故 障
出在晶体振荡器和集成块 。
集成块⑦脚为场钳位脉冲端 ,⑩ 脚为场激励脉冲输出端。场激励脉冲完全由集成块内部
的场激励脉冲形成电路形成。⑦脚外接元件开路 ,不 会造成⑩脚无场激励脉冲输出。集成块
内部的场激励脉冲形成电路与集成块外部的场输出电路不构成交直流负反馈 ,⑩ 脚电压不正
常 ,只 与集成块⑦脚外接元件和集成块有关。因此 ,当 光栅呈现一条水平亮线故障时 ,若 测
得⑩脚电压不正常或该脚无场激励脉冲输出 ,只 检查集成块⑦脚外电路和集成块就行了。
4.6 IV/AⅤ 切换电路
ANsO95内 部电路还具有 IV/AⅤ 切换功能。IV/AⅤ 切换 由 PC总 线控制。集成块⑩脚 为
外部视频信号输人端。⑦脚为视频信号输出端 ,④ 脚为 IV视 频信号输出端 ,⑩ 脚为亮度信
号输人端 ,⑩ 脚为色度 信号输人端。在长虹彩 电中 ,IV/AⅤ 切换 由专用集成 电路完成 。因
此 ,集 成块⑩、⑦脚设计为空脚不用。
在采用集成块 ANs∞ 5生 产的长虹彩电 中 ,图 像状态 (亮 度、色饱和度 、对 比度 、色调
等 )、 光栅 白平衡调整由遥控器通过总线进行。在彩 电维修 中 ,更 换存储器后 ,应 当进人维
修模式 ,按 原设计数据进行总线数据设置 ,才 能保证电视机正常工作 。
ICs for TV
AN5195K-C
Single chip IC for PAL/NTSC color TV
(built-in I2C bus interface)
Unit: mm
■ Overview
58.4±0.3
33
1
32
3.85±0.2
17.0±0.2
64
• Built-in video IF circuit, sound IF circuit, video
signal processing circuit, color signal processing
circuit, and sync. signal processing circuit
• Rationalization of set production line can be realized by the incorporation of I2C bus interface
• Can be applied to PAL/NTSC/AV-NTSC/MNTSC system
• Package: 64-SDIP, supply voltage: 5 V, 9 V
(1.641)
1.778
(1.0)
+0.1
0.5–0.05
(3.3)
■ Features
0.7 min.
5.2 max.
The AN5195K-C is an IC in which all of the
PAL/NTSC system color television signal processing circuits are integrated on one chip. The rationalization of set production line can be realized by
the incorporation of I2C bus interface.
19.05
+0.1
0.25– 0.05
0° to 15°
Seating plane
SDIP064-P-0750B
■ Applications
• TV, TV-video combination
1
AN5195K-C
ICs for TV
■ Block Diagram
2
ASW
*1-bit
Pre-amp.
*1-bit
LPF
VCO
SIF
detect
SIF SW
*2-bit
Video SW
*1-bit
*6-bit
RF
AGC
IF
AGC
Level
adjust
*3-bit
IF
amp.
VIF
detect
I C bus
interface
SW
out
DAC
out
2
Y
clamp
*Cut off
8-bit
B
G
LPF
R
*Drive
7-bit
*Cut off
8-bit
*1-bit
(*6-bit)
1H
FF
ACC
amp.
ACC
det.
2-bit
1-bit
Chroma
VCO
APC
*6-bit
CW
generate
Tint
50 Hz
/60 Hz
detect
Killer
ident
Ext. video in
AFT out
De-emphasis
Audio out
RF AGC
GND(VIF/SIF)
VIF2 in
VIF1 in
23 V (VIF/SIF)
CC3
22
21
18
17
16
SCL
SDA
ACL
GND (RGB/DAC)
Hor. lock det.
B-out
G-out
15
R-out
14 V (9 V)
CC1
12
11
10
9
8
7
6
Killer
*
7-bit 50 Hz/60 Hz
SECAM det SW
System
SW
HVBLK
BGP
Ver.
count down
Contrast
Y
contrast
Black
expansion
*6-bit
Sharpness
Hor.
lock DET
*Drive
7-bit
*Cut off
8-bit
AFT
Phase
shift
CV
clamp
Ver.
sync. sep.
AFC2
*3-bit
AFC1
Hor.
count
down
Decoupling
24
20
Brightness
−(R−Y) in 64
26
25
R
clamp
−(B−Y) in 63
G
clamp
62
27
13
B
clamp
61
RGB SW
−(R−Y) out
30
19
R−Y
B−Y
demod demod
+/−
−(B−Y) out
60
S.C.P
HVCO
59
Matrix
SECAM interface
58
PN/S
SW
V-out
57
*1-bit
Ver. clamp
56
G−Y
H-out
55
Shut
down
X-ray protect
54
Ver.
out
Hor. VCO
53
Saturation *6-bit
AFC1 filter
*9-bit
APC1
*7-bit
AFC2 filter 52
*2-bit
(50 Hz
/60 Hz)
CC2
SCP
VCC3(VCJ) 47
48
C in/black expansion
49
GND(VCJ)
50
FBP in
51
V
Hor.
sync. sep.
Sync. in
45
46
31
28
HBLK
Y-in
44
Hor.
reg.
Video out
32
29
VCO
SIF2 in 35
36
SIF1 in
37
IF AGC filter
38
Int. video1 in
39
SIF APC filter
40
Int. video2 in
41
VIF det. out
42
VIF APC1 filter
VIF VCO 43
Limiter
Ext. audio in 34
Deemphasis
SIF3 in/ sharpness 33
B-in
G-in
R-in
YS in
BL det.
Chroma VCO (3.58 MHz)
Chroma VCO (4.43 MHz)
APC filter
5 Killer out,50 Hz/60 Hz out
SECAM det. out
4 Killer filter
3
(B) clamp filter
2
(G) clamp filter
1
(R) clamp filter
ICs for TV
AN5195K-C
■ Pin Descriptions
Pin No.
Description
Pin No.
Description
1
(R) clamp
33
SIF3 input/ sharpness
2
(G) clamp
34
External audio input
3
(B) clamp
35
SIF2 input
4
Killer filter
36
SIF1 input
5
Killer out, 50 Hz/60 Hz out, SECAM det. out
37
IF AGC filter
6
Chroma APC filter
38
Internal video1 input
7
Chroma VCO (4.43 MHz)
39
SIF APC filter
8
Chroma VCO (3.58 MHz)
40
Internal video2 input
9
Black level det.
41
VIF detect output
10
YS input
42
VIF APC1 filter
11
External R input
43
VIF VCO (fP/2)
12
External G input
44
Video output
13
External B input
45
Y input
14
VCC1
46
HV sync. input
15
R output
47
VCC3-2 (chroma/jungle/DAC)
16
G output
48
Chroma input/black expansion start
17
B output
49
GND (video/chroma/jungle)
18
Hor. lock detect
50
FBP input
51
VCC2 (hor. stability supply)
(RGB/I2C/DAC)
19
GND
20
ACL
52
AFC2 filter
21
SDA
53
AFC1 filter
22
SCL
54
Hor. VCO (32 fH)
23
VCC3-1 (VIF/SIF)
55
X-ray protection input
24
VIF1 input
56
Hor. pulse output
25
VIF2 input
57
Ver. sync. clamp
26
GND (VIF/SIF)
58
Ver. pulse output
27
RF AGC output
59
SECAM interface
28
Audio output
60
−(B−Y) output
29
De-emphasis
61
−(R−Y) output
30
AFT output
62
Sandcastle pulse output
31
External video input
63
−(B−Y) input
32
DC decoupling filter
64
−(R−Y) input
3
AN5195K-C
ICs for TV
■ Absolute Maximum Ratings
Parameter
Symbol
Supply voltage
VCC
Supply current
Power
Unit
VCC1(14)
10.5
V
VCC3(23, 47)
6.0
ICC
dissipation*2
Operating ambient
Rating
temperature*1
Storage temperature
*1
I14
67
I23+47
126
I51
27
mA
PD
1,480
mW
Topr
−20 to + 70
°C
Tstg
−55 to + 150
°C
Note) *1 : Except fot the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2 : The power dissipation shown is the value for Ta = 70°C.
■ Recommended Operating Range
Parameter
Supply voltage
Supply current
Symbol
Range
Unit
VCC1
8.1 to 9.9
V
VCC3
4.5 to 5.5
I51
10 to 25
mA
■ Electrical Characteristics at Ta = 25°C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Power supply
Supply current 1
I14
Current at V14 = 9 V
39
48
57
mA
Supply current 2
I23
Current at V23 = 5 V
7
10
13
mA
Supply current 3
I47
Current at V47 = 5 V
49
63
77
mA
Stabilized power supply voltage
V51
Voltage at I51 = 15 mA
5.8
6.5
7.2
V
Stabilized power supply current
I51
Current at V51 = 5 V
2
5
7
mA
Stabilized power supply
input resistance
R51
DC measurement, gradient
at I51 = 10 mA and 25 mA
1
5
10
Ω
Modulation m = 87.5%, data 0B = 44
1.7
2.1
2.5
V[p-p]
VIF circuit
Typical input: fP = 38.9 MHz, VIN = 90 dBµ
Video detection output (typ.)
VPO
Video detection output (max.)
VPOmax
0B = 74
1.9
2.6
3.3
V[p-p]
Video detection output (min.)
VPOmin
0B = 04
1.1
1.6
2.1
V[p-p]
Video detection output f characteristics
fPC
Frequency to become −3 dB for 1 MHz
5.5
8
12
MHz
Sync. peak value voltage
VSP
Sync. peak voltage at V[p-0] measurement
1.6
2.0
2.4
V
APC pull-in range (H)
fPPH
High band side pull-in range
(difference from fP = 38.9 MHz)
1.0
2.0

MHz
APC pull-in range (L)
fPPL
Low band side pull-in range
(difference from fP = 38.9 MHz)

−2.0
−1.0
MHz
Delay point (input to become
V27 = approx. 6.5 V) at data 0A = 00 to 3F
75

95
dBµ
RF AGC delay point adjusting
range
4
∆VRFDP
ICs for TV
AN5195K-C
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Min
Typ
Max
Unit
Dispersion without input VIN,
V37 (IF AGC) = 0 V(measurement of
difference from 38.9 MHz)
−1.2
0
1.2
MHz
RF AGC maximum sink current IRFmax
Maximum current IC can sink when pin 27 is low
1.5
3.0

mA
RF AGC minimum sink current
IRFmin
Leakage current of IC, when pin 27 is high −50
0
50
µA
AFT discrimination sensitivity
µAFT
∆f = ±25 kHz
40
57
75
mV/kHz
AFT center voltage
VAFT
V30 without input VIN
4.0
4.5
5.0
V
AFT maximum output voltage
VAFTmax
V30 at f = fP −500 kHz
7.8
8.1
8.7
V
AFT minimum output voltage
VAFTmin
V30 at f = fP +500 kHz
0.3
0.8
1.0
V
DC measurement IO = − 0.4 mA to −1.0 mA
70
120
170
Ω
VIF circuit (continued)
Symbol
Conditions
Typical input: fP = 38.9 MHz, VIN = 90 dBµ
VCO free-running frequency
Detection output resistance
∆fP
RO41
SIF circuit Typical input: fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ
Audio detection output
(PAL, SIF1)
VSOP36
∆f = ±50 kHz
0B−D3 = 0
0.90
1.15
1.40
V[rms]
Audio detection output
(PAL, SIF2)
VSOP35
∆f = ±50 kHz
0B−D3 = 0
0.90
1.15
1.40
V[rms]
Audio detection output
(PAL,SIF3)
VSOP33
∆f = ±50 kHz
0B−D3 = 0
0.90
1.15
1.40
V[rms]
Audio detection output NTSC/PAL
RSN/P
∆f = ±25 kHz, 0B−D3 = 1, ratio to PAL (VSOP36) −2.5
− 0.5
1.5
dB
−3
0
3
dB
Audio detection output linearity ∆VSOP
Ratio between fS = 5.5 MHz
and 6.0 MHz, and 6.5 MHz
SIF pull-in range
NTSC (4.5 MHz)
fSNH
Pull-in range of high frequency side
(4.5 MHz)
4.8
5.0

MHz
SIF pull-in range
NTSC (4.5 MHz)
fSNL
Pull-in range of low frequency side
(4.5 MHz)

4.0
4.2
MHz
SIF pull-in range
PAL (5.5 MHz)
fSPH
Pull-in range of high frequency side
(5.5 MHz)
5.8
6.0

MHz
SIF pull-in range
PAL (5.5 MHz)
fSPL
Pull-in range of low frequency side
(5.5 MHz)

5.0
5.2
MHz
SIF pull-in range
PAL (6.0 MHz)
fSPH
Pull-in range of high frequency side
(6.0 MHz)
6.3
6.5

MHz
SIF pull-in range
PAL (6.0 MHz)
fSPL
Pull-in range of low frequency side
(6.0 MHz)

5.5
5.7
MHz
SIF pull-in range
PAL (6.5 MHz)
fSPH
Pull-in range of high frequency side
(6.5 MHz)
6.8
7.0

MHz
SIF pull-in range
PAL (6.5 MHz)
fSPL
Pull-in range of low frequency side
(6.5 MHz)

6.0
6.2
MHz
De-emphasis pin
output resistance (PAL)
R29P
Impedance of pin 29 at PAL
32
40
48
kΩ
De-emphasis pin
output resistance (NTSC)
R29N
Impedance of pin 29 at NTSC
48
60
72
kΩ
5
AN5195K-C
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
5.7
6.7
7.7
dB
8
10

MHz
AV SW circuit
Video SW voltage gain
GVSW
f = 1MHz, VIN = V[p-p]
Video SW f characteristics
fVSW
Frequency to become −3 dB
from f = 1 MHz, VIN = 0.714 V[0-p]
Video SW external input pin voltage
V31
DC measurement
1.7
2.0
2.3
V
Video SW external output DC voltage
V44E
DC measurement, 03−D7 = 1, 0B−D7 = 1
4.2
4.8
5.4
V
Video SW external input resistance
RI31
DC measurement
44
56
68
kΩ
Video SW output resistance
RO44
DC measurement, IO = − 0.6 mA to −1.0 mA
100
140
180
Ω
Video SW internal clamp pin voltage V38,40
DC measurement, IIN = −1.0 mA
1.3
1.6
1.9
V
Video SW internal output DC voltage
V44I
DC measurement
3.7
4.3
4.9
V
Audio SW voltage gain
GASW
Data 03−D7 = 1, 0B−D7 = 1
(external input) f = 400 Hz, VIN = 1 V[p-p]
−1
0
1
dB
Audio SW input pin voltage
V34
DC measurement
3.7
4.2
4.7
V
Audio SW output DC voltage
V28
DC measurement
3.7
4.2
4.7
V
Audio SW input resistance
RI34
DC measurement
55
65
75
kΩ
Audio SW output resistance
RO28
DC measurement
200
400
600
Ω
Video signal processing circuit
Typical input: 0.6 V[p-p] (VWB = 0.42 V[p-p] stair-step), at G-out
Data 03 = 20 (typ.) (contrast)
1.9
2.4
2.9
V[0-p]
VYOmax
Data 03 = 3F (max.)
4.1
5.0
5.9
V[0-p]
VYOmin
Data 03 = 00 (min.)
0.15
0.50
1.00
V[0-p]
15
20
25
dB
5.5
6.0

MHz
9
13
17
dB
Data 02 = 40 (typ.) (brightness)
2.0
2.5
3.0
V
Video output (typ.)
VYO
Video output (max.)
Video output (min.)
Contrast variable range
Video frequency characteristics
Picture quality variable range
Pedestal level (typ.)
YCmax/min 03 = 3F
03 = 00
fYC
Pin 33 = 5 V (sharpness), frequency
to become −3 dB from f = 0.2 MHz
YSmax/min V33 = 7 V
, f = 3.8 MHz
V33 = 5 V
VPED
Pedestal level variable width
∆VPED
Difference between data 02 = 00 and 7F
2.0
2.6
3.2
V
Brightness control sensitivity
∆VBRT
Average amount of change
at data 02 = 30 and 50 per 1 step
14
20
26
mV/
Step
Video input clamp voltage
VYCLP
Clamp voltage of pin 45
3.2
3.7
4.2
V
ACL sensitivity
ACL
Change of Y-out, when V20 = 3.0 V → 3.5 V
2.4
3.0
3.6
V/V
Blanking off threshold voltage
VYBL
DC voltage of blanking pulse

1.0
1.5
V
Blanking level
Service SW threshold voltage *1
VSTH
Stop voltage of vertical output,
when lowering pin 20 (ACL) voltage


0.3
V
DC restoration ratio
TDC
APL 10% to 90%
∆AC − ∆DC
TDC =
× 100
∆AC
90
100
110
%
Video input clamp current
IYCLP
DC measurement: IC inside sink current
8
13
18
µA
Note) *1: Take great care for not to become V20 < 0.9 V at set design so that the pin 20 is combined use for service SW when it is used as the ACL.
6
ICs for TV
AN5195K-C
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Video signal processing circuit (continued)
Min
Typ
Max
Unit
Typical input: 0.6 V[p-p] (VWB = 0.42 V[p-p] stair-step), at G-out
Pedestal difference voltage
∆VIPL
Difference voltage of R,G,B-out pedestal
− 0.2
0
0.2
V
Brightness voltage tracking
∆TBL
R,G,B-out fluctuation level ratio of
data 02 (brightness) = 20 to 60
0.9
1.0
1.1
Times
Output ratio of R,B-out against G-out 0.8
1.0
1.2
Times
Gain ratio of R,G,B-out at data 03
(contrast) = 10 to 30
1.0
1.1
Times/
Times
Video voltage gain relative ratio ∆GYC
Video voltage gain tracking
∆TCONT
Chroma signal processing circuit
Burst 150 mV[p-p] (PAL), reference is B-out
Input: Color bar data
00 = 20 (typ.), 03 = 20 (typ.)
2.9
3.7
4.5
V[p-p]
VCOmax
Data 00 = 3F, amplitude of one side, 03 = 20
2.6
3.3

V[0-p]
VCOmin
Data 00 = 00, 03 = 20


100 mV[p-p]
15
20
25
dB
Color-difference output (typ.)
VCO
Color-difference output (max.)
Color-difference output (min.)
Contrast variable range
0.9
CCmax/min 03 = 3F
, 00 = 20
03 = 00
ACC characteristics 1
ACC1
Burst 150 mV[p-p] → 300 mV[p-p]
0.9
1.0
1.2
Times
ACC characteristics 2
ACC2
Burst 150 mV[p-p] → 30 mV[p-p]
0.8
1.0
1.2
Times
NTSC tint center
∆θC
Difference from data 01 = 20 (tint),
when adjusted at tint center
−7
0
7
Step
NTSC tint variable range 1
∆θ1
Input: Rainbow, data 01 = 3F
30
50
65
deg
NTSC tint variable range 2
∆θ2
Input: Rainbow, data 01 = 00
−65
−50
−30
deg
Color-difference output ratio (R)
R/B
Input: Rainbow for both PAL/NTSC
0.46
0.56
0.66
Times
Color-difference output ratio (G)
G/B
Input: Rainbow for both PAL/NTSC
0.28
0.34
0.40
Times
Color-difference output angle (R)
∠R
Input: Rainbow for both PAL/NTSC
78
90
102
deg
Color-difference output angle (G)
∠G
Input: Rainbow for both PAL/NTSC
224
236
248
deg
PAL color killer tolerance
VKILLP
0 dB = 150 mV[p-p]
−57
−44
−34
dB
NTSC color killer tolerance
VKILLN
0 dB = 150 mV[p-p]
−57
−44
−34
dB
APC pull-in range (H)
fCPH
For both PAL/NTSC
450
700

Hz
APC pull-in range (L)
fCPL
For both PAL/NTSC

−700
−450
Hz
Color killer detection
output voltage (color)
VKC
V5, when chroma input
Data 0A−D6 = 0, 0A−D7 = 1, killer out
4.5
5.0

V
Color killer detection
output voltage (B&W)
VKBW
V5, when chroma input
Data 0A−D6 = 0, 0A−D7 = 1, killer out
0
0.1
0.5
V
Demodulation output −(B−Y)
VDB
Input: Measurement at pin 60
for both color bar PAL/NTSC
555
695
835 mV[p-p]
Demodulation output −(R−Y)
VDR
Input: Measurement at pin 61
for both color bar PAL/NTSC
430
540
650 mV[p-p]
Demodulation output angle ∠(B−Y) ∠RDB
Phase shift of B−Y axis
−6
0
6
deg
Demodulation output angle ∠(R−Y) ∠RDR
Phase difference from B−Y axis
84
90
96
deg
CW output level (4.43 MHz)
AC component, when VCO is set at 4.43 MHz 250
350
450 mV[p-p]
VCWP
7
AN5195K-C
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Chroma signal processing circuit (continued)
Min
Typ
Max
Unit
Burst 150 mV[p-p] (PAL), reference is B-out
VCWN
AC component, when VCO is set at 3.58 MHz


50
mV[p-p]
TCW
CW output period at SECAM and PAL
1.31
1.41
1.51
ms
SECAM discrimination current
ISECAM
Minimum value for taking out current
from pin 59 and discriminating as SECAM
50
100
150
µA
SECAM discrimination output
VSE
V5 data, when SECAM signal inputted
0A−D6 = 1, 0A−D7 = 0, SECAM det. out
4.5
5.0

V
CW output level (3.58 MHz)
CW output level period (SECAM)
PAL/NTSC DC level
V59PN
V59 DC level at PAL/NTSC
0.8
1.3
1.65
V
SECAM DC level
V59S
V59 DC level at SECAM
4.1
4.6
5.1
V
5
6
7
dB
RGB processing circuit
DAC data are typical
Drive adjustment range
Cut-off adjustment range
GDV
AC change amount of R, B-out,
when drive adjustment max. and min.
VCUTOFF
DC change amount of R,G,B-out,
2.1
when cutoff adjustment max. and min.
2.4
2.7
V
YS threshold voltage
VYSON
Minimum DC voltage, when YS turns on 1.0


V
YS threshold voltage
VYSOFF
Maximum DC voltage, when YS turns off


0.4
V
YS = 5 V
−200
0
200
mV
External RGB pedestal difference voltage ∆VEPL
Internal and external pedestal
difference voltage
∆VPL/IE
Internal-external
200
0
200
mV
External RGB output voltage
VERGB
Input 0.7 V[p-p], contrast 03 = 20 (typ.)
1.8
2.2
2.7
V[p-p]
External RGB output difference voltage ∆VERGB
Output ratio of external R,G,B-out
0.8
1.0
1.2
Times
External RGB contrast variable ECmax/min
range
03 = 3F
03 = 00
12
17
22
dB
External RGB frequency characteristics fRGBC
Input 0.2 V[p-p]
8
10

MHz
Internal and external RGB
output voltage ratio
External 0.7 V[p-p]/internal 0.6 V[p-p]
input, contrast 03 = 20 (typ.)
0.78
0.92
1.06
Times
15.33 15.63 15.93
VE/I
Synchronizing signal processing circuit
8
Horizontal free-running
oscillation frequency
fHO
Without sync. signal input
Horizontal output pulse duty cycle
τHO
Upward going pulse duty cycle
Horizontal pull-in range
fHP
Difference from fH = 15.625 kHz
PAL vertical free-running
oscillation frequency
fVO-P
NTSC vertical free-running
oscillation frequency
fVO-N
Vertical output pulse width
kHz
31
37
43
%
±500
±650

Hz
Data 01−D7 = 1, 02−D7 = 0
Forced 50 Hz mode, no sync. signal input
48
50
52
Hz
Data 01−D7 = 1, 02−D7 = 1
Forced 60 Hz mode, no sync. signal input
58
60
62
Hz
τVO
For both PAL/NTSC
9
10
11
1/fH
PAL vertical pull-in range
fVP-P
fH = 15.625 kHz, forced 50 Hz mode
46

54
Hz
NTSC vertical pull-in range
fVP-N
fH = 15.75 kHz, forced 60 Hz mode
56

64
Hz
Horizontal output voltage (H)
V56H
High-level DC voltage
2.9
3.2
3.5
V
Horizontal output voltage (L)
V56L
Low-level DC voltage


0.3
V
ICs for TV
AN5195K-C
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Synchronizing signal processing circuit (continued)
Vertical output voltage (H)
V58H
High-level DC voltage
3.9
4.2
4.5
V
Vertical output voltage (L)
V58L
Low-level DC voltage


0.3
V
Picture center variable range
∆THC
Change amount of phase difference of H
sync. and H-out of data 0B = 40 to 47
2.6
3.2
4.4
µs
Overvoltage protective
operation voltage
VXRAY
Minimum voltage of pin 55
at which H-out stops to appear
0.60
0.68
0.76
V
Vertical frequency
discrimination 50
f50
Vertical frequency to become
V5 = low (< 0.5 V)
47

55
Hz
Vertical frequency
discrimination 60
f60
Vertical frequency to become
V5 = high (> 4.5 V)
57

63
Hz
Sync. signal clamp voltage
V46
V46 clamp voltage
1.0
1.3
1.6
V
Horizontal output start voltage
VfHS
Minimum V50 to become f0 >10 kHz,
when horizontal oscillation output is
more than 1 V[p-p]
3.4
4.2
5.0
V
Sink current at ACK
IACK
Maximum value of pin 21 sink current
when ACK
1.8
2.5
5.0
mA
SCL, SDA signal input high-level
VIHI
3.1


V
SCL, SDA signal input low-level VILO


0.9
V
Maximum frequency allowable to input


100
kbit/s
I2C interface
fImax
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
VIF circuit
Symbol
Conditions
Min
Typ
Max
Unit
Typical input: fP = 38.9 MHz, VIN = 90 dBµ
Input sensitivity
Maximum allowable input
VPS
Input level to become VPO1 = −3 dB

45

dBµ
VPmax
Input level to become VPO1 = +1 dB

110

dBµ
SN ratio
SNP
50


dB
Differential gain
DGP


5
%
Differential phase
DPP


5
deg
Black noise detection level
∆VBN
Deference from sync. peak value

−45

IRE
Black noise clamp level
∆VBNC
Deference from sync. peak value

45

IRE
RF AGC operation sensitivity
GRF
Input level difference to become
V27 = 1 V → 7 V
0.5

3.0
dB
VCO switch on drift
∆fPD
Frequency drift from 5 seconds
to 5 mins. after SW on


200
kHz
Intermodulation
IM
VfC −VfP = −2 dB, VfC −VfP = −12 dB
46


dB
RF AGC adjustment sensitivity
SRF
Average amount of change of
output voltage V27 at data 1 step
2

5
V/
Step
9
AN5195K-C
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
VIF circuit (continued)
Symbol
Conditions
Min
Typ
Max
Unit
Typical input: fP = 38.9 MHz, VIN = 90 dBµ
AFT offset adjustment sensitivity
SAFT
Average amount of change of
output voltage V30 at data 1 step
0.1

0.3
V/
Step
Video detection output
fluctuation with VCC
∆VP/V
VCC = ±10%


±15
%
Video detection outputtemperature characteristics
∆VP/T
Ta = −20°C to +70°C


±10
%
Input resistance (pin 24, pin 25)
RI24,25
f = 38.9 MHz

1.2

kΩ
Input capacitance (pin24, pin 25)
CI24,25
f = 38.9 MHz

4.0

pF
fS = 38.9 MHz−6.0 MHz, P/S = 20 dB
90

110
dBµ
∆V42 = ± 0.1 V
2.0

3.5
kHz/mV
Free-running frequency change width
at data 0C = 00 to 7F
3

5
MHz
Ta = −20°C to +70°C


5
dB
Ta = −20°C to +70°C

300

kHz
Sound IF output level
VCO control sensitivity
VCO control range
VSIF
βP
fVCO
RF AGC delay-point temperature ∆VDP/T
characteristics
VCO free-running frequency
temperature characteristics
∆fP/T
AFT center frequency
temperature characteristics
∆fAFT/T
Ta = −20°C to +70°C, input frequency
at which AFT output voltage becomes 4.5 V

300

kHz
External mode output DC
voltage
V41EXT
Output DC voltage at AV SW
external mode
0.5
1.0
1.8
V
SIF circuit
Typical input: fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ
Input limiting level
VLIM
Input level to become VSOP = −3 dB


50
dBµ
AM rejection ratio
AMR
AM = 30%
55


dB
Total harmonic distortion
THD
∆f = ±50 kHz


1.0
%
SN ratio
SNA
∆f = ±50 kHz, fM = 400 Hz, on/off
55


dB
VCC = ±10%


±10
%
Ta = −20°C to +70°C


±10
%
Audio output with VCC fluctuation ∆VS/V
Audio output temperature
characteristics
∆VS/T
SIF input resistance
RI35
DC measurement

30

kΩ
SIF input resistance
RI36
DC measurement

30

kΩ
AV SW circuit
Video SW
cross-talk (Internal → Internal )
CTVII
f = 1 MHz, VIN = 1 V[p-p]
Internal → Internal


−55
dB
Video SW
cross-talk (External → Internal)
CTVEI
f = 1 MHz, VIN = 1 V[p-p]
Internal → External, External → Internal


−55
dB
Audio SW
cross-talk (Internal → Internal)
CTAII
fS = 6.5 MHz, fM = 400 Hz, VIN = 1 V[p-p]
fS = 6.5 MHz, fM = 1.0 kHz, VIN = 1 V[p-p]


−60
dB
10
ICs for TV
AN5195K-C
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit


−60
dB
AV SW circuit (continued)
SIF SW
cross-talk (External → Internal)
CTAEI
Video signal processing circuit
fS = 6.5 MHz, fM = 400 Hz, VIN = 1 V[p-p]
Inside f = 400 Hz, VIN = 1 V[p-p]
Typical input: 0.6 V[p-p] (VBW = 0.42 V[0-p] stair-step) at G-out
Black level extension 1
VBL1
Input: Total black, difference between the −100
voltage at pin 9 = 9 V and open (with RC filter)
Black level extension 2
VBL2
Input: Total black, difference between
the voltage at pin 9 = 3 V and 9 V
Black level extension 3
VBL3
Contrast variation
with sharpness
0
100
mV
400
700
1 000
mV
Input: approx. 20IRE, difference between
the voltage at pin 9 = open and 9 V,
03 (contrast) = 3F (max.)
100
300
500
mV
∆VCS
Y-out output level difference,
when sharpness max. and min.
−300
0
300
mV
Brightness variation
with sharpness
∆VBS
Pedestal level DC difference,
when sharpness max. and min.
−250
0
250
mV
Input dynamic range
VImax
03 (contrast) = 20 (typ.)


1.6
V[p-p]
Y signal SN ratio
SNY
03 (contrast) = 3F (max.)
53


dB
Black level extension start point
VBLS
Start point at V48 = 4.5 V
37
42
47
IRE
VCC1= 9 V (allowance: ±10%)


±15
%
∆VY/T
Ta = −20°C to +70°C


±10
%
VACL
V20 at which output amplitude becomes
90% when ACL pin (V20) is dereased
from 5 V
3.4
3.7
4.0
V
Video output with VCC fluctuation ∆VY/V
Video output-temperature
characteristics
ACL start point
Color signal processing circuit
Burst 150 mV[p-p] (PAL), reference is B-out
Demodulation output residual carrier VCAR1
2 fSC level of pin 60 and pin 61


30
mV
Color difference output residual carrier VCAR2
2 fSC level of pin 15, pin 16, and pin 17


50
mV
VCO free-running frequency (PAL)
fCP
Difference from f = 4.433619 MHz
−300

300
Hz
VCO free-running frequency (NTSC)
fCN
Difference from f = 3.579545 MHz
−300

300
Hz
VCC1 = 9 V (allowance: ±10%),
VCC3 = 5 V (allowance: ±10%)
−300

300
Hz
fCO fluctuation with VCC
∆fC/VCC
Static phase error (PAL)
∆θP
Tint shift, when ∆fC = −300 Hz to
+300 Hz change


5
deg/
100 Hz
Static phase error (NTSC)
∆θN
Tint shift, when ∆fC = −300 Hz to
+300 Hz change


5
deg/
100 Hz
PAL/NTSC
RP/N
Output amplitude ratio between PAL and NTSC
0.7
1.0
1.3
Times
∆VPAL
Pin 61: Output amplitude difference
per 1H for − (R−Y) pin


50
mV
Band to become −3 dB
1.0


MHz
Line crawling
Color difference output bandwidth
fCC
11
AN5195K-C
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Color signal processing circuit (continued)
Min
Typ
Max
Unit
Burst 150 mV[p-p] (PAL), reference is B-out
Color-difference output
fluctuation with VCC
∆VC/V
VCC1 = 9 V (allowance: ±10%),
VCC3 = 5 V (allowance: ±10%)


±15
%
Color-difference output
temperature characteristics
∆VC/T
Ta= −20°C to +70°C


±15
%
PAL/NTSC output impedance
RO60,61PN
DC measurement
390
480
570
Ω
SECAM output impedance
RO60,61S
DC measurement
100


kΩ
Color/B&W DC difference
voltage
∆VCBW
Pedestal level DC difference,
when burst signal with or without
−60
0
60
mV
RC/Y
Color bar input, B-out
Contrast typ., color data 00 = 30
0.9
1.2
1.5
V[0-p]/
V[0-p]
fYS
fYS, when YS input is 3 V[0-p],
output level −3 dB
7


MHz
(C−Y)/Y
RGB processing circuit
YS changeover speed
External RGB input dynamic range VDEXT
Contrast max., data 03 = 3F
1.0


V[p-p]
Internal/external crosstalk
Leakage, when f = 1 MHz, 1 V[p-p], YS = 5 V


−50
dB
CTRGB
Synchronizing signal processing circuit
Lock detection output voltage
VLD
V18, when horizontal AFC lock
5.7
6.3
6.9
V
Lock detection charge
and discharge current
ILD
DC measurement
±0.6
±0.8
±1.1
mA
EBP (RGB) slice level
VFBP
Minimum voltage of pin 50, when
blanking is applied to RGB output
0.4
0.75
1.1
V
EBP (AFC2) slice level
VFBPH
Minimum voltage of pin 50 at which
AFC2 operates
1.5
1.9
2.3
V
Horizontal AFC µ
µH
DC measurement
30
37
44
µA/µs
Horizontal VCO β
βH
β curve gradient near f = 15.75 kHz
1.4
1.9
2.4
Hz/mV
For both PAL/NTSC,
delay from H. sync. rise
0.2
0.4
0.6
µs
Burst gate pulse position
PBGP
PAL burst gate pulse width
WBGPP
3.4
4.0
4.6
µs
NTSC burst gate pulse width
WBGPN
2.5
3.0
3.5
µs
DC voltage of pin 62 in BGP period
4.5
4.7
4.9
V
H blanking pulse output voltage VHBLK
DC voltage in H-blanking pulse period
of pin 62
2.1
2.4
2.7
V
V blanking pulse output voltage VVBLK
DC voltage in V-blanking pulse period 2.1
of pin 62
2.4
2.7
V
PAL V blanking pulse width
WVP
Pulse width at f = 15.625 kHz
1.31
1.41
1.51
ms
NTSC blanking pulse width
WVN
Pulse width at f = 15.75 kHz
1.01
1.11
1.21
ms
FBP allowable range
TFBP
Time from H-out rise to FBP center
12

19
µs
Burst gate pulse output voltage
12
VBGP
ICs for TV
AN5195K-C
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
2.5

5.0
V
tBUF
4.0


µs
Start condition set-up time
tSU,STA
4.0


µs
Start condition hold time
tHD,STA
4.0


µs
Low period SCL, SDA
tLOW
4.0


µs
High period SCL
tHIGH
4.0


µs
Rise time SCL, SDA
tr


1.0
µs
Fall time SCL, SDA
tf


0.35
µs
Data set-up time (write)
tSU, DAT
0.25


µs
Data hold time (write)
tHD, DAT
0


µs
Acknowledge set-up time
tSU, ACK


3.5
µs
Acknowledge hold time
tHD, ACK
0


µs
Stop condition set-up time
tSU,STO
4.0


µs
Synchronizing signal processing circuit (continued)
FBP max. allowable input voltage VAFBP
I2C
Interface
Bus free before start
DAC
L3,6,7
1LSB = {data (max.) − data (00)}/
7, 63, 127
0.1
1.0
1.9
LSB
Step
L8
1LSB = {data (FF) − data (00)}/255
(except 7F → 80)
0.1
1.0
1.9
LSB
Step
8-bit DAC DNLE 80
L8-80
LSB = {data (FF) − data (00)}/255
(7F → 80)
0.1
1.0
2.9
LSB
Step
AFT DAC overlap
∆Step
Overlap of AFT 8-bit 2-stage
changeover
27
32
37
Step
3, 6, 7-bit DAC DNLE
8-bit DAC DNLE
• Typical conditions when testing
1. Input signal
1) VIF: fP = 38.9 MHz, VIN = 90 dBµ
Video modulation : modulated signal is 10-staircase. Modulation m = 87.5%
VIN = 90 dBµ, pin 25 input level approx. 84 dBµ
2) SIF: fS = 6.0 MHz, VIN = 90 dBµ, modulated signal fM = 400 MHz, deviation: PAL±50 kHz, NTSC±25 kHz
3) Video: 10-stair-step 0.6 V[p-p] (VBW = 0.42 V[0-p])
4) Chroma: Color bar signal: Burst level 150 mV[p-p]
Rainbow signal: Burst level 150 mV[p-p]
5) Sync. signal: 0.6 V[p-p]
13
AN5195K-C
ICs for TV
■ Electrical Characteristics (continued)
• Typical conditions when testing (continued)
2. I2C bus conditions: (PAL)
Sub Address
Data (H)
DAC typical condition
Color
Center
00
20
Tint
Center
01
20
Brightness
Center
02
40
Contrast
Center
03
20
Cut-off R
Minimum
04
00
Cut-off G
Minimum
05
00
Cut-off B
Minimum
06
00
Drive R, B
Center
07
40
Video output
Center
08
40
Picture center position
Center
09
01
AFT
Center
0A
20
RF AGC
Center
0B
44
VIF VCO
Center
0C
C0
SW typical condition
PAL mode
RF being inputted state (Video1 in, SIF1 in)
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
Description
Pin 1: Primary color signal clamp pin (R):
1
9V
(VCC1)
300 Ω Pins 1,2,3
2
3
C
0.01 µF
300
Ω
BGP
4
5V
(VCC3)
3.3 V
1V
137 kΩ
4
0.47 µF
270 Ω
2.5 V 1.0 MΩ
BGP
9V
2.8 V
100 µA
14
DC
Pin 2: Primary color signal clamp pin (G): approx. 7 V
Pin 3: Primary color signal clamp pin (B):
• Clamp pulse uses internal clamp
pulse (BGP)
Brightness
control
150 µA
Killer
det.
circuit
DC (V)
Killer filter pin:
• Filter pin for killer detection circuit
(operates for BGP period)
• Killer turns on (without color output) at 2.8 V or less
DC
approx. 3.3 V
ICs for TV
AN5195K-C
■ Terminal Equivalent Circuits (continued)
Pin No.
5
Equivalent circuit
VCC for microcomputer
(5 V)
33 kΩ
175 Ω
To
microcomputer
5
40 µA
Floating
resistor
0.47 µF
On
BGP
0.047 µF
6
40
2.2 µF
kΩ SW
R
7.5 kΩ
2.5 V
1V
Pin for APC filter:
• Filter pin for APC detection circuit
(operates for BGP period)
• Detection sensitivity becomes large
when external R → large (Tends to
pull-in easily. Tends to be affected
by noise)
DC
approx. 2.5 V
β curve
fC
max. 1 mA
VCO
circuit
DC
low-level
0.2 V
high-level
5V
Off
5V
(VCC3)
3.3 V
DC (V)
10 kΩ
6
APC
det.
circuit
Description
Killer, 50 Hz/60 Hz and SECAM det.
output pin:
• Output selecting by SW (I2C bus)
• Connect 33 kΩ load resistor of
pin 5 to microcomputer VCC
270 Ω
V6
• At SECAM, APC circuit is stopped
by short circuiting 40 kΩ
resistor
7
Pin 7: Chroma oscillation pin (4.43 MHz):
8
IP2
100 µA
IN2
100 µA 100 µA
IP1
500 µA
IN1
500 µA
AC
Pin 8: Chroma oscillation pin (3.58 MHz):
f = fC
• Oscillation pin for chroma. Either approx. 0.7 V[p-p]
one of 4.43 MHz or 3.58 MHz is
DC 2.7 V
4.43 MHz
oscillated
7
• Oscillation frequency changeover is
C7
performed by 08−D7 bit of I2C bus
12 pF
• At 08−D7= 0
IP1 and IP2 turn-on and at 4.43 MHz,
DC 2.7V
3.58 MHz
8
oscillation starts
At 08−D7=1
C8
IN1 and IN2 turn-on and at 3.58
15 pF
MHz, oscillation starts
• Pattern design of pin and oscillator
element should be as short as possible.
15
AN5195K-C
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
9
9V
(VCC1)
80 µA
−Y
75 kΩ
10 kΩ
10 kΩ
5.1 V
100 µA
9 To black
expansion circuit
R
180 kΩ
4.7 µF
10
From
microcomputer
0.7 V
2.7 kΩ
10
Black level detection pin:
DC
Blanking off SW pin
approx. 5.1 V
• Black level detection filter pin for
black extension circuit
5V
Holds the most black Y level except
•
(VCC3)
blanking period
80 kΩ
• Changes operating sensitivity (area
judged as black) of black extension
by external R
To blanking
circuit
Responds with small area when R
goes large.
• To stop the black extension, set pin
9 to VCC (9 V).
• Connected to GND, blanking comes
off. (also the black extension is off)
9V
(VCC1)
To RGB output
circuit
50 µA
DC (V)
YS input pin:
• Fast blanking pulse input pin for
external analog RGB
• Turns on at a voltage of 1 V[0-p] or
more and off at 0.4 V[0-p] or less.
AC
(Pulse)
30 kΩ
100 µA
11
100 µA
12
9V
(VCC1)
Pin 11: External R input pin:
AC
Pin 12: External G input pin:
13
Pins 11,12,13
To
color
circuit
Pin 13: External B input pin:
• Output changes linearly according
to input level.
BGP
200 µA

14
15
16
100 µA
17
100 Ω
50 Ω Pins 15
16
17
C out
500 µA
16
9V
(VCC1)
VCC1 (typ. 9 V):
• Output part of VIF and SIF circuit
• AV SW circuit
• Video circuit
• RGB circuit
DC
9V
Pin 15: R-out pin:
AC
Pin 16: G-out pin:
Pin 17: B-out pin:
• BLK level: Approx. 0.9 V
• Black (pedestal) level: Approx. 2.2 V
• Blanking can be released when pin 9
(black level detection pin) is set at 0 V.
ICs for TV
AN5195K-C
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
18
Description
To
chroma
circuit
6.3 V
(VCC2)
5V
(VCC3)
10 kΩ
800 µA
2.8 V
12 kΩ
12 kΩ
I1
800 µA
I2
50 µA
DC (V)
Horizontal sync. detection pin:
DC
• Phase of horizontal synchronizing at synchronous
signal and horizontal output pulse is approx. 6 V
detected and outputted.
at asynchronous
approx. 0.3 V
• Pin 18 is low at out of phase.
• In asynchronous state, color control
becomes min. and chroma output
disappears.
• Pay attention to impedance when
voltage of pin18 is used by microcomputer (ZO ≥ 500 kΩ is required)
Pin 56
H-out
18 ZO
0.022 µF
1 MΩ
Pin 46
HV sync. in
10 kΩ
• HVSYNC period
When pin 56 is high: I1 on
When pin 56 is low: I2 on

19
GND:
• RGB circuit
• DAC I2C circuit
20
9V
(VCC1)
5.9 V
60 kΩ
60 kΩ
To contrast
circuit
6.9 kΩ
2.1 V
2.3 V
Contrast
control
7.1 kΩ
2.3 V
±1 V 100 µA
100 µA
7.1 kΩ
6.9 kΩ
6.9
kΩ
3.5 V
20
4.7 µF
ACL pin:
• Contrast can be reduced when DC
voltage of pin 20 is decreased from
the outside.
• Service SW

DC
approx. 3 V
Note) When pin 20 is used as ACL, set
design must be done not to become
V20 < 0.9 V so that pin 20 operates
also as the service SW.
100 µA
I2C bus data input pin:
21
5V
(VCC3)
100 kΩ
Data
1 kΩ
21
From
microcomputer
AC
(pulse)
50 µA 100 kΩ
1.7 V
ACK
30 kΩ
To logic
circuit
30 kΩ
17
AN5195K-C
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
22
Description
5V
(VCC3)
AC
(Pulse)
50 µA 100 kΩ
100 kΩ
Clock
1 kΩ
22
From
microcomputer
1.7 V
To logic
circuit
30 kΩ
30 kΩ

23
I2C clock input pin:
DC (V)
24
5V
(VCC3)
25
3.5 V
27 kΩ 1.2 1.2
kΩ kΩ
VCC3-1 (typ. 5 V):
• For VIF and SIF circuit
DC
5V
Pin 24: VIF input pin-1:
AC
Pin 25: VIF input pin-2:
• Input for VIF amp. and balanced
input
f = fP
DC level
approx. 2.7 V
25
SAW
24
150 µA150 µA

26
5V
(VCC3)
27
To tuner
27
IF AGC
bias
GND:
• For VIF and SIF circuit
DC
RF AGC output pin:
• Open collector output. Can be used
at given bias
(max. 12 V)
DC
RF AGC
control bias
40
kΩ
28
9V
(VCC1)
270 Ω
100 µA 400 µA
18
28
Audio output pin:
AC
0 kHz
to
20 kHz
ICs for TV
AN5195K-C
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
9V
(VCC1)
29
1.7 kΩ
Detection output
120 kΩ
100 µA
PAL
60 kΩ
29
NTSC
1 200 pF
9V
(VCC1)
30
1.1 kΩ
1.1 kΩ
9V
30
1.1 kΩ
To tuner
40 kΩ 1.1 kΩ
max. 350 µΑ
31
9V
(VCC1)
3.4 V
50 µA
Ext. video
30 kΩ
To
video SW
50 kΩ
31
Description
DC (V)
De-empahsis pin
• De-empahsis filter pin for sound
detection signal.
• External C is the same for PAL and
NTSC (internal impedance changes)
• PAL: 120 kΩ//60 kΩ × 1 200 pF = 48 µs
• NTSC: 60 kΩ × 1 200 pF = 72 µs
AC
0 kHz
to
20 kHz
AFT output pin
• Center voltage offset should be
adjusted by using bus.
• If AFT defeat SW is turned on (09 =
00), V30 comes to a value determined
by the value of externally attached
resistor dividing.
• AFT µ is variable by impedance of
externally attached resistor.
DC
External video input pin
• Input pin for external video signal.
DC cut input.
• Typical 1 V[p-p]
AC
1 V[p-p]
(composite)
10 µF
DC
approx. 2.0 V
100 µA
32
10 kΩ
9V
(VCC1)
1.7 kΩ
32
typ. 4.5 V
1.7 kΩ
3 kΩ
10 µF
3 kΩ
Decoupling pin
• S curve inside IC is wide band but
DC feedback is applied so that DC
voltage of output signal becomes
constant.
• DC level (typ. 4.5 V)
fS → high: V32 → low
DC
20 kΩ
100 µA
13 µA
33
9V
(VCC1)
SIF in
33
4.4 V
10 pF30 kΩ
1.8
kΩ
5 V to 7 V
100 µA
Sharpness
contorol
SIF signal input pin
• Common use with DC input pin for
sharpness control
• DC bias is applied from external
(DC: 5 V to 7 V for sharpness control)
AC+DC
AC
f = fS
30 kΩ
200 µA
9V
100 µA
To SIF
limiter
amp.
19
AN5195K-C
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
9V
(VCC1)
34
5.4 V
50 µA
To
audio SW
65 kΩ
34
10 µF
Description
DC (V)
External audio input pin:
• Input pin for external audio signal
input. DC cut input.
• Typical input level should be adjusted
to internal sound level.
AC
0 kHz
to
20 kHz
SIF signal input pin:
AC+DC
150 µA
35
9V
(VCC1)
100 µA
36
• Input pin of SIF1, SIF2 and is biased
in inside.
AC
f = fS
DC
3.0 V
5V
(VCC3)
IF AGC filter pin:
• Pin for IF AGC filter. The current
obtained from peak AGC circuit is
smoothed by external capacitor.
• Since response becomes faster
when C → small but sag tends to
appear easily.
DC
approx. 2 V
9V
(VCC1)
Internal video input pin:
40 kΩ
SIF in
3.7 V
30 kΩ
30 kΩ
200 µA
1.8
kΩ
Pins 35
36
9V
100 µA
To SIF
limiter
amp.
37
To
IF amp.
37
30 µA
0.47 µF
38
40
50 µA
3.0 V
To
video SW
Int. video
30 kΩ
Pins 38
40
• Input pin for the signal detected in
the VIF circuit (internal video signal)
• Input with DC cut
• Typical input: 1 V[p-p]
AC
1 V[p-p]
(composite)
10 µF
680 kΩ
DC level
approx. 1.6 V
39
9V
(VCC1)
VCO
(4 MHz
to 7 MHz)
P.C.
8.4 kΩ
7.5 kΩ
800 µA
To
audio SW
13 kΩ
2 pF
72 µA
20
39
5.6
kΩ
200 µA
1 000 pF
SIF APC filter pin:
• Filter pin of SIF APC circuit
DC
ICs for TV
AN5195K-C
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
41
9V
(VCC1)
75 µA
VIF detection output pin:
• Adjust to 2 V[p-p] by I2C bus
(uses upper rank 4-bit of 0 A)
DC (V)
AC
2 V[p-p]
41
42
5V
(VCC3)
50 µA
SW
0
1
500 Ω
20 kΩ
3.25 V
APC1 filter pin:
DC
approx. 2.5 V
• Filter pin of VIF APC1 circuit
• VCO lock detection circuit is incorporated in the IC, and it changes
over the time constant of APC filter.
• Lock: SW: 0
Unlock: SW: 1
to
VCO
42
150 Ω
75 µA
0.47 µF
25 µA
43
5V
(VCC3)
100 Ω 300 Ω
VIF oscillation pin:
AC
f = fP /2
• Chage the oscillation coil according
to VIF frequency.
approx. 0.7 V[p-p]
1
DC level
• Oscillation frequency is × fP
2
approx. 3.9 V
43
800 µA 400 µA
100 µA
44
9V
(VCC1)
50 µA
Video output pin:
• Int. video1, int. video2 or ext. video
signal selected by AV SW is outputted.
AC
2 V[p-p]
44
DC level
approx. 4.5 V
400 µA
45
47 kΩ
4.3 V
45
10 µA
1.8 kΩ
43 kΩ
9V
(VCC1)
50 µA
Video input pin:
• Input pin of video signal (possible
also for composite video)
• Typical input 0.6 V[p-p]
• Sync. top is clamped to 3.5 V
• Video signal should be inputted
with low impedance.
AC
0.6 V[p-p]
21
AN5195K-C
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
46
5V
(VCC3)
16 kΩ
16 kΩ
2 V[p-p]
To H
sync. sep.
To V
sync. sep.
1.3 V
RH 0.1 µF
46
270 Ω
CH
1 200 pF
DC (V)
AC
input pin:
• Sync. top is clamped to 1.3 V.
2 V[p-p]
VCC3-2 (typ. 5 V):
• Chroma and Jungle circuit use
DC
5V
20 µA

47
48
Chroma signal input pin:
5V
(VCC3)
Chroma
signal
1 000 pF
Description
Vertical and horizontal sync. separation
12.5 pF
To
chroma amp.
15 kΩ
9V
2.5 V
50 µA
10 kΩ
9V
(VCC1)
AC+DC
Black extension start point adjust-
Burst typ.
ment pin
• Pin 48 is chroma signal input pin
and black extension start point is
adjusted by DC voltage applied
externally.
150 mV[p-p]
DC typ.
4.5 V
48
10 kΩ
To
black level
expansion
100 µA
25 µA

49
50
50 µA 100
µA
100 µA
1.9 V
24 kΩ
0.7 V
To
AFC
60 kΩ
50 µA
To
HBLK
40 kΩ
5V
(VCC3)
50 µA
50
VCC2
51
typ. 15 mA
DC
0V
FBP input:
• FBP input pin for horizontal blanking and APC circuit
• Threshold level HBLK: 0.7 V
AFC: 1.9 V
• If DC 1.3 V is applied from outside,
the state comes to all blanking
AC
FBP
Horizontal stabilized power supply pin:
• Stabilized power supply for horizontal circuit start up. Zener circuit is included inside.
DC
6.3 V
40 kΩ
51
I51
GND:
Video, chroma and jungle circuit use
To hor. OSC
V51
6.3 V
47 µF
I51
22
ICs for TV
AN5195K-C
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
52
2 kΩ
6.3 V
(VCC2)
To hor. out
2 kΩ
1.9V
AFC2
detecter
V52
I
From DAC
(hor. position)
3.3 V
52
1 kΩ
1 kΩ0.022 µF
50 µA
max.500 µA
53
6.3 V
(VCC2)
4.3 V
R1
27 kΩ
AFC1
detecter
27 kΩ
1.5 V
53
Hor. sync.
1 000 µA
DC (V)
DC
1.5 V
to
3.5 V
Horizontal AFC1 filter pin:
• Pulse phase of horizontal sync. signal and IC inside are compared and
capacitor connected to pin 53 is
charged or discharged.
• R1, R2, C1 and C2 are lag-lead filters for AFC1
DC
typ. 4.3 V
Horizontal β curve
22 µF
C2
820 Ω
R2
200 µA
0.033 µF
C1
Hor.
OSC
fH
V53
54
6.3 V
(VCC2)
22 kΩ
300 Ω
100
54 µA
Description
Horizontal AFC2 filter pin:
• Pulse phase of FBP and IC inside are
compared and capacitor connected to
pin 52 is charged or discharged.
• Screen center position adjustment is
executed by charge or discharge of
DC current with DAC.
• According to the time from H-out to
FBP-in, V52 is changed, and slice
level of inside saw-tooth waveform is
changed.
200
µA
80 µA
10 k 10 k
Ω
Ω
Horizontal oscillation pin:
AC
• Oscillation is done at 32 × fH ≅ 503 kHz
f = 32 fH
by ceramic resonator.
(approx. 503 kHz)
• Horizontal and vertical pulse are
made by count-down circuit of IC
inside.
220 pF
55
6.3 V
(VCC2)
4.3 V
20 kΩ 20 kΩ
40 kΩ
3V
To
count down
20 kΩ
55
56
6.3 V
(VCC2)
4.3 V
19 kΩ
Overvoltage protection input pin:
DC
• Input pin for protection circuit
Normally 0 V
against X-ray caused by overvoltage.
• Shut-down is started by inside logic
circuit when H-out is low. (breakdown protection of horizontal drive
TR)
Horizontal pulse output pin:
• Pulse duty approx. 36%
AC
Pulse
50 Ω
56
10 kΩ
40 kΩ
2.8 V
0V
Hor. out
23
AN5195K-C
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
5V
(VCC3)
3 kΩ
57
4.3 V
50 kΩ
16 kΩ
To
ver.
count
down
4 kΩ
270 Ω
57
R2
220 Ω
C1
0.33 µF
200 Ω
R1
330 kΩ
58
5V
(VCC3)
50 kΩ
4.3 V
Description
DC (V)
Vertical sync. signal clamp pin:
• Peak clamp pin in order to separate
vertical sync. signal
• Integrating amount of vertical sync.
signal itself is determined by time
constant of inside but triggering timing is determined by selecting R1
and C1 of external time constant.
• Uses with R1 > 200 kΩ
• R2 is for emitter current limiting resistor
AC
f = fV
Vertical pulse output pin:
• Negative polarity, pulse width 10 H
AC
Pulse
58
43 kΩ
0V
59
9V
(VCC1)
50 µA 12 kΩ
SECAM interface pin:
AC+DC
• Inpu/output pin for interface with
AC
SECAM IC
250 mV[p-p]
• SECAM mode is made by taking the
or
13.7 kΩ
59
curr.
of
100
µA
or
more
from
pin
59.
0
mV[p-p]
50 k
To
Ω
DC
SECAM IC • At SECAM
61.5 kΩ
DC4.4 V+AC250 mV[p-p]
4.4 V
200 µA
100 µA
• At non-SECAM
or
SECAM SECAM
DC1.1 V+AC250 mV[p-p]: 4.43 MHz
1.1 V
detecter
or 0 mV[p-p]: 3.58 MHz
SECAM
fC 56.2 kΩ 12 kΩ
60
61
100 µA
100 µA
5V
(VCC3)
100 µA
−(B−Y)
60
61
−(R−Y)
To 1HDL
Pin 60: −(B−Y) output pin:
Pin 61: −(R−Y) output pin:
• At SECAM, output circuit is off
and comes to high impedance.
• Output to 1HDL
AC
−(B−Y)
−(R−Y)
SECAM
1.5 kΩ
2.5 kΩ
0V
SECAM
62
37 kΩ
15 kΩ
1.5 kΩ
5V
(VCC3)
VBLK
42 kΩ
63 kΩ
62
44 kΩ
HBLK
24
BGP
DC level
approx. 2.1 V
Sandcastle pulse output pin:
• Sandcastle pulse is outputted to
1HDL and SECAM IC.
AC
Pulse
4.7 V
2.4 V
ICs for TV
AN5195K-C
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
63
64
100 µA
Description
9V
(VCC1)
Pins 63,64
To
color
circuit
From
1HDL
DC (V)
Pin 63: −(B−Y) input pin:
AC
Pin 64: −(R−Y) input pin:
• Input color difference signal from
1HDL output .
• Pedestal level is clamped to 4 V by
clamp circuit.
CCP
−(B−Y)
−(R−Y)
DC level
4V
200 µA
■ System Application Example
AN5195K-C (PAL/NTSC)
VIF amp.
Video det.
U/V
tuner
AN5071
Band SW
PNA4602M
IR reciever
unit
SIF amp.
FM det.
AN5265
Sound
output
Video/chroma
signal process
2SC3942
Video output
Deflection
signal process
AN5534
Ver. def.
Ver. output
MN152810
MN1871274
System MCU
AN5637
SECAM
decoder
EEPROM
MN3868
1H CCD
delay line
2SC4212
Hor. drv.
CRT
2SD2522
Hor. output
I2C bus
25
36
30
AFT 150 kΩ 150 kΩ
0.47 µF
37
29
Int.
V1
38
28
39
27
40
26
41
25
20
ACL
19
47
18
C in
48
VCC3
5V
47 µF
49
50
B
16
G
1.5 kΩ
15
R
1.5 kΩ
0.022 µF
52
13
B 47 µF
53
12
G
54
11
R
55
10
YS
56
9
57
8
58
7
59
6
60
5
61
4
62
3
63
2
X-ray protect.
HOSC
H out
0.022 µF
17
14
10 kΩ
680 kΩ
33 pF
GND (RGB/DAC)
1 MΩ
51
220 pF
Ver.
clamp
2.2 µF 220 Ω
12
6
11
0.047 µF
0.1 µF
7
10
0.01 µF
0.22 µF
8
9
7
8
0.1 µF
11
9
180
kΩ
4.7 µF
BL
det. 15 pF
3.58
MHz 12 pF
4.43
MHz
0.47 µF
APC
2.2 µF
0.01 µF
15 kΩ 15 kΩ
0.047 µF
64
1
0.47 µF
0.022 µF
0.022 µF
Killer
1 MΩ
0.022 µF
47 µF
1.8 kΩ
47 µF
1 2
9V
VCC3 = 5 V
26
TU1
8.2 µH
0.47 µF
1 MΩ
33 kΩ
0.1 µF
10
Aidio out
0.47 µF
R
0.1 µF
−(R−Y) −(B−Y)
S.C.P
out
out
12 0.01 µF
In
0.047 µF 6
820 Ω
5
13
0.47 µF
5V
13
5
14
82 µH 82 µH
33 pF 33 pF
14
15 0.01 µF
0.1 µF
4
Video Video
out
in
4
SECAM
51 Ω
47 µF
3
MN3868(1H DL)
15
2
2
16
−(R−Y) −(B−Y)
16
1
0.022 µF 3
0.1 µF
5V
5 4 3 2 1
(8 V)
1
0.1 µF
3.6 kΩ10 kΩ
1.5 kΩ
V out
SECAM interface
4.7 Ω
4.7 µF
180 Ω 3.3 kΩ
VCC2
47 µF
820 Ω10 µF
2 1
4.7 Ω
1 2 3 4 5
46
4 3 2 1
SDA
AN78M05
Trap&DL (340 nsec
±35 nsec)
9V
1 2 3
47 pF
21
AN78M09
Sync. in
1 200 pF
1 000 pF
AFC1
1 kΩ
2.2 kΩ
45
0.01 µF
VCC1 (9 V)
1.8 kΩ
120 pF
1.2 kΩ
100 pF
4.7 µH
10 kBΩ
SCL
0.1 µF
AFC2
0.033 µF
10 kΩ
22
Y in
270 Ω
8.2 µH
44
56 Ω
47 µF
VCC3
U-COM
1 V[p-p]
10 µF
10 kΩ 10 kΩ
GND
(VCJ)
FBP in
1.8 kΩ
23
G
B
Clamp filter
Video out
9V
30 pF56 µH
43
(VIF/SIF)
2.2 kΩ 1 kΩ
150 pF2.7 µH
24
VCC1 = 9 V
VOSC
42
910 Ω
Hor. lock det.
150 Ω 0.47 µF
AN5195K-C
2 V[p-p]
6.5 H
APC1
1.2 µH
1 kΩ
1 2 3 4 5 6 7
680 kΩ
1 200 pF
7.5 kΩ
GND
(VIF/SIF)
0.01 µF
Killer out
50 Hz/60 Hz out
SECAM det. out
910 Ω 910 Ω
0.01 µF
6.8 kΩ
39 kΩ
RF AGC
SAW
SIF
APC
Trap
5.5 H
10 µF
9V
12 H
1 000 pF
130 kΩ Int. V2
De-emphasis
1 200 pF
10 µF
1F BM AFT BL AGC BH BT BU
SIF1 in
0.01 µF
Decoupling
10 µF
3 Band SW
2
4 SW1
1
31
75 Ω
0.39
µH
BPF
5.5
470 Ω
MHz
6.0
MHz
470 Ω
470 Ω 6.5 MHz
BPF
470 Ω
BPF
4.5 MHz
470 Ω
910 Ω
6.0 H
35
680 kΩ
3.58/4.43
On
3.58 MHz
Trap
SIF2 in
AGC
2 kΩ
2 1
32
0.01 µF
910 Ω
10 kΩ
34
10 µF
10 µF Ext. audio in
0.01 µF
Ext.video
SIF3 in
sharpness
0.01 µF
Det. out
10 kΩ
33
(VCJ)
470 Ω
Ext. audio
5.1 kΩ
10 kBΩ
Sharpness
■ Application Circuit Example
10 kBΩ
ICs for TV
+B (12 V)
AN5195K-C
100 µF
10 µF
10 µF
10 µF
10 µF
10 µF
10 µF
47 µF