ICs for TV
AN5192K
Single chip IC with I2C bus Interface for PAL/NTSC color TV system
■ Overview
• Free of mechanical adjustment
Built-in I2C bus interface eliminates the need for
mechanical adjustment
• Rationalization of external components
Built-in chroma trap and BPF reduce the external
components
■ Applications
58.4±0.3
33
1
32
17.0±0.2
64
3.85±0.2
■ Features
Unit: mm
(1.641)
Seating plane
1.778
(1.0)
0.5+0.1
–0.05
(3.3)
0.7 min.
5.2 max.
The AN5192K is a single chip IC for PAL/
NTSC system color TV. TV for multiple systems
can be easily designed by the use of this IC in combination with SECAM demodulation IC (The AN
5637).
19.05
0.25+0.1
–0.05
0° to 15°
SDIP064-P-0750B
• TV, TV with VCR
1
SECAM
-(B-Y)Out
-(R-Y)Out
SCP
-(B-Y)In
2
56
57
58
59
60
61
62
63
-(R-Y)In 64
ACC
amp.
ACC
det.
BPF
1H
FF
detect
G
Cut Off
(8-bit)
*1-bit
Chroma SW
NTSC
amp.
HVBLK
System
SW
*1-bit
R
*1-bit *Drive 8-bit
Drive
Chroma *Cut Off 9-bit
Cut Off
YS
VCO
Pulse
CW
Generate
X-ray 55
Tint
*7-bit
54
APC
53
B
Drive
Cut Off
LPF
*6-bit
I2C Bus
Interface
DAC SW
Out Out
Y
clamp
Y
contrast
APC2
Phase
Shift
IF
amp.
VIF
Detect
*1-bit
(Service)
*7-bit
Sharpness
Black
expansion
Ver.
sync.sep
Trap
APC1
36
29
37
28
*7-bit
RF
AGC
1F
AGC
Level
adjust *4-bit
*9-bit
AFT
VSW
*1-bit
7 dB
*1-bit
*1-bit ASW
Pre-amp.
Deemphasis
VCO
SIF
detect
Limiter
33
R-Y
clamp
V Out
39
G-Y
clamp
50/60Hz
52
B-Y
clamp
H Out
51
*8-bit
HOSC
47
Brightness
AFC1
50
50 Hz/60 Hz
AFC2
49
Killer
Ident
C In 48
BGP
Hor. Sync. 46
Hor.
Lock det.
Ver. Sync. 45
AFC2
*4-bit
Ver. Clamp 44
G-Y
VCC2
40
(50 Hz/60 Hz)
FBP In
38
Hor.
Count
Down
GND(VCJ)
43
Ver.
Count Down
*2-bit
VCC3(VCJ)
42
B-Y
demod
Y In
35
R-Y
demod
+/−
BL DET
41
*1-bit
VOSC
34
Chroma
contrast
APC1
VCO
CV
*7-bit
clamp
*1-bit
DET Out
Hor.
sync.sep
Internal Video In
Hor. SCP HBLK
Reg.
APC
Shut
HVCO
Down
AFC1
Video Out
Ver.
out
IF AGC
PN/S
SW
SIF In
*7-bit
Ext. Audio
Saturation
AN5192K
ICs for TV
■ Block Diagram
32
31
30
27
26
25
24
23
22
21
20
19
18
17
16
15
12
11
10
9
8
7
6
5
4
3
2
1
Decoupling
Ext. Video
AFT Out
De-emphasis
Audio Out
RF AGC Out
GND (IF)
VIF In 2
VIF In 1
VCC3 (IF)
SCL
SDA
ACL
GND (RGB)
Lock DET
B Out
G Out
14
R Out
VCC1
13
B In
G In
R In
YS
Spot Killer
3.58 MHz
4.43 MHz
APC
Killer Out
Killer
B Clamp
G Clamp
R Clamp
ICs for TV
AN5192K
■ Pin Description
Pin No.
Description
Pin No.
Description
1
(R-Y) Clamp
33
External Audio Input
2
(G-Y) Clamp
34
SIF Input/DAC Output
3
(B-Y) Clamp
35
IF AGC Filter
4
Killer Filter
36
Video Output
5
Killer Output
37
SIF APC Filter
6
Chroma APC Filter
38
Internal Video Input
7
Chroma VCO (4.43 MHz)
39
VIF Detect Output
8
Chroma VCO (3.58 MHz)
40
VIF APC1 Filter
9
Spot Killer
41
VIF VCO (fP/2)
10
Ys Input (Fast blanking)
42
Black Level Det./Blank off SW
11
External R Input
43
Y Input
12
External G Input
44
Ver.Sync.Clamp
13
External B Input
45
Ver.Sync.Input
14
VCC1
46
Hor.Sync.Input
15
R Output
47
VCC3-2 (Chroma/Jungle/DAC)
16
G Output
48
Chroma Input/Black Expansion Start
17
B Output
49
GND (Video/Chroma/Jungle)
18
Hor.Lock Detect
50
FBP Input
51
VCC2 (Hor.Stability Supply)
(RGB/I2C/DAC)
19
GND
20
ACL
52
AFC2 Filter
21
SDA
53
AFC1 Filter
22
SCL
54
Hor.VCO (32 fH)
23
VCC3-1 (VIF/SIF)
55
X-ray Protection Input
24
VIF Input 1
56
Hor.Pulse Output
25
VIF Input 2
57
50 Hz/60 Hz Detect Output
26
GND (VIF/SIF)
58
Ver. Pulse Output
27
RF AGC Output
59
SECAM Interface
28
Audio Output
60
-(B-Y) Output
29
De-emphasis
61
-(R-Y) Output
30
AFT Output
62
Sandcastle Pulse Output
31
External Video Input
63
-(B-Y) Input
32
DC Decoupleling Filter
64
-(R-Y) Input
3
AN5192K
ICs for TV
■ Absolute Maximum Ratings
Parameter
Symbol
Supply voltage
VCC
Supply current
Power dissipation
Rating
VCC1 (14)
10.5
VCC3 (23, 47)
6.0
I14
77
I23+47
119
I51
27
ICC
*2
Operating ambient temperature
Storage temperature
*1
*1
Unit
V
mA
PD
1 372
mW
Topr
−20 to +70
°C
Tstg
−55 to +150
°C
Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2: The power dissipation shown is the value for Ta = 70°C.
■ Recommended Operating Range
Parameter
Symbol
Range
Unit
Supply voltage
VCC1
8.1 to 9.9
V
Supply voltage
VCC3
4.5 to 5.5
V
Supply current
I51
10 to 25
mA
■ Electrical Characteristics at Ta = 25°C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Power supply (DAC Data are typical)
Supply current 1
I14
Current at V14 = 9 V
44
55
66
mA
Supply current 2
I23
Current at V23 = 5 V
8
11
14
mA
Supply current 3
I47
Current at V47 = 5 V
56
71
85
mA
Stabilized power supply voltage
V51
Voltage at I51 = 15 mA
5.8
6.5
7.2
V
Stabilized power supply current
I51
Current at V51 = 5 V
2
5
7
mA
Stabilized power supply input
resistance
R51
DC measurement
Gradient between I51 = 10 mA and
25 mA
1
5
10
Ω
Modulation m = 87.5%
Data 0A = 88
1.75
2.1
2.5
V[p-p]
VIF circuit (Typical input fP = 38.9 MHz, VIN = 90 dBµ, DAC Data are typical)
4
Video detection output (typ.)
VPO
Video detection output (max.)
VPOmax
Data 0A = F8
2.15
2.6
3.3
V[p-p]
Video detection output (min.)
VPOmin
Data 0A = 08
1.1
1.6
2.0
V[p-p]
Video detection output f characteristics
fPC
Frequency to become −3 dB for 1 MHz
5.5
8
12
MHz
Sync. peak value voltage
VSP
Sync. peak voltage in VPO measurement
1.6
2.0
2.4
V
APC pull-in range (high)
fPPH
High band side pull-in range
(Difference from fP = 38.9 MHz)
1.0
2.0
MHz
ICs for TV
AN5192K
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VIF circuit (continued) (Typical input fP = 38.9 MHz, VIN = 90 dBµ, DAC Data are typical)
APC pull-in range (low)
RF AGC delay point adjusting range
VCO free-running frequency
fPPL
∆VRFDP
∆fP
Low band side pull-in range
(Difference from fP = 38.9 MHz)
−2.0
−1.0
MHz
Input to become delay point (V27 =
approx. 6.5 V) at Data 0C = 00 to 7F
75
95
dBµ
0
1.2
MHz
Dispersion without input VIN,
−1.2
V36 (IF AGC) = 0 V (Measurement
of difference from 38.9 MHz)
RF AGC maximum sink current
IRFmax
Maximum current IC can sink when
pin 27 is low
1.5
3.0
mA
RF AGC minimum sink current
IRFmin
IC leakage current at which pin 27
is high
−50
0
50
µA
AFT discrimination sensitivity
µAFT
Df = ±25 kHz
40
57
75
mV/kHz
AFT center voltage
VAFT
V30 without input VIN
4.0
4.5
5.0
V
AFT maximum output voltage
VAFTmax
V30 at f = fP − 500 kHz
7.8
8.1
8.7
V
AFT minimum output voltage
VAFTmin
V30 at f = fP + 500 kHz
0.3
0.8
1.0
V
DC measurement
70
120
170
Ω
Output DC voltage in AV SW
external mode (04 − D6 = 1)
0.5
1.0
1.8
V
Detection output resistance
External mode output DC voltage
RO39
V39EXT
SIF circuit (Typical input fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ)
Audio detection output (PAL)
VSOP
∆f = ±50 kHz
0D − D7 = 0, R237 = 560 kΩ
480
600
720
mV[rms]
Audio detection output (NTSC/PAL)
RSN/P
∆f = ±25 kHz, R237 = 560 kΩ
0D − D7 = 1, ratio to PAL
−2.5
− 0.5
1.5
dB
Audio detection output linearity
∆VSOP
Ratio of at fS = 6.0 MHz to 6.5 MHz,
and to 5.5 MHz (270 kΩ addition
between pin 37 and VCC1)
−2.5
0
2.5
dB
SIF pull-in range (PAL)
fSPP
PAL mode (0D − D7 = 0) pull-in
range R237 = 560 kΩ
5.7
6.8
MHz
SIF pull-in range (NTSC)
fSPN
NTSC mode (0D − D7 = 1) pull-in range
range R237 = 560 kΩ
4.2
4.8
MHz
SIF pull-in range (5.5 MHz)
fSP5.5
PAL mode (0D − D7 = 0)
270 kΩ addition between pin 37 and VCC1
5.2
5.8
MHz
SIF input resistance
RI34
DC measurement
8
10
12
kΩ
De-emphasis pin output resistance (PAL)
R29P
Impedance of pin 29 at PAL
32
40
48
kΩ
De-emphasis pin output resistance (NTSC)
R29N
Impedance of pin 29 at NTSC
48
60
72
kΩ
Video SW voltage gain
GVSW
f = 1 MHz, VIN = 1 V[p-p]
6.2
7.2
8.2
dB
Video SW f characteristics
fVSW
Frequency to become −3 dB from f = 1 MHz
10
MHz
AV SW circuit
5
AN5192K
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
AV SW circuit (continued)
Video SW external input pin voltage
V31
DC measurement
1.7
2.0
2.3
V
Video SW external output DC voltage
V36E
DC measurement Data 04 − D6 = 1
4.2
4.8
5.4
V
Video SW external input resistance
RI31
DC measurement
44
56
68
kΩ
Video SW output resistance
RO36
DC measurement
100
140
180
Ω
Audio SW voltage gain
GASW
Data 04 − D6 = 1 (Outside)
f = 400 Hz, VIN = 1 V[p-p]
−1
0
1
dB
Audio SW input pin voltage
V33
DC measurement
3.7
4.2
4.7
V
Audio SW input output DC voltage
V28
DC measurement
3.7
4.2
4.7
V
Audio SW input resistance
RI31
DC measurement
61
72
83
kΩ
Audio SW output resistance
RO28
DC measurement
200
400
600
Ω
Video SW internal clamp pin voltage
V38
DC measurement
1.3
1.6
1.9
V
Video SW internal output DC voltage
V36I
DC measurement, Data 04 − D6 = 0
3.1
3.7
4.3
V
Video signal processing circuit (In the following test conditions, the measurements are made with input 0.6 V[p-p]
(VWB = 0.42 V[0-p]) stair-step, G-out.)
1.65
2.1
2.55
V[p-p]
VYOmax
Data 03 = 7F (max.)
3.6
4.5
5.35
V[p-p]
VYOmin
Data 03 = 00 (min.)
0.07
0.25
0.5
V[p-p]
20
25
33
dB
5.5
6.8
MHz
9
13
17
dB
Data 02 = 80 (typ.) (Brightness)
1.9
2.5
3.1
V
VYO
Video output (max.)
Video output (min.)
Contrast variable range
Video frequency characteristics
Picture quality variable range
Pedestal level (typ.)
6
Data 03 = 40 (typ.) (Contrast)
Video output (typ.)
YCmax/min 03 = 7F
03 = 00
fYC
Data 0E − D1 = 1(Trap Off)
Data 04 = 00 (Sharpness)
Frequency to become −3 dB from
f = 0.2 MHz
YSmax/min 04 = 3F
04 = 00
VPED
f = 3.8MHz
Data 0E − D1 = 1
Pedestal level variable width
∆VPED
Difference between Data 02 = 00 and FF
2.0
2.6
3.2
V
Brightness control sensitivity
∆VBRT
Average amount of change for 1
Step between Data 02 = 60 and A0
7
11
14
mV/Step
Video input clamp voltage
VYCLP
Clamp voltage of pin 43
3.2
3.7
4.2
V
ACL sensitivity
ACL
Change of Y-out when V20 = 3.0 V→3.5 V
2.1
2.7
3.2
V/V
Blanking Off threshold voltage
VBOFF
Maximum blanking Off voltage
in lowering pin 42 voltage
0.3
0.5
0.9
V
Blanking level
VYBL
DC voltage of blanking pulse
0.5
1.0
1.5
V
DC restoration ratio
TDC
APL 10% to 90%
∆AC − ∆DC
TDC =
× 100
∆AC
90
100
110
%
ICs for TV
AN5192K
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Video signal processing circuit (continued) (In the following test conditions, the measurements are made with
input: 0.6 V[p-p] (VWB = 0.42 V[0-p] stair-step) at G-out.)
Video input clamp current
IYCLP
DC measurement: IC inside sink current
8
13
18
µA
ACL start point
VACL
V20 at which output amplitude becomes
90% in decreasing ACL pin (V20)
from 5 V
3.4
3.7
4.0
V
Color signal processing circuit (In the following test conditions, burst 300 mV[p-p] (PAL) and reference is B-out)
Color-difference output (typ.)
VCO
Input: Color bar
Data 00 = 40 (typ.), 03 = 40 (typ.)
2.6
3.3
4.0
V[p-p]
Color-difference output (max.)
VCOmax
Data 00 = 7F amplitude of one side
Data 03 = 40
2.3
3.0
V[0-p]
Color-difference output (min.)
VCOmin
Data 00 = 00
Data 03 = 40
0
100
mV[p-p]
Data 00 = 40
20
25
33
dB
Contrast variable range
CCmax/min 03 = FF
03 = 00
ACC characteristics 1
ACC1
Burst 300 mV[p-p]→600 mV[p-p]
Input; Rainbow
0.9
1.0
1.2
Time
ACC characteristics 2
ACC2
Burst 300 mV[p-p]→60 mV[p-p]
Input; Rainbow
0.7
1.0
1.1
Time
NTSC tint center
∆θC
Difference from Data = 01 = 40
(Tint) at which tint is adjusted to center.
−13
0
+13
Step
NTSC tint variable range 1
∆θ1
Data 01 = 7F
30
50
65
deg
NTSC tint variable range 2
∆θ2
Data 01 = 00
−65
−50
−30
deg
Color-difference output ratio (R)
R/B
Input; Rainbow for both PAL/NTSC
0.71
0.83
0.95
Time
Color-difference output ratio (G)
G/B
Input; Rainbow for both PAL/NTSC
0.31
0.37
0.43
Time
Color-difference output angle (R)
∠R
Input; Rainbow for both PAL/NTSC
78
90
102
deg
Color-difference output angle (G)
∠G
Input; Rainbow for both PAL/NTSC
224
236
248
deg
PAL color killer tolerance
VKillP
0 dB = 300 mV[p-p]
−57
−44
−34
dB
NTSC color killer tolerance
VKillN
0 dB = 300 mV[p-p]
−57
−44
−34
dB
APC pull-in range (high)
fCPH
For both PAL/NTSC
450
900
Hz
APC pull-in range (low)
fCPL
For both PAL/NTSC
−900
−450
Hz
Color killer detection output voltage
(Color)
VKC
V5 measured when chroma is input
4.5
5.0
V
Color killer detection output voltage
(B&W)
VKBW
V5 measured when no chroma is
input
0
0.1
0.5
V
Demodulation output-(B-Y)
VDB
Input; Color bar, measurement by pin 60
555
695
835
mV[p-p]
Demodulation output-(R-Y)
VDR
Input; Color bar, measurement by pin 61
430
540
650
mV[p-p]
Demodulation output angle ∠B
∠RDB
Phase shift of B-Y axis
−5
0
5
deg
7
AN5192K
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Color signal processing circuit (continued) (In the following test conditions, burst 300 mV[p-p] (PAL) and reference is B-out)
Demodulation output angle ∠R
∠RDR
Phase difference from B-Y axis
85
90
95
deg
CW output level (4.43 MHz)
VCWP
AC component when VCO is set at
4.43 MHz
250
300
350
mV[p-p]
CW output level (3.58 MHz)
VCWN
AC component when VCO is set at
3.58 MHz
0
50
mV[p-p]
CW output level period (SECAM)
TCW
CW output period at SECAM
1.31
1.41
1.51
ms
SECAM discrimination current
ISECAM
Minimum value for taking out current
from pin 59 and discriminating as
SECAM
50
100
150
µA
PAL/NTSC DC level
V59PN
V59 DC level at PAL/SECAM
0.8
1.3
1.65
V
SECAM DC level
V59S
V59 DC level at SECAM
4.1
4.6
5.1
V
PAL/NTSC
output impedance
R60,61PN
DC measurement. pin 60, 61
impedance at PAL/NTSC
390
480
570
Ω
SECAM
output impedance
R60,61S
DC measurement. pin 60, 61
impedance at SECAM
100
kΩ
RGB Processing Circuit (DAC Data are typical)
Pedestal difference voltage
∆VIPL
Difference voltage of R,G,B out pedestal
0
0.3
V
Brightness voltage tracking
∆TBL
R, G, B out fluctuation level ratio
of DATA 02 (Brightness) 02 = 40 to C0
0.9
1.0
1.1
Time
Video voltage gain relative ratio
∆GYC
Output ratio of R,B out to G out
0.8
1.0
1.2
Time
∆TCONT
Gain ratio of R, G, B out of Data 03
(Contrast) 03 = 20 to 60
0.9
1.0
1.1
Time/
Time
GDV
AC change amount of R, B out between
drive adjustment max. and min.
5.3
6.3
7.3
dB
1.9
2.2
2.5
V
Video voltage gain tracking
Drive adjustment range
Cut-off adjustment range
VCUT-OFF DC change amount of R, G, B out
between cutoff adjustment at max.
and min.
YS threshold voltage
VYS
Minimum DC voltage, when YS turns on
0.7
1.0
1.3
V
External RGB pedestal voltage
VEPL
YS is On
1.7
2.3
2.9
V
External RGB pedestal difference
voltage
∆VEPL
YS is On
0
250
mV
Internal and external pedestal
difference voltage
∆VPL/IE
Internal-external
50
200
400
mV
External RGB output voltage
VERGB
Input 3 V[p-p], contrast 03 = 7F
4.3
5.4
6.5
V[p-p]
Input 3 V[p-p], contrast 03 = 7F
− 0.6
0
0.6
V
10
13
16
dB
8
12
MHz
External RGB output difference voltage ∆VERGB
External RGB contrast variable range ECmax/min 03 = 7F
03 = 00
External RGB frequency characteristics
8
fRGBC
Input 0.2 V[p-p], DC = 1 V
ICs for TV
AN5192K
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
15.33 15.63 15.93
kHz
Synchronizing signal processing circuit
Horizontal free-running oscillation frequency
fHO
Without sync. signal input
Horizontal output pulse duty cycle
τHO
Upward going pulse duty cycle
Horizontal pull-in range
fHP
PAL vertical free-running oscillation
frequency
31
37
43
%
Difference from fH = 15.625 kHz
±500
±650
Hz
fVO-P
Data 0E − D2 = 1, D3 = 0
Forced 50 Hz mode, no sync. signal input
48
50
52
Hz
NTSC vertical free-running oscillation
frequency
fVO-N
Data 0E − D2 = 1, D3 = 1
Forced 60 Hz mode, no sync. signal input
58
60
62
Hz
Vertical output pulse width
τVO
For both PAL/NTSC
9
10
11
1/fH
PAL vertical pull-in range
fVP-P
fH = 15.625 kHz, forced 50 Hz mode
46
54
Hz
NTSC vertical pull-in range
fVP-N
fH = 15.75 kHz, forced 60 Hz mode
56
64
Hz
Horizontal output voltage (high)
V56H
High level DC voltage
3.2
3.5
3.8
V
Horizontal output voltage (low)
V56L
Low level DC voltage
0
0.3
V
Vertical output voltage (high)
V58H
High level DC voltage
3.9
4.2
4.5
V
Vertical output voltage (low)
V58L
Low level DC voltage
0
0.3
V
Picture center variable range
∆THC
Change amount of phase difference
between H Sync. and H-out of
Data 0A = 80 to 8F
2.6
3.2
4.4
µS
Overvoltage protective operation voltage VXRAY
Pin 55 minimum voltage at which
H-out stops to appear
0.60
0.68
0.76
V
Vertical frequency discrimination (50)
f50
Vertical frequency to become V57
= Low (< 0.5 V)
47
55
Hz
Vertical frequency discrimination (60)
f60
Vertical frequency to become V57
= High (> 4.5 V)
57
63
Hz
Sync. signal clamp voltage (Ver.)
V45
Clamp voltage of V45
1.0
1.3
1.6
V
Sync. signal clamp voltage (Hor.)
V46
Clamp voltage of V46
1.0
1.3
1.6
V
Horizontal output start voltage
VfHS
Minimum V50 to become f0 > 10 kHz,
when horizontal oscillation output
is 1 V[p-p] or more.
3.4
4.2
5.0
V
Sink current when ACK
IACK
Maximum value of pin 21 sink
current at ACK
2.0
2.5
5.0
mA
SCL, SDA signal input high level
VIHI
3.1
5.0
V
SCL, SDA signal input low level
VILO
0
0.9
V
Maximum frequency allowable to input
fImax
100
Kbit/s
I2C interface
9
AN5192K
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VPS
Input level to become VPO = −3 dB
45
51
dBµ
VPmax
Input level to become VPO = 1 dB
104
110
dBµ
VIF circuit (Typical input fP = 38.9 MHz, VIN = 90 dBµ)
Input sensitivity
Maximum allowable input
SN ratio
SNP
50
53
dB
Differential gain
DGP
0
3
5
%
Differential phase
DPP
0
3
5
deg
Black noise detection level
∆VBN
Deference from sync. peak value
−55
−45
−35
IRE
Black noise clamp level
∆VBNC
Deference from sync. peak value
35
45
35
IRE
RF AGC operation sensitivity
GRF
Input level difference to become
V27 = 1 V→7 V
0.5
1.5
3.0
dB
VCO switch On drift
∆fPD
Frequency drift from 5 seconds to
5 mins. after SW On
100
150
200
kHz
Intermodulation
IM
VfC − VfP = −2 dB, VfS − VfP = −12 dB
46
52
dB
RF AGC adjustment sensitivity
SRF
Average amount of change of output
voltage V27 at Data 1Step
1.0
1.7
2.5
V/Step
AFT offset adjustment sensitivity
SAFT
Average amount of change of output
voltage V30 per Data 1Step
0.15
0.2
0.25
V/Step
Video detection output fluctuation
with VCC
∆VP/V
VCC = ±10%
±10
±15
%
Video detection output-temperature
characteristics
∆VP/T
Ta = −10°C to +70°C
±5
±10
%
Input resistance (pin 24, 25)
RI24, 25
f = 38.9 MHz
1.2
kΩ
Input capacitance (pin 24, 25)
CI24, 25
f = 38.9 MHz
4.0
pF
fS = 38.9 MHz − 6.0 MHz, P/S = 20 dB
94
100
106
dBµ
∆V41 = ±0.1 V
2.0
2.7
3.5
kHz/mV
Free-running frequency change
width from Data 0D = 00 to 7F
3.0
4.0
5.0
MHz
Sound IF output level
VCO control sensitivity
VCO control range
RF AGC delay-point temperature
characteristics
VCO free-running frequency
temperature characteristics
AFT center frequency
temperature characteristics
10
VSIF
βP
fVCO
∆VDP/T
Ta = −20°C to +70°C
0
3
5
dB
∆fP/T
Ta = −20°C to +70°C
300
kHz
Ta = −20°C to +70°C, input
frequency at which AFT output
voltage becomes 4.5 V
300
kHz
∆fAFT/T
ICs for TV
AN5192K
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SIF circuit (Typical input fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ)
Input limiting level
VLIM
Input level to become VSOP = −3 dB
44
50
dBµ
AM rejection ratio
AMR
AM = 30%
60
70
dB
Total harmonic distortion
THD
∆f = ±50 kHz
0
0.3
0.5
%
SN ratio
SNA
50
55
dB
Audio output with VCC fluctuation
∆VS/V
VCC = ±10%
±3
±6
%
Audio output-temperature characteristics
∆VS/T
Ta = −20°C to +70°C
±5
±10
%
Video SW cross-talk
CTVSW
f = 1 MHz, VIN = 1 V[p-p]
Internal→External、
External→Internal
−66
−60
dB
Audio SW cross-talk
(Internal→External)
CTAIE
fS = 6.0 MHz, fM = 400 Hz
Without input from outside
−73
−67
dB
Audio SW cross-talk
(External→Internal)
CTAEI
fS = 6.0 MHz, fM = 0 Hz
fM = 400 Hz, VIN = 600 mV[rms]
−73
−67
dB
AV SW circuit
Video signal processing circuit (In the following test conditions, the measurements are made at G-out with input 0.6 V[p-p]
(VWB = 0.42 V[0-p]). )
Y signal delay time
TDL
Phase difference from Y input
(PAL: 4.43 MHz)
620
690
790
ns
Black level extension1
VBL1
Input: Total black, difference between
pin 42 of 9 V and Open (With RC
filter)
−100
0
100
mV
Black level extension2
VBL2
Input: Total black, difference between
pin 42 of 3 V and 9 V
500
800
1100
mV
Black level extension3
VBL3
Input: approx. 20IRE, voltage difference 100
between pin 42 of Open and 9 V
300
500
mV
Contrast variation with sharpness
∆VCS
Y-out output level difference between
sharpness max. and min.
−300
0
300
mV
Brightness variation with sharpness
∆VBS
Pedestal level DC difference between
sharpness is at max. and min.
−250
0
250
mV
Input dynamic range
VImax
Contrast 03 = 40
1.0
1.7
V[p-p]
Y signal SN ratio
SNY
Contrast 03 = 7F
51
56
dB
Black level extension start point
VBLS
Start point at V48 = 4.5 V
37
42
47
IRE
Trap on/off gain difference
∆GTRAP
Trap on/off
−1
0
1
dB
Trap on/off
delay time change amount
∆TTRAP
Trap on/off
350
390
430
ns
11
AN5192K
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Video signal processing circuit (continued) (In the following test conditions, the measurements are made at G-out
with input 0.6 V[p-p] (VWB = 0.42 V[0-p]).
Trap frequency error
Trap attenuation amount
Trap automatic adjustment range
Trap fixed frequency
Video output fluctuation with VCC
∆fTRAP
ATT TRAP Attenuation amount of 4.43 MHz,
when chroma input is 4.43 MHz
0
70
kHz
26
30
dB
fTRAP
VCO frequency of ∆fTRAP ≤ 70 kHz
3
5
MHz
fST
Data 0E − D6 = 1, Trap frequency
4.0
4.8
5.6
MHz
VCC1 = 9 V (allowance: ±10%)
0
100
200
mV/V
Ta = −20°C to +70°C
0
5
10
%
Trap On (NTSC-PAL)
−10
10
30
ns
∆VY/V
Video output-temperature characteristics ∆VY/T
PAL/NTSC delay time difference
Trap center frequency, when chroma −70
input is 4.43 MHz
∆TP/N
Color signal processing circuit (Burst 300 mV[p-p] (PAL), reference is B-out)
Demodulation output residual carrier
VCAR1
2fSC level of pin 60 and 61
0
30
mV
Color difference output residual carrier
VCAR2
2fSC level of pin 15, 16, and 17
0
50
mV
VCO free-running frequency (PAL)
fCP
Difference from f = 4.433619 MHz −300
0
300
Hz
VCO free-running frequency (NTSC)
fCN
Difference from f = 3.579545 MHz −300
0
300
Hz
fCO fluctuation with VCC
∆VC/V
VCC1 = 9 V (allowance: ±10%),
VCC3 = 5 V (allowance: ±10%)
−300
0
300
Hz
Static phase error (PAL)
∆θP
Tint shift from ∆fC = −300 Hz to
+300 Hz change
0
2
5
deg/
100 Hz
Static phase error (NTSC)
∆θN
Tint shift from ∆fC = −300 Hz to
+300 Hz change
0
2
5
deg/
100 Hz
PAL/NTSC
RP/N
Output amplitude ratio of PAL
to NTSC
0.8
1.0
1.2
Time
Pin 61: Output amplitude difference
per 1H for-(R-Y) pin
0
50
mV
Band to become −3 dB
1.0
MHz
Line crawling
Color difference output bandwidth
∆VPAL
fCC
Chroma BPF characteristics (PAL)
BPFP
Output level difference between
f = 4.43 MHz and 3.58 MHz
10
dB
Chroma BPF characteristics (NTSC)
BPFN
Output level difference between
f = 3.58 MHz and 2.0 MHz
(when Ext. video)
13
dB
Color-difference output
fluctuation with VCC
∆VC/V
VCC1 = 9V (allowance: ±10%)
VCC3 = 5V (allowance: ±10%)
±10
±15
%
Color-difference output
-temperature characteristics
∆VC/T
Ta = −20°C to +70°C
±10
±15
%
12
ICs for TV
AN5192K
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Color signal processing circuit (continued) (Burst 300 mV[p-p] (PAL), reference is B-out)
Brightness variation with color
VBC
Brightness variation difference
voltage with color
∆VBC
R, G, B out variation voltage
difference
(C-Y)/Y
RC/Y
Color bar input, B-out
Contrast typ., color Data 00 = 60
(C-Y), Y delay difference
∆TC/Y
Color bar input, B-out
Phase of green→magenta
Pedestal level DC difference
between at contrast max. and min.
−250
0
250
mV
0
20
mV
0.9
1.2
1.5
V[0-p]/
V[p-p]
−100
0
100
ns
7
11
MHz
RGB processing circuit
YS changeover speed
fYS
fYS, when external input is 3 V,
output level −3 dB
External RGB input dynamic
range
VDEXT
Contrast max., Data 03 = 77F
2.0
2.5
3.2
V[0-p]
Internal/external crosstalk
CTRGB
Leakage when f = 1 MHz, 1 V[p-p],
and YS = 5 V
−60
−50
dB
Spot killer operation
VSPK
V9, when V9 is decreased from 9 V
and spot killer turns on.
7.4
7.8
8.2
V
Brightness variation with contrast
VBAC
Pedestal level DC difference between
contrast max. and min.
−250
0
250
mV
Brightness variation difference
voltage with contrast
∆VBAC
R, G, B out variation voltage
difference
0
20
mV
Pedestal level fluctuation with VCC
∆VPL/V
VCC1 = 9 V (allowance: ±10%)
0
200
400
mV/V
Pedestal level- temperature
characteristics
∆VPL/T
Ta = −20°C to +70°C
−2.6
−2.2
−1.8 mV/°C
Pedestal level, when G cutoff
Data 05 = 18
2.1
2.7
3.3
V
VLD
V18 at horizontal AFC lock
5.7
6.3
6.9
V
ILD
DC measurement
±0.6
±0.8
±1.1
mA
0.4
0.75
1.1
V
Minimum voltage of pin 50 at which
AFC2 operates
1.5
1.9
2.3
V
Pedestal level 2
VPD2
Synchronizing signal processing circuit
Lock detection output voltage
Lock detection charge and discharge current
EBP (RGB) slice level
VFBP
Minimum voltage of pin 50, when
blanking is applied to RGB output
EBP (AFC2) slice level
VFBPH
Horizontal AFC µ
µH
DC measurement
30
37
44
µA/µs
Horizontal VCO β
βH
β curve gradient near f = 15.7kHz
1.4
1.9
2.4
Hz/mV
PBGP
For both PAL/NTSC, delay from
H. Sync. rise
0.2
0.4
0.6
µs
Burst gate pulse position
13
AN5192K
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Synchronizing signal processing circuit (continued)
PAL burst gate pulse width
WBGPP
3.4
4.0
4.6
µs
NTSC burst gate pulse width
WBGPN
2.5
3.0
3.5
µs
Burst gate pulse output voltage
VBGP
DC voltage of pin 62 in BGP period
4.5
4.7
4.9
V
H blanking pulse output voltage
VHBLK
DC voltage in H-blanking pulse
period of pin 62
2.1
2.4
2.7
V
V blanking pulse output voltage
VVBLK
DC voltage in V-blanking pulse
period of pin 62
2.1
2.4
2.7
V
PAL V blanking pulse width
WVP
Pulse width at fH = 15.625 kHz
1.31
1.41
1.51
ms
NTSC blanking pulse width
WVN
Pulse width at fH = 15.73 kHz
1.01
1.11
1.21
ms
FBP allowable range
TFBP
Time from H-out rise to FBP center
12
19
µs
tBUF
4.0
µs
Start condition set-up time
tSU.STA
4.0
µs
Start condition hold time
tHD.STA
4.0
µs
Low period SCL, SDA
tLOW
4.0
µs
High period SCL
tHIGH
4.0
µs
Rise time SCL, SDA
tr
1.0
µs
Fall time SCL, SDA
tf
0.35
µs
Data set-up time (write)
tSU.DAT
0.25
µs
Data hold time (write)
tHD.DAT
0
µs
Acknowledge set-up time
tSU.ACK
3.5
µs
Acknowledge hold time
tHD.ACK
0
µs
Stop condition set-up time
tSU.STO
4.0
µs
I2C
interface
Bus free before start
DAC
4, 6, 7bit DAC DNLE
8bit DAC DNLE
Cut off DAC overlap
14
L4, 6, 7
1LSB = {Data (max.)-Data (00)}
/15,63,127
0.1
1.0
1.9
LSB
Step
L8
1LSB = {Data (FF) − Data (00)}/255
0.1
1.0
1.9
LSB
Step
∆Step
Overlap of 8-bit 2-stage changeover
(Same for AFT) of R, B cut-off
27
32
37
Step
ICs for TV
AN5192K
■ Electrical Characteristics at Ta = 25°C (continued)
• Typical conditions when testing
1. Input signal
1) VIF
: fP = 38.9 MHz, VIN = 90 dBµ
Video modulation: modulated signal is 10-staircase. Modulation m = 87.5%
VIN = 90 dBµ, pin 25 input level approx. 84 dBµ
: fS = 6.0 MHz, VIN = 90 dBµ, modulated signal fM = 400 Hz, Deviation: PAL ±50 kHz,
NTSC ±25 kHz
: 10-staircase 0.6 V[p-p] (VBW = 0.42 V[0-p])
2) SIF
3) Video
4) Chroma
: Color bar signal: Burst level 300 mV[p-p]
: Rainbow signal : Burst level 300 mV[p-p]
5) Sync. signal : Video signal 1.5V[p-p] to 2.5 V[p-p] for both horizontal and vertical sync. signal input
2.
I2C BUS conditions: (PAL)
Sub Address
Data(H)
00
40
Color
00 = 40
01
40
Tint
01 = 40
02
80
Brightness
02 = 80
03
40
Contrast
03 = 40
04
80
Sharpness
04 = 00
05
00
Cut-off R, B
06
00
Cut-off G
06 = 00
07
00
Drive R, B
08, 09 = 80
08
80
Video output
09
80
Picture center position 0A (Lower rank) = ∗8
0A
88
AFT
0B
01
0C
40
RF AGC
0C = 40
0D
40
VIF VCO
0D = 40
0E
01
Control
Data(H)
05, 07 = 00
0A (Upper rank) = 8∗
0B = 01
04 − D7 = 1
15
AN5192K
ICs for TV
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
1
2
3
Description
9V
(VCC1)
pin
1,
2, 3
300 Ω
C-Y
0.068 µF
300
Ω
BGP
Brightness
control
150 µA
4
5V
(VCC3)
3.3 V
137 kΩ
1V
4
270 Ω
1.0 MΩ
Killer
det.
circuit
2.5 V
Pin 1: Color difference signal clamp
pin (R-Y)
Pin 2: Color difference signal clamp
pin (G-Y)
Pin 3: Color difference signal clamp
pin (B-Y)
• Color difference signal inputted from
pin 63, 64 is clamped according to
brightness control voltage.
• Clamp pulse uses internal clamp pulse
(BGP)
I/O
DC
approx. 7 V
Killer filter pin
DC
• Filter pin for killer detection circuit approx. 3.3 V
(operates for BGP period)
• Killer turned On (Without color output)
2.8 V or less
0.47 µF
BGP
9V
2.8 V
100 µA
5
VCC for microcomputer
(5 V)
33 kΩ
To microcomputer
175 Ω
40 µA
5
Floating
resistor
Killer
On
2.2 µF
6
SW
R
2.5 V 7.5 kΩ
BGP
DC
approx. 2.5 V
β curve
fC
max. 1 mA
VCO
circuit
0.022 µF
3.3 V
40 k
Ω
Pin for APC filter
• Filter pin for APC detection circuit
(operates for BGP period)
• Detection sensitivity becomes large
when external R→large (Tends to
pull-in easily. Tends to be affected
by noise)
Off
5V
(VCC3)
1V
DC
Killer On
0.2 V
Killer Off
5V
10 kΩ
6
APC
det.
circuit
Killer output pin
• Output pin of killer detection circuit
• Connect 33 kΩ load resistor of pin 5
to microcomputer VCC
270 Ω
V6
• When SECAM, APC circuit is stopped
by short circuiting 40 kΩ resistor
16
ICs for TV
AN5192K
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
7
8
Description
DC 2.7 V
4.43 MHz
7
IP2
100 µA
C7
12 pF
IP1
500 µA
IN2
100 µA100 µA
DC 2.7 V
3.58 MHz
8
C8
15 pF
IN1
500 µA
C7 and C8 have temperature characteristic (N750)
9
9V
(VCC1)
1.7 kΩ
9
10 kΩ
VCC1
1 µF
to RGB
output
circuit
100 kΩ
10
50 µA
from
microcomputer
10
to RGB output
circuit
1V
2.7 kΩ
30 kΩ
11
12
13
9V
(VCC1)
50 µA
9V
(VCC1)
pin 11, 12, 13 2.7 kΩ
30 kΩ
Pin 7: Chroma oscillation pin (4.43 MHz)
Pin 8: Chroma oscillation pin (3.58 MHz)
• Oscillation pin for chroma. Either one
of 4.43 MHz or 3.58 MHz is oscillated
• Oscillation frequency changeover is
performed by 0E − D0 bit of I2C Bus
• When 0E − D0 = 1
IP1 and IP2 turn On and 4.43 MHz
oscillates.
When 0E − D0 = 0
IN1 and IN2 turn on and 3.58 MHz
oscillates.
• Pattern from pin to oscillator
element should be as short as possible.
AC
f = fC
approx.
0.3 V[p-p]
Spot killer pin
• To be used for discharging electric
charge on CRT quickly when power
of set is turned Off.
• DC voltage of R,G,B output pin is
raised when VCC1 drops.
DC
approx. 9 V
YS input pin
• Fast blanking pulse input pin for
OSD
• Turns on at a voltage higher than
1 V[0-p]
AC
(pulse)
Pin 11: External R input pin
Pin 12: External G input pin
Pin 13: External B input pin
• External input pin for OSD
• Output changes linearly according
to input level.
AC
(pulse)
100 µA
to RGB output
circuit
from
microcomputer
I/O
VREF
Contrast
max.
Output
Contrast
min.
Input
2.5 V
(max.)
• Limit voltage of input changes according
to contrast control level.
17
AN5192K
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
14
15
16
17
100 Ω
130 µA
50 Ω
C Out
9V
(VCC1)
pin 15
16
17
500 µA
18
to
Chroma
circuit
(VCC2)
5V
(VCC3)
10 kΩ
800 µA
2.8 V
12 kΩ
12 kΩ
I1
800 µA
I2
50 µA
VCC1 (typ. 9 V)
• Output part of VIF and SIF circuit
• AV SW circuit
• Video circuit
• RGB circuit
DC
9V
Pin15: R-out pin
Pin16: G-out pin
Pin17: B-out pin
• BLK level approx. 0.9 V
• Black (Pedestal) level approx. 2.2 V
• Blanking can be released when pin 42
(Black level detection pin) is set at 0 V.
AC
Horizontal sync. detection pin
• Phase of horizontal synchronizing
signal and horizontal output pulse is
detected and outputted.
• Pin18 is low when out of phase.
• In asynchronous state, color control
becomes min. and chroma output
disappears.
• Pay attention to impedance when
the voltage of pin 18 is utilized
for microcomputer
(ZO ≥ 1 MΩ is required)
DC
when
synchronous
VCC2 − VSAT
when
asynchronous
approx. 0.3 V
pin 56
H Out
18 ZO
1 MΩ
19
18
0.022 µF
I/O
pin 46
H Sync. In
10 kΩ
• H Sync. period
When pin 56 is high: I1 On
When pin 56 is low: I2 On
GND
• RGB circuit
• DAC I2C circuit
• VIF (VCO) circuit
ICs for TV
AN5192K
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
20
9V
(VCC1)
5.9 V
60 kΩ
to Contrast
Circuit
60 kΩ
2.3 V
7.1 kΩ
Contrast
control
7.1 kΩ
6.9 kΩ
6.9 k
Ω
3.5 V
20
4.7 µF
100 µA
100 µA
100 µA
21
I2C Bus Data input pin
AC
(pulse)
I2C Clock input pin
AC
(pulse)
5V
(VCC3)
100 kΩ
DATA
21
from
µ-COM
1 kΩ
50 µA 100 kΩ
1.7 V
ACK
30 kΩ
to Logic
circuit
30 kΩ
22
5V
(VCC3)
100 kΩ
Clock
22
from
µ-COM
1 kΩ
50 µA 100 kΩ
1.7 V
30 kΩ
23
DC
approx. 3 V
2.1 V
6.9 kΩ
2.3 V
±1 V
ACL pin
• Contrast can be reduced when DC
voltage of pin 20 is decreased from
the outside.
I/O
to Logic
circuit
30 kΩ
VCC3-1 (typ. 5 V)
• For VIF, SIF circuit
DC
5V
19
AN5192K
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
24
25
5V
(VCC3)
3.5 V
27 kΩ
1.2 1.2
kΩ kΩ
Pin 24: VIF input pin 1
Pin 25: VIF input pin 2
• Input for VIF amp.and balanced
input
• Input max. 120 dBµ
I/O
AC
f = fP
DC level
approx. 2.7 V
25
SAW
24
150 µA150 µA
26
5V
(VCC3)
27
to Tuner
27
GND
• VIF, SIF circuit
DC
RF AGC output pin
• Collector open output
DC
1F AGC
Bias
RF AGC
control Bias
40
kΩ
28
Audio output pin
• There is fluctuation of DC due to
internal and external changeover
9V
(VCC1)
270 Ω
AC
0 kHz to 20 kHz
DC
approx. 4.2 V
28
100 µA 400 µA
29
9V
(VCC1)
1.7 kΩ
detection output
120 kΩ
100 µA
PAL
60 kΩ
NTSC
29
1200 pF
20
De-empahsis pin
AC
• De-empahsis filter pin for sound
0 kHz to 20 kHz
detection signal.
• External C is the same for PAL and
NTSC (Internal impedance changes)
• PAL: 120 kΩ//60 kΩ × 1 200 pF
= 48 µs
• NTSC: 60 kΩ × 1200 pF = 72 µs
ICs for TV
AN5192K
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
30
1.1 kΩ
9V
(VCC1)
1.1 kΩ
9V
30
1.1 kΩ
to Tuner
40 kΩ 1.1 kΩ
max. 350 µΑ
31
50 µA
9V
(VCC1)
3.6 V
Ext. Video
30 kΩ
to
Video SW
50 kΩ
31
AFT output pin
• Center voltage offset should be
adjusted by using a bus.
• AFT defeat SW is turned on (0B = 00),
V30 becomes a value determined by
the value of externally attached resistordivider.
• AFT µ is variable by impedance of
externally attached resistor.
DC
External video input pin
• Input pin for external video signal.
DC cut input.
• Typical 1 V[p-p] (max. 1.5 V[p-p])
AC
1 V[p-p]
(Composite)
10 µF
DC
approx. 2.1 V
100 µA
32
9V
(VCC1)
10 kΩ
1.7 kΩ
32
typ.4.5 V
Decoupling pin
• S curve inside IC is wide band but DC
feedback is applied so that DC voltage
of output signal becomes constant.
• DC level (typ. 4.5 V)
fS→High: V32→Low
DC
External audio input pin
• Input pin for external audio signal
input. DC cut input.
• Typical input level should be adjusted
to internal sound level.
• Input max. 7 V[p-p]
AC
0 kHz to 20 kHz
10 µF
1.7 kΩ
3 kΩ
I/O
3 kΩ
20 kΩ
100 µA
13 µA
33
50 µA
to
Audio SW
9V
(VCC1)
5.4 V
65 kΩ
33
10 µF
150 µA
21
AN5192K
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
34
Description
SIF Signal input
Input max. 110 dBµ
5V
(VCC3)
SIF In
0.01 µF
34
3.0 V
10 kΩ
1 kΩ
I/O
AC
f = fS
DC
approx. 2.3 V
100 µA
5V
100 µA
to SIF
Limitter amp.
35
5V
(VCC3)
to
IF amp.
35
30 µA
IF AGC filter pin
• Pin for IF AGC filter. The current
obtained from peak AGC circuit is
smoothed by external capacitor.
• Since response becomes faster when
C→small, but sag tends to appear
easily.
DC
approx. 2 V
0.47 µF
36
Video output pin
• Int. video or Ext. video signal selected
by AV SW is outputted.
• DC fluctuates by internal/external
changeover
9V
(VCC1)
50 µA
36
AC
2 V[p-p]
DC level
approx. 4.5 V
400 µA
37
9V
(VCC1)
2.4 kΩ 7.5 kΩ
1.3 V
27 k
2 pF
22
37
1 000 pF
9V
R237
SIF APC filter pin
DC
• Filter pin for APC circuit of SIF
approx. 2.5 V
• Recommended resistance value for
single frequency
(R237: Connect between the pin and
VCC1)
6.5 MHz: Open
6.0 MHz: 560 kΩ
5.5 MHz: 200 kΩ
4.5 MHz: 560 kΩ
1HDL
6
11
7
10
8
9
5V
V Out
SECAM
-(R-Y)Out
57
58
59
-(B-Y)Out 60
1
16
2
15
61
3
14
SCP 62
4
13
-(B-Y)In 63
5
12
-(R-Y)In 64
BPF
NTSC
amp.
G
Cut Off
(8-bit)
*1-bit
Chroma SW
System
SW
*1-bit
R
*1-bit *Drive 8-bit
Drive
Chroma *Cut Off 9-bit
Cut Off
YS
VCO
pulse
ACC
amp.
1H
FF
HVBLK
B
Drive
Cut Off
LPF
*6-bit
Trap
I2C Bus
Interface
DAC SW
Out Out
Y
clamp
Y
contrast
APC2
Phase
Shift
IF
amp.
VIF
detect
*1-bit
(Service)
*7-bit
Sharpness
Black
expansion
Ver.
sync.sep
28
24
4
3
2
1
SAW
37
5V
50 Hz/60 Hz
29
*7-bit
RF
AGC
1F
AGC
Level
adjust *4-bit
*9-bit
AFT
VSW
*1-bit
*1-bit
*1-bit ASW
Pre-amp.
Deemphasis
VCO
SIF
detect
Limiter
Ext. Audio
33
R-Y
clamp
H Out
56
G-Y
clamp
55
BGP
39
CW
Generate
X-ray
Tint
*7-bit
HOSC
54
B-Y
clamp
AFC1
53
ACC
det.
52
APC
AFC2
51
*8-bit
VCC2
Brightness
FBP In
50
50 Hz
/60 Hz
detect
9V
47
Killer
Ident
49
G-Y
9 V
GND (VCJ)
48
(50 Hz/60 Hz)
C In
Hor.
Lock det.
46
AFC2
*4-bit
40
APC1
Int. V 38
Hor.
Count
Down
Hor. Sync.
Ver.
Count Down
*2-bit
45
B-Y
demod
35
R-Y
demod
+/−
Ver. Sync.
*1-bit
VCC3 (VCJ)
9V
36
7 dB
IF
AGC
BPF
SIF In 34
Chroma
contrast
44
VCO
CV
*7-bit
clamp
*1-bit
43
Hor.
sync.sep
42
Hor. SCP HBLK
Reg.
BL DET
Shut
HVCO
Down
AFC1
VOSC
41
Ver.
out
APC1
PN/S
SW
DET.
Out
*7-bit
APC
Trap
Video
Out
9V
Saturation
9V
Ver.
Clamp
9V
9V
5V
5V
ICs for TV
AN5192K
■ Application Circuit Example
32
Decoupling
31
30 9 V
Ext. Video
26
23
22
21
20
19
17
16
15
14
13
12
11
10
9
8
7
6
5
AFT Out
De-emphasis
27 9 V
Audio Out
RF AGC Out
25
GND (IF)
VIF In2
5V
VCC3 (IF)
VIF In1
SCL
SDA
ACL
18
GND (RGB)
Lock DET
B Out
G Out
9V
VCC1
R Out
B In
G In
R In
YS
9V
Spot Killer
3.58 MHz
4.43 MHz
Killer Out
APC
Killer
B Clamp
G Clamp
R Clamp
23