FAIRCHILD 74VHCT244ASJ

Revised April 2005
74VHCT244A
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
Features
The VHCT244A is an advanced high speed CMOS octal
bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The VHCT244A is a non-inverting
3-STATE buffer having two active-LOW output enables.
This device is designed to be used as 3-STATE memory
address drivers, clock drivers, and bus oriented transmitter/
receivers.
■ High Speed: tPD
5.9 ns (typ) at VCC
5V
■ Power down protection is provided on inputs and
outputs
■ Low power dissipation: ICC
4 PA (max) @ TA
25qC
■ Pin and function compatible with 74HCT244
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. These circuits prevent device destruction
due to mismatched supply and input/output voltages. This
device can be used to interface 5V to 3V systems and two
supply systems such as battery back up.
Note 1: Outputs in OFF-State
Ordering Code:
Order Number
Package Number
74VHCT244AM
74VHCT244ASJ
74VHCT244AMTC
74VHCT244AN
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC20
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation
Connection Diagram
DS500003
www.fairchildsemi.com
74VHCT244A Octal Buffer/Line Driver with 3-STATE Outputs
March 1997
74VHCT244A
Pin Descriptions
Pin Names
Description
OE1, OE2
3-STATE Output Enable Inputs
I0–I7
Inputs
O0–O7
3-STATE Outputs
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE2
In
(Pins 3, 5, 7, 9)
L
L
L
L
H
H
H
X
Z
H HIGH Voltage Level
L LOW Voltage Level
I Immaterial
Z High Impedance
www.fairchildsemi.com
2
Recommended Operating
Conditions (Note 6)
0.5V to 7.0V
0.5V to 7.0V
Supply Voltage (VCC)
DC Input Voltage (VIN)
4.5V to 5.5V
Supply Voltage (VCC)
DC Output Voltage (VOUT )
0V to 5.5V
Input Voltage (VIN)
(Note 3)
(Note 4)
Input Diode Current (IIK)
Output Diode Current (IOK) (Note 5)
DC Output Current (IOUT )
DC VCC/GND Current (ICC)
Storage Temperature (TSTG)
0.5V to VCC 0.5V
0.5V to 7.0V
20 mA
r20 mA
r25 mA
r75 mA
65qC to 150qC
Output Voltage (VOUT)
0V to VCC
0V to 5.5V
40qC to 85qC
Operating Temperature (TOPR)
Input Rise and Fall Time (tr, tf)
VCC
5.0V r 0.5V
0 ns/V a 20 ns/V
Note 2: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications.
Lead Temperature (TL)
260qC
(Soldering, 10 seconds)
(Note 3)
(Note 4)
Note 3: HIGH or LOW state. IOUT absolute maximum rating must be
observed.
Note 4: When outputs are in OFF-STATE or when VCC
OV.
Note 5: VOUT GND, V OUT ! VCC (Outputs Active).
Note 6: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
40qC to 85qC
4.5
2.0
2.0
Input Voltage
5.5
2.0
2.0
Typ
Max
Min
Max
4.5
0.8
0.8
Input Voltage
5.5
0.8
0.8
HIGH Level
LOW Level
3-STATE Output
Input Leakage
4.5
4.5
4.40
4.50
3.94
0.0
Units
Conditions
V
LOW Level
Off-State Current
IIN
TA
HIGH Level
Output Voltage
IOZ
25qC
Min
Output Voltage
VOL
TA
V CC
(V)
Parameter
V
4.40
V
3.80
V
0.1
0.1
V
0.36
0.44
V
VIN
VIH IOH
or VIL IOH
VIN
VIH IOL
or VIL IOL
VIN
50 PA
8 mA
50 PA
8 mA
VIH or VIL
5.5
r0.25
r2.5
PA
0–5.5
r0.1
r1.0
PA
VIN
5.5V or GND
5.5
4.0
40.0
PA
VIN
VCC or GND
5.5
1.35
1.50
mA
VIN
3.4V
VOUT
VCC or GND
Current
ICC
Quiescent Supply
Current
ICCT
Maximum ICC/Input
Other Input
IOFF
Output Leakage Current
0.0
0.5
5.0
PA
VOUT
VCC or GND
5.5V
(Power Down State)
3
www.fairchildsemi.com
74VHCT244A
Absolute Maximum Ratings(Note 2)
74VHCT244A
Noise Characteristics
Symbol
Parameter
TA
25qC
VCC
(V)
Typ
Limits
Units
Conditions
VOLP
(Note 7)
Quiet Output Maximum Dynamic VOL
5.0
0.9
1.1
V
CL
50 pF
VOLV
(Note 7)
Quiet Output Minimum Dynamic VOL
5.0
0.9
1.1
V
CL
50 pF
VIHD
(Note 7)
Minimum HIGH Level Dynamic Input Voltage
5.0
2.0
V
CL
50 pF
VILD
(Note 7)
Maximum LOW Level Dynamic Input Voltage
5.0
0.8
V
CL
50 pF
Note 7: Parameter guaranteed by design.
AC Electrical Characteristics
Symbol
V CC
(V)
Parameter
tPLH
Propagation Delay
tPHL
Time
tPZL
3-STATE Output
tPZH
Enable Time
tPLZ
3-STATE Output
tPHZ
Disable Time
tOSLH
Output to
tOSHL
Output Skew
CIN
Input
5.0 r 0.5
5.0 r 0.5
5.0 r 0.5
25qC
TA
Min
Typ
TA
Max
40qC to 85qC
Min
Max
Units
Conditions
5.4
7.4
1.0
8.5
5.9
8.4
1.0
9.5
7.7
10.4
1.0
12.5
8.2
11.4
1.0
13.5
8.8
11.4
1.0
13.0
ns
RL
1.0
1.0
ns
(Note 8)
10
10
pF
VCC
Open
9
pF
VCC
5.0V
18
pF
(Note 9)
5.0 r 0.5
4
CL
15 pF
CL
50 pF
1 k: CL
15 pF
CL
50 pF
1 k: CL
50 pF
ns
ns
RL
Capacitance
COUT
Output
Capacitance
CPD
Power Dissipation
Capacitance
Note 8: Parameter guaranteed by design. tOSLH
|tPLH max t PLH min|; tOSHL
|tPHL max tPHL min|
Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN ICC/8 (per F/F). The total CPD when n pcs. of the Octal D Flip-Flop operates
can be calculated by the equation: CPD (total) 20 12n.
www.fairchildsemi.com
4
74VHCT244A
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
5
www.fairchildsemi.com
74VHCT244A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
www.fairchildsemi.com
6
74VHCT244A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
7
www.fairchildsemi.com
74VHCT244A Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
8