M56710FP F2F Magnetic Stripe Encoding Card Reader REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Description The M56710FP is a semiconductor integrated circuit of Bi-CMOS structure having an F2F demodulator function for magnetic card reader. Features • • • • • Low current dissipation (0.7 mA when on standby as a standard) Provided with glance-over selection input (4, 8, and 16 bits) Provided with output polarity (“L” active or “H” active) switching input Miniature mini-mold package Wide operating temperature range Ta = −20 to 75°C Application Magnetic card reader Functional Description Data signal which is read from magnetic card via magnetic head is input from HD2 and HD1 pins., and converted into F2F pattern signal by analog processing in amplifier OP1, differentiator OP2, sensitivity setting circuit and waveform shaping circuit. If F2F signal is input, the logic section glances over the prescribed number of bits set by IB1 and IB2 input before performing digital processing, and then outputs card reading signal CLS, read clock signal RCP, and read data signal RDT. INV turning to “L” switches each output of CLS. RCP and RDT from “L” active to “H” active. • Standard Bits: Let the number of glance-over bits set by IB1 and IB2 be M. Let the Mth FC (flux change) through M+1st FC after LDI input is turned from “L” to “H” be a standard bit with a time width of TB0. I/O is discriminated from the next bit to this standard bit as a data bit. • I/O discrimination Let the data bit time width of a data bit be TBn, and if there is one next FC between the FC at the end of that bit (i.e. the beginning of the next bit) to 5/7TBn, let the next bit (Bn+1) be data “1”, and, if there is no FC, be data “0”. • Output signal time width When letting the oscillation cycle of oscillation circuit be TOSC. RCP output pulse width TOW: about 16 TOSC RCP delay time to RDT: about 8 TOSC REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 1 of 13 M56710FP Block Diagram Amplifier Differentiator output input Noise filter AMP PKI PKO 6 5 4 Amplifier (−) input HD2 7 − − Amplifier (+) input HD1 8 + + OP1 Sensitivity setting F2F output F2F 3 Waveform shaping 20 VCC1 Power supply OP2 19 VCC2 Power supply Reference voltage output VRF 9 Reference voltage circuit 14 INV Invert input Read control input LDI 1 13 CLS Card travelling signal output Control circuit Ignore bit 2 IB2 15 12 RDT Read data output Ignore bit 1 IB1 16 11 RCP Read clock output 1/5 Oscillation capacitor CX2 17 Oscillation capacitor CX1 18 Oscillation circuit 5TOSC 11 bit downcounter 10 GND TOSC 1/7 7TOSC 11 bit upcounter Pin Arrangement M56710FP LDI → 1 20 VCC1 Power supply NC 2 19 VCC2 Power supply 3 18 CX1 Oscillation capacitor 4 17 CX2 Oscillation capacitor PKI → 5 16 ← IB1 Ignore bit 1 Amplifier output AMP ← 6 15 ← IB2 Ignore bit 2 Amplifier (−) input HD2 → 7 14 ← INV Invert input Amplifier (+) input HD1 → 8 13 → CLS Card travelling signal output VRF 9 12 → RDT Read data output Grounding GND 10 11 → RCP Read clock output Read control input F2F output F2F ← Noise filter PKO Differentiator input Standard voltage output (Top view) NC: no connection Outline: PRSP0020DA-A (20P2N-A) REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 2 of 13 M56710FP I/O Circuit 1. LDI, IB1, IB2 input circuit 2. INV input circuit VCC2 VCC2 LDI IB1 IB2 INV GND GND 3. CLS, RDT, RCP output circuit VCC2 CLS RDT RCP GND Pin Function Description Pin No. 1 Pin Name LDI Name Read control input 3 F2F F2F output 4 5 6 7 8 9 10 11 12 13 14 PKO PKI AMP HD2 HD1 VRF GND RCP RDT CLS INV Noise filter Differentiator input Amplifier output Amplifier (−) input Amplifier (+) input Reference voltage output Grounding Read clock output Read data output Card travelling signal output Invert input 15 16 17 IB2 IB1 CX2 Ignore bit 2 Ignore bit 1 Oscillation capacitor 18 CX1 Oscillation capacitor 19 20 VCC2 VCC1 Power supply Power supply REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 3 of 13 Function Schmidt trigger input. At “L”, reset the internal digital circuit. At “H”, F2F modulation is possible. F2F signal output that has amplified, differentiated and further waveform-shaped the magnetic head signal. Connect noise removing capacitor CNF between PKI and PKO. Refer to PKO and AMP. Connect resistor RPK and capacitor CPK between AMP and PKI. Connect magnetic head between HD1 and HD2. Connect magnetic head between HD1 and HD2. Reference voltage output of VCC 1/2 Clock pulse output after F2F modulation Data output after F2F modulation Signal output indicating that card is travelling CLS, RDT and RCP output becomes “L” active at “H” (OPEN), and “H” active at “L”. Glance-over bit setting pin Glance-over bit setting pin Connect capacitor COSC between CX1 and CX2 to set oscillation frequency. Connect capacitor COSC between CX1 and CX2 to set oscillation frequency. Digital circuit section power supply pin. Supply voltage is VCC. Analog circuit section power supply pin. Supply voltage is VCC (same voltage as VCC2). M56710FP Glance-Over Bit Setting and Timing By IB1 and IB2 IB2 input L L H IB1 input L H L Number of glanceover bits 4 8 16 H H — Note: Description Internal digital circuit is reset with LDI input at “L”. LDI input may be at “H” at all times. CLS output turns to “L” after counting the flux change FC (change in the status of F2F) of the number of glance-over bits, and returns to “H” when BIC (bit interval counter) has fully counted. (At “L” active). — IB2, IB1 : “L”, “L” x 1 2 3 4 TBO: Reference bit F2F LDI BIC full count CLS About 14300 TOSC REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 4 of 13 M56710FP Operating Timing Diagram IB2, IB1: "L", "L" INV: "H" HD2-HD1 LDI (5/7) TBn TB0 F2F TBn+ Reference bit 5/7TBn Bit 1/0 discrimination signal CLS RCP RDT 0 0 0 0 1 0 1 1 0 RDT data is output 1 bit behind F2F data. HD2-HD1 F2F LDI (5/7) CLS RCP RDT 0 0 0 0 1 0 0 0 0 0 0 1 0 1 1 0 0 Absolute Maximum Ratings (Ta = −20 to 75°C, unless otherwise noted) Item Supply voltage Input voltage Input voltage Output voltage Differential input voltage Operating temperature Storage temperature Symbol VCC VI VI IO VID Topr Tstg Ratings −0.3 to +6.5 −0.3 to VCC+0.3 −0.3 to VCC+0.3 −10 to +10 −1.2 to +1.2 −20 to 75 −55 to 125 Unit V V V mA V °C °C Conditions VCC1, VCC2 LDI, IB1, IB2, INV HD1, HD2 CLS, RDT, RCP Between HD2 and HD1 pins Notes: 1. Voltage is based on GND pin of the circuit (0 V), unless otherwise noted. 2. Direction of the current flowing into the circuit is represented by “positive” (without code) and that flowing out of the circuit by “negative” (−code). REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 5 of 13 M56710FP Recommended Operating Conditions (Ta = −20 to 75°C, unless otherwise noted) Symbol Min Limits Typ Max Unit Supply voltage VCC1, VCC2 VCC 4.0 5 5.5 V Input voltage “H” input voltage “L” input voltage LDI IB1, IB2, INV IB1, IB2, INV VI VIH VIL “H” output current “L” output current CLS, RDT, RCP IOH 0 0.8VCC 0 −0.5 — — — — VCC VCC 0.2VCC 0 V V V mA CLS, RDT, RCP IOL 0 — 5 mA Differential input voltage Input frequency HD2-HD1 VIN 3 — 80 mVp-p fIN fOSC 0.3 0.2 — — 15 2 kHz MHz fOSC = 1/TOSC Item HD2-HD1 Oscillation frequency Test Conditions VCC1 and VCC2 shall have the identical voltage. External capacitor CX1, CX2 COSC 25 — 100 pF fOSC ∞ 1/COSC External capacitor External resistor CX1, CX2 COSC — 33 — pF Reference value when corresponding to 210BPI AMP RPK — 470 — Ω Reference value when corresponding to 210BPI External capacitor PKI CPK — 0.033 — µF External capacitor External resistor PKI, PKO CNF — 220 — pF Reference value when corresponding to 210BPI Reference value PKI, F2F VCC1, VCC2 RPF CVC — — 4.7 0.1 — — MΩ µF Reference value Reference value VRF CVR 0.8 1 2 µF Reference value External capacitor External capacitor REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 6 of 13 M56710FP Electrical Characteristics (Ta = −20 to 75°C, VCC = 5 V, unless otherwise noted) Item Symbol Limits Test Circ uit Min Typ Max Unit Test Conditions Threshold voltage IB1, IB2, INV VTH — 0.3VCC — 0.7VCC V VCC = 4 to 5.5 V “L” output voltage CLS, RDT, RCP VOL CLS, RDT, RCP VOH — — 3.8 3.2 — — — — 0.2 0.4 — — V V V V VCC = 4 V “H” output voltage 2 2 2 2 “L” input current LDI, IB1, IB2 IIL 2 −10 — +10 µA IOL = 10 µA IOL = 5 mA VCC = 4 V IOH = −10 µA IOH = −0.5 mA VCC = 5.5 V, VI = 0 V “L” input current INV IIL 2 −80 — −10 mA VCC = 5.5 V, VI = 0 V “H” input current LDI, IB1, IB2, INV INV IIH 2 −10 — +10 µA VCC = 5.5 V, VI = 5.5 V IIT+ 2 −250 — −50 µA VCC = 5.5 V, VI = VTH VIN = 0 mVp-p Positive threshold current Reference voltage Voltage gain 1 VRF VREF 1 2.3 2.5 2.7 V OP1 GV11 3 18 20 24 Double Voltage gain 2 OP1 GV21 3 18 20 24 Double Input resistance OP1 RIN1 3 7 10 14 kΩ Maximum output voltage OP1 VOPP1 3 2 — — Vp-p “L” sensitivity current PKI − F2F IIL2 4 — — –0.3 µA VM, F2F < 0.5 V “H” sensitivity current PKI − F2F IIH2 4 0.3 — — µA VM, F2F > 4.5 V Positive threshold voltage PKI − F2F VTH+2 5 0.2 0.45 0.7 V On the VRF basis Negative threshold voltage PKI − F2F VTH−2 5 –0.7 –0.45 –0.2 V On the VRF basis Threshold differential voltage PKI − F2F VTHD2 — –0.15 — 0.15 V (VTH+2) − VTH−2 Pin voltage range PKO VPKO 4 –1.2 — 1.2 V “L” output voltage F2F VOL3 5 — — 0.5 V On the VRF basis PK = 1 mA − +1 mA VPKI = 0 V, IF2F = 0.5 mA “H” output voltage F2F VOH3 5 4.5 — — V VPKI = 5 V, IF2F = −0.5 mA Positive threshold voltage LDI VTH+4 6 2.5 — 3.5 V REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 7 of 13 fIN = 1 kHz VIN = 80 mVp-p sine wave fIN = 15 kHz VIN = 80 mVp-p sine wave fIN = 1 kHz VIN = 80 mVp-p sine wave fIN = 1 kHz sine wave THD AMP = 5% M56710FP (Ta = −20 to 75°C, VCC = 5 V, unless otherwise noted) Item Symbol Limits Test Circ uit Min Typ Max Unit Test Conditions Negative threshold voltage LDI VTH−4 6 1.5 — 2.7 V Hysterisis width LDI VHY4 — 0.5 — 1.5 V Standby circuit current VCC1, VCC2 ICCW 1 — 0.7 1.0 mA VIN = 0 mVp-p Operating circuit current VCC1, VCC2 ICCR 1 — 1.9 2.4 mA Oscillation frequency RCP fOSC 1 0.75 — 1.5 MHz fIN = 8.2 kHz VIN = 68 mVp-p sine wave fOSC = 1 MHz COSC = 33 pF Output pulse width RCP TOW 7 15 16 17 µs fOSC = 1 MHz Intra-output delay time RDT, RCP TOD 7 7 8 9 µs fOSC = 1 MHz Input noise width INV TNW 7 0.5 — — µs Note: (VTH+4) − (VTH−4) 1. Min. and max. limits do not represent absolute values. 2. Typ. limits represent standard values when Ta = 25°C and VCC = 5V. Test Circuit On the following drawing, COSC = 33 pF, RPK = 470 Ω, CPK = 0.033 µF, CNF = 470 pF, CVR = 1 µF 1. Testing of VREF, ICCW, ICCR, fosc VCC A LDI ICCW ICCR VCC1 VCC2 CNF RPK CPK VIN, fIN VREF V F2F CX1 PKO CX2 PKI IB1 AMP IB2 HD2 INV HD1 CLS VRF RDT fOSC GND RCP Oscilloscope RCP TOW REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 8 of 13 COSC fOSC = 16 TOW M56710FP 2. Testing of VOL, VOH, IIL, IIH, IIT+ VCC LDI VCC1 VCC2 CVR F2F CX1 PKO CX2 PKI IB1 AMP IB2 HD2 INV HD1 CLS VRF RDT GND RCP IIH IIL IIT+ COSC A VI VOL VOH V IOL IOH Note: Short the IB1 and IB2 to the GND when those pins are not used for testing. 3. Testing of GV11, GV21, RIN1, VOPP1 VCC LDI VCC1 VCC2 THD meter (ON at VOPP1) CNF RPK CPK VM.AMP (OFF at RIN) V VOPP1 10 kΩ 10 kΩ CVR F2F CX1 PKO CX2 PKI IB1 AMP IB2 HD2 INV HD1 CLS VRF RDT GND RCP VIN, IIH VM.AMP VIN 2VM.AMP RIN1 = × 10 (kΩ) GV11 • VIN − VM.AMP GV11 = REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 9 of 13 COSC M56710FP 4. Testing of IIH2, IIL2, VPKO VCC VCC1 LDI VCC2 VM.F2F VM.PKO IPKI V IIH2 IIL2 CVR F2F CX1 PKO CX2 PKI IB1 AMP IB2 HD2 INV HD1 CLS VRF RDT GND RCP COSC Note: IIL2 is PKI input current providing VM.F2F < 0.5 V. IIH2 is PKI input current providing VM.F2F > 4.5 V. VPKO = VM.PKO − VREF 5. Testing of VTH+2, VTH−2, VOL3, VOH3 VCC LDI 5 kΩ VM.F2F VOL3 V VOH3 IF2F VCC1 VCC2 (ON at VOL3 and VOH3) 5 kΩ VPKI CVR F2F CX1 PKO CX2 PKI IB1 AMP IB2 HD2 INV HD1 CLS VRF RDT GND RCP COSC VTH+2 = VREF − VPKI− VTH−2 = VREF − VPKI+ VCC VPKI 0V "H" VM.F2F "L" REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 10 of 13 VPKI+ VPKI− M56710FP 6. Testing of VTH+4, VTH−4 VCC LDI VCC1 VCC2 VLDI F2F CX1 PKO CX2 PKI IB1 AMP IB2 HD2 INV HD1 CLS VRF RDT GND RCP VCC V VM.CLS VTH+4 VTH−4 VLDI 0V "H" VM.CLS "L" 7. Testing of TOW, TOD, TNW VCC LDI VCC1 Logic pattern generator VCC2 5 kΩ CVR CLK CLK RCP fOSC duty 50 % TOW RDD F2F CX1 PKO CX2 PKI IB1 AMP IB2 VCC HD2 INV INV 0V RCP HD1 CLS VRF RDT GND RCP TOD Noise input TNW Oscilloscope (ON at TNW) REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 11 of 13 TOD Note: TNW, a negative noise put into INV input, is the maximum time interval not considered INV input. M56710FP Application Example When setting the glance-over bit to 16 bits to let it be “L” active output 5V 1 LDI VCC1 20 2 VCC2 19 CVC 3 F2F CX1 18 COSC RPF 4 PKO CX2 17 5 PKI IB1 16 6 AMP IB2 15 7 HD2 INV 14 8 HD1 CLS 13 9 VRF RDT 12 10 GND RCP 11 CNF CPK RPK CVR REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 12 of 13 M56710FP Package Dimensions JEITA Package Code P-SOP20-5.3x12.6-1.27 RENESAS Code PRSP0020DA-A Previous Code 20P2N-A MASS[Typ.] 0.3g 20 E *1 HE 11 F 1 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 10 c Index mark *2 A2 D A1 L A Reference Symbol *3 e bp y Detail F D E A2 A1 A bp c HE e y L REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 13 of 13 Dimension in Millimeters Min Nom Max 12.5 12.6 12.7 5.2 5.3 5.4 1.8 0.1 0.2 0 2.1 0.35 0.4 0.5 0.18 0.2 0.25 0° 8° 7.5 7.8 8.1 1.12 1.27 1.42 0.1 0.4 0.6 0.8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. 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