Datasheet No – 97476 July 1, 2011 IR11682S DUAL SmartRectifier • • • • • • • • • • • • • DRIVER IC Product Summary Features • TM Secondary-side high speed controller for synchronous rectification in resonant half bridge topologies 200V proprietary IC technology Max 400KHz switching frequency Anti-bounce logic and UVLO protection 4A peak turn off drive current Micropower start-up & ultra low quiescent current 10.7V gate drive clamp 80ns turn-off propagation delay Wide Vcc operating range Direct sensing for both Synchronous Rectifiers Cycle by Cycle MOT Check Circuit prevents multiple false trigger GATE pulses Minimal component count Simple design Lead-free Topology LLC Half-bridge VD 200V VOUT 10.7V Clamped Io+ & I o- (typical) +1A & -4A Turn on Propagation Delay 100ns (typical) Turn off Propagation Delay 80ns (typical) Package Options Typical Applications • LCD & PDP TV, Telecom SMPS, AC-DC adapters 8-Lead SOIC Typical Connection Diagram Vin SR1 C1 Cdc M1 Rg1 Lr 1 2 1 2 3 4 C2 Rtn www.irf.com M2 GATE1 GATE2 VCC GND VS1 VS2 VD1 VD2 8 7 6 5 Cout IR1168 IR11682 LOAD Rg2 SR2 © 2010 International Rectifier IR11682S Table of Contents Page Description 3 Qualification Information 4 Absolute Maximum Ratings 5 Electrical Characteristics 6 Functional Block Diagram 8 Input/Output Pin Equivalent Circuit Diagram 9 Lead Definitions 10 Lead Assignments 10 Application Information and Additional Details 12 Package Details 19 Tape and Reel Details 20 Part Marking Information 21 Ordering Information 22 www.irf.com © 2010 International Rectifier 2 IR11682S Description IR11682 is a dual smart secondary-side rectifier driver IC designed to drive two N-Channel power MOSFETs used as synchronous rectifiers in resonant converter applications. The IC can control one or more paralleled N MOSFETs to emulate the behavior of Schottky diode rectifiers. The drain to source for each rectifier MOSFET voltage is sensed differentially to determine the level of the current and the power switch is turned ON and OFF in close proximity of the zero current transition. The anti shoot-through logic prevents both channels from turning on the power switches at the same time. The cycle-by-cycle MOT protection circuit can automatically detect no load condition and turn off gate driver output to avoid negative current flowing through the MOSFETs. Ruggedness and noise immunity are accomplished using an advanced blanking scheme and double-pulse suppression that allows reliable operation in fixed and variable frequency applications. www.irf.com © 2010 International Rectifier 3 IR11682S Qualification Information † †† Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant † †† ††† Industrial Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. ††† MSL2 260°C SOIC8N (per IPC/JEDEC J-STD-020) Class B (per JEDEC standard JESD22-A115) Class 2 (per EIA/JEDEC standard EIA/JESD22-A114) Class 1, Level A (per JESD78) Yes Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. www.irf.com © 2010 International Rectifier 4 IR11682S Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Parameters Supply Voltage Cont. Drain Sense Voltage Pulse Drain Sense Voltage Source Sense Voltage Gate Voltage Operating Junction Temperature Storage Temperature Thermal Resistance Package Power Dissipation Switching Frequency Symbol VCC VD VD VS VGATE TJ TS RθJA PD fsw Min. -0.3 -1 -5 -3 -0.3 -40 -55 Max. 20 200 200 20 20 150 150 128 970 400 Units V V V V V °C °C °C/W mW kHz Remarks VCC=20V, Gate off SOIC-8 SOIC-8, TAMB=25°C Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol VCC VD1, VD2 TJ Fsw Definition Supply voltage Drain Sense Voltage Junction Temperature Switching Frequency Min. 8.6 -3 † -25 --- Max. 18 200 125 400 Units V °C kHz † VD1, VD2 -3V negative spike width ≤100ns www.irf.com © 2010 International Rectifier 5 IR11682S Electrical Characteristics VCC=15V and TA = 25°C unless otherwise specified. The output volt age and current (VO and IO) parameters are referenced to GND (pin7). Supply Section Parameters Supply Voltage Operating Range VCC Turn On Threshold VCC Turn Off Threshold (Under Voltage Lock Out) VCC Turn On/Off Hysteresis Symbol Min. VCC VCC ON VCC UVLO Typ. Max. Units 8.6 7.5 8.1 18 8.5 V V 7 7.6 8 V 18 60 4.3 140 V mA mA mA µA VCC HYST 0.5 14 48 2.6 Operating Current ICC Quiescent Current Start-up Current IQCC ICC START Comparator Section Parameters Turn-off Threshold Turn-on Threshold Hysteresis Input Bias Current Input Bias Current Comparator Input Offset Symbol VTH1 VTH2 VHYST IIBIAS1 IIBIAS2 VOFFSET Min. -12 -220 One-Shot Section Parameters Blanking pulse duration Symbol tBLANK Reset Threshold Hysteresis GBD CLOAD =1nF, fSW = 400kHz CLOAD =4.7nF, fSW = 400kHz VCC=VCC ON - 0.1V Typ. -6 -140 141 1 10 Max. 0 -80 Min. 8 Typ. 17 2.5 5.4 40 Max. 25 Units Remarks µs V VCC=10V – GBD V VCC=20V – GBD mV VCC=10V – GBD Min. 600 Typ. 850 Max. 1100 Units ns VTH3 VHYST3 Minimum On Time Section Parameters Symbol Minimum on time TOnmin Remarks www.irf.com 10 50 2 Units Remarks mV mV mV µA VD = -50mV µA VD = 200V mV GBD Remarks © 2010 International Rectifier 6 IR11682S Electrical Characteristics VCC=15V and TA = 25°C unless otherwise specified. The output volt age and current (VO and IO) parameters are referenced to GND (pin7). Gate Driver Section Parameters Gate Low Voltage Gate High Voltage Rise Time Fall Time Turn on Propagation Delay Turn off Propagation Delay Pull up Resistance Pull down Resistance Output Peak Current (source) Output Peak Current (sink) Symbol VGLO VGTH tr1 tr2 tf1 tf2 tDon tDoff rup rdown IO source IO sink Min. 8.5 Typ. 0.3 10.7 10 80 5 25 100 80 5 1.2 1 4 Max. 0.5 13.5 200 120 Units V V ns ns ns ns ns ns Ω Ω A A www.irf.com Remarks IGATE = 200mA VCC=12V-18V (internally clamped) CLOAD = 1nF CLOAD = 4.7nF CLOAD = 1nF CLOAD = 4.7nF VDS to VGATE -100mV overdrive VDS to VGATE -100mV overdrive IGATE = 15mA – GBD IGATE = -200mA – GBD CLOAD = 1nF – GBD CLOAD = 1nF – GBD © 2010 International Rectifier 7 IR11682S Functional Block Diagram www.irf.com © 2010 International Rectifier 8 IR11682S I/O Pin Equivalent Circuit Diagram www.irf.com © 2010 International Rectifier 9 IR11682S Lead Definitions PIN# 1 2 3 4 5 6 7 8 Symbol GATE1 VCC VS1 VD1 VD2 VS2 GND GATE2 Description Gate Drive Output 1 Supply Voltage Sync FET 1 Source Voltage Sense Sync FET 1 Drain Voltage Sense Sync FET 2 Drain Voltage Sense Sync FET 2 Source Voltage Sense Analog and Power Ground Gate Drive Output 2 Lead Assignments 1 GATE1 GATE2 8 2 VCC GND 7 3 VS1 VS2 6 4 VD1 VD2 5 www.irf.com © 2010 International Rectifier 10 IR11682S Detailed Pin Description VCC: Power Supply This is the supply voltage pin of the IC and it is monitored by the under voltage lockout circuit. It is possible to turn off the IC by pulling this pin below the minimum turn off threshold voltage, without damage to the IC. To prevent noise problems, a bypass ceramic capacitor connected to Vcc and COM should be placed as close as possible to the IR11682. This pin is not internally clamped. GND: Ground This is ground potential pin of the integrated control circuit. referenced to this point. The internal devices and gate driver are VD1 and VD2: Drain Voltage Sense These are the two high-voltage pins used to sense the drain voltage of the two SR power MOSFETs. Routing between the drain of the MOSFET and the IC pin must be particularly optimized. Additional RC filter in not necessary but could be added to VD1 and VD2 pins to increase noise immunity. For applications which VD voltage exceeds 100V, a 1Kohm to 2Kohm VD resistor is recommended to be added between the drain of SR MOSFET and VD pin. The VD resistor helps to limit the switching loss of VD pins. VS1 and VS2: Source Voltage Sense These are the two differential sense pins for the two source pins of the two SR power MOSFETs. This pin must not be connected directly to the GND pin (pin 7) but must be used to create a Kelvin contact as close as possible to the power MOSFET source pin. GATE1 and GATE2: Gate Drive Outputs These are the two gate drive outputs of the IC. The gate voltage is internally clamped and has a +1A/-4A peak drive capability. Although this pin can be directly connected to the synchronous rectifier (SR) MOSFET gate, the use of gate resistor is recommended (specifically when putting multiple MOSFETs in parallel). Care must be taken in order to keep the gate loop as short and as small as possible in order to achieve optimal switching performance. www.irf.com © 2010 International Rectifier 11 IR11682S Application Information and Additional Details State Diagram POWER ON Gate Inactive UVLO MODE VCC < VCCon Gate Inactive ICC = ICC START VCC > VCCon & VDS>VTH3 VCC < VCCuvlo NORMAL Gate Active Gate PW ≥ MOT Cycle by Cycle MOT Check Enabled VDS>VTH1 @ MOT VDS<VTH1 @ MOT MOT PROTECTION MODE Gate Output Disabled UVLO Mode: The IC is in the UVLO mode when the VCC pin voltage is below VCCUVLO. The UVLO mode is accessible from any other state of operation. In the UVLO state, most of the internal circuitry is unbiased and the IC draws a quiescent current of ICCSTART. The IC remains in the UVLO condition until the voltage on the VCC pin exceeds the VCC turn on threshold voltage, VCC ON. Normal Mode: Once Vcc exceeds the UVLO voltage, the IC is ready to go into Normal mode. The GATE outputs are activated when the VDS sensed on the MOSFET crosses VTH3. This function will prevent the GATE to turnon towards the end of a switching cycle and prevent reverse current in MOT time. In Normal mode the gate drivers are operating and the IC will draw a maximum of ICC from the supply voltage source. MOT Protection Mode If the secondary current conduction time is shorter than the MOT (Minimum On Time) time, the next driver output is disabled. This function can avoid reverse current that occurs when the system works at very light/no load conditions and reduce system standby power consumption by disabling GATE outputs. The IC automatically goes back to normal operation mode once the load increases to a level and the secondary current conduction time is longer than MOT. www.irf.com © 2010 International Rectifier 12 IR11682S General Description The IR11682 Dual Smart Rectifier controller IC is the industry first dedicated high-voltage controller IC for synchronous rectification in resonant converter applications. The IC can emulate the operation of the two secondary rectifier diodes by correctly driving the synchronous rectifier (SR) MOSFETs in the two secondary legs. The core of this device are two high-voltage, high speed comparators which sense the drain to source voltage of the MOSFETs differentially. The device current is sensed using the RDSON as a shunt resistance and the GATE pin of the MOSFET is driven accordingly. Dedicated internal logic then manages to turn the power device on and off in close proximity of the zero current transition. IR11682 further simplifies synchronous rectifier control by offering the following power management features: -Wide VCC operating range allows the IC to be directly powered from the converter output -Shoot through protection logic that prevents both the GATE outputs from the IC to be high at the same time -Device turn ON and OFF in close proximity of the zero current transition with low turn-on and turn-off propagation delays; eliminates reactive power flow between the output capacitors and power transformer -Internally clamped gate driver outputs that significantly reduce gate losses. The SmartRectifier™ control technique is based on sensing the voltage across the MOSFET and comparing it with two negative thresholds to determine the turn on and off transitions for the device. The rectifier current is sensed by the input comparators using the power MOSFET RDSON as a shunt resistance and its GATE is driven depending on the level of the sensed voltage vs. the 3 thresholds shown below. VGate VDS VTH2 VTH1 VTH3 Figure 1: Input comparator thresholds Turn-on phase When the conduction phase of the SR FET is initiated, current will start flowing through its body diode, generating a negative VDS voltage across it. The body diode has generally a much higher voltage drop than the one caused by the MOSFET on resistance and therefore will trigger the turn-on threshold VTH2. When VTH2 is triggered, IR11682 will drive the gate of MOSFET on which will in turn cause the conduction voltage VDS to drop down to ID*RDSON. This drop is usually accompanied by some amount of ringing, that could trigger the input comparator to turn off; hence, a fixed Minimum On Time (MOT) blanking period is used that will maintain the power MOSFET on for a minimum amount of time. The fixed MOT limits the minimum conduction time of the secondary rectifiers and hence, the maximum switching frequency of the converter. www.irf.com © 2010 International Rectifier 13 IR11682S Turn-off phase Once the SR MOSFET has been turned on, it will remain on until the rectified current will decay to the level where VDS will cross the turn-off threshold VTH1. Since the device currents are sinusoidal here, the device VDS will cross the VTH1 threshold with a relatively low dV/dt. Once the threshold is crossed, the current will start flowing again through the body diode, causing the VDS voltage to jump negative. Depending on the amount of residual current, VDS may once again trigger the turn-on threshold; hence, VTH2 is blanked for a time duration tBLANK after VTH1 is triggered. When the device VDS crosses the positive reset threshold VTH3, tBLANK is terminated and the IC is ready for next conduction cycle as shown below. VTH3 IDS VDS T1 T2 VTH1 VTH2 Gate Drive Blanking MOT tBLANK time Figure 2: Secondary currents and voltages MOT protection At very light load or no load condition, the current in SR FET will become discontinuous and could be shorter than MOT time in some system. If this happens, the SR FET current will flow from drain to source at the end of MOT. The reverse current discharges output capacitor; stores the energy in transformer and causes resonant on VDS voltage once the SR FET turns off. The resonant could turn on the gate of IR11682, caused more reverse current and thus subsequent multi false triggering as shown below in Figure 3. Figure 3: Waveform without MOT protection The cycle-by-cycle MOT protection circuit can detect the reverse current situation and disable the next output gate pulse to avoid this issue. The internal comparator and MOT pulse generator still work under the protection mode. So the circuit can continuously monitor the load current and come back to normal working mode once the load current conduction time increased to longer than MOT. This circuit helps to reduce standby power losses. It also can prevent voltage spike that caused by false triggering at light load. www.irf.com © 2010 International Rectifier 14 IR11682S Figure 4: Waveform under MOT protection mode General Timing Waveform VCC VCC ON VCC UVLO t UVLO NORMAL UVLO Figure 5: Vcc UVLO VTH1 VDS VTH2 t Don t Doff VGate 90% 50% 10% t rise tfall Figure 6: Timing waveform www.irf.com © 2010 International Rectifier 15 IR11682S 9.0 V VCC UVLO Thresholds ISUPPLY (mA) 10 1 0.1 8.5 V 8.0 V 7.5 V VCC ON 0.01 5.0 V VCC UVLO 7.5 V 10.0 V 12.5 V 15.0 V 17.5 V 7.0 V -50 °C Supply voltage Figure 7: Supply Current vs. Supply Voltage 150 °C Icc @400KHz, CLOAD=1nF IQCC 13.8 2.6 13.7 2.6 13.7 ICC Supply Current (mA) ICC Supply Current (mA) 50 °C 100 °C Temperature Figure 8: Undervoltage Lockout vs. Temperature 2.7 2.5 2.5 2.4 2.4 2.3 13.6 13.6 13.5 13.5 13.4 13.4 2.3 2.2 -50 °C 0 °C 0 °C 50 °C 100 °C Temperature 13.3 -50 °C 150 °C Figure 9: Icc Quiescent Currrent vs. Temperature 0 °C 50 °C Temperature 100 °C 150 °C Figure 10: Icc Supply Currrent @1nF Load vs. Temperature www.irf.com © 2010 International Rectifier 16 -3.4 -138.0 -3.6 -139.0 -3.8 -140.0 VTH2 Thresholds (mV) VTH1 Threshold (mV) IR11682S -4.0 -4.2 -4.4 -143.0 Ch2 0 °C 50 °C Temperature 100 °C Ch1 -144.0 Ch1 -145.0 -50 °C 150 °C 0 °C 50 °C 100 °C Temperature 150 °C Figure 12: VTH2 vs. Temperature Figure 11: VTH1 vs. Temperature 900 ns -134.0 890 ns -135.0 880 ns -136.0 Minimum On Time Comparator Hysteresis VHYST (mV) -142.0 Ch2 -4.6 -4.8 -50 °C -141.0 -137.0 -138.0 -139.0 Ch2 870 ns 860 ns 850 ns 840 ns Ch1 MOT_Ch1 -140.0 830 ns -141.0 -50 °C 0 °C 50 °C 100 °C Temperature 820 ns -50 °C 150 °C MOT_Ch2 0 °C 50 °C 100 °C 150 °C Temperature Figure 13: Comparator Hysteresis vs. Temperature Figure 14: MOT vs Temperature www.irf.com © 2010 International Rectifier 17 IR11682S 125 ns 95 ns 120 ns Propagation Delay Propagation Delay 90 ns 115 ns 110 ns 105 ns 85 ns 80 ns 100 ns Ch1 Turn-off Propagation Delay Ch2 Turn-off Propagation Delay 75 ns 95 ns 90 ns -50 °C Ch1 Turn-on Propagation Delay Ch2 Turn-on Propagation Delay 0 °C 50 °C Temperature 100 °C 70 ns -50 °C 150 °C 100 °C 150 °C Figure 16: Turn-off Propagation Delay vs. Temperature 11.5 V 10 ns Ch1 VGH@Vcc=12V Ch2 VGH@Vcc=12V Ch1 VGH@Vcc=18V Ch2 VGH@Vcc=18V 9 ns Gate Tr and Tf @ 1nF Load Gate Clamping Voltage 50 °C Temperature Figure 15: Turn-on Propagation Delay vs. Temperature 11.0 V 10.5 V 10.0 V -50 °C 0 °C 0 °C 50 °C 100 °C 9 ns 8 ns 8 ns Tr_Ch2 Tf_Ch1 Tf_Ch2 7 ns 7 ns 6 ns 6 ns 5 ns -50 °C 150 °C Tr_Ch1 0 °C 50 °C 100 °C 150 °C Temperature Temperature Figure 18: Gate Output Tr and Tf time @ 1nF Load vs. Temperature Figure 17: Gate Clamping Voltage vs. Temperature www.irf.com © 2010 International Rectifier 18 IR11682S Package Details: SOIC8N www.irf.com © 2010 International Rectifier 19 IR11682S Tape and Reel Details: SOIC8N LOADED TAPE FEED DIRECTION A B H D F C NOTE : CONTROLLING DIM ENSION IN M M E G CARRIER TAPE DIMENSION FOR Metric Code Min Max A 7.90 8.10 B 3.90 4.10 C 11.70 12.30 D 5.45 5.55 E 6.30 6.50 F 5.10 5.30 G 1.50 n/a H 1.50 1.60 8SOICN Imperial Min Max 0.311 0.318 0.153 0.161 0.46 0.484 0.214 0.218 0.248 0.255 0.200 0.208 0.059 n/a 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 8SOICN Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 18.40 G 14.50 17.10 H 12.40 14.40 Imperial Min Max 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 n/a 0.724 0.570 0.673 0.488 0.566 www.irf.com © 2010 International Rectifier 20 IR11682S Part Marking Information www.irf.com © 2010 International Rectifier 21 IR11682S Ordering Information Standard Pack Base Part Number IR11682 Package Type SOIC8N Complete Part Number Form Quantity Tube/Bulk 95 IR11682SPBF Tape and Reel 2500 IR11682STRPBF The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 www.irf.com © 2010 International Rectifier 22