SST211 / 213 / 215

SST211 / 213 / 215
SST211DE / SST213DE / SST215DE N-Channel DMOS Switch - Zener Protected
Description: The SST211DE / SST213DE / SST215DE are enhancement‐mode MOSFETs designed for high speed low‐glitch switching in audio, video and high‐frequency applications. The family is normally used for ±5V analog switching or as a high speed driver of the SD214. These MOSFETs utilize lateral construction to achieve low capacitance and ultra‐fast switching speeds. An integrated Zener diode provides ESD protection A poly‐silicon gate is featured for manufacturing reliability. See SST5000 and SST54000 series for quad configurations. For non‐zener protected versions see SST210DE / SST214DE series Features: ƒ
Ultra‐High Speed Switching—tON: 1ns ƒ
Ultra‐Low Reverse Capacitance: 0.2pF ƒ
Low Guaranteed RDS @5V ƒ
Low Turn‐On Threshold Voltage (1.5V max) ƒ
N‐Channel Enhancement Mode Availability: SST211DE / SST213DE / SST215DE – TO‐253 (SOT‐143) SST211DE / SST213DE / SST215DE ‐ Bare die form Contact Micross for full package dimensions Pinout: Top View MAXIMUM RATINGS SST211 ‐30/25 ‐0.3/25 30 10 30 15 Gate‐Drain, Gate‐Source Voltage Gate‐Substrate Voltage Drain‐Source Voltage Source‐Drain Voltage Drain ‐Substrate Voltage Source‐Substrate Voltage LIMIT IN VOLTS SST213 SST215 ‐15/25 ‐25/30 ‐0.3/25 ‐0.3/30 10 20 10 20 15 25 15 25 Benefits: ƒ
High‐Speed System Performance ƒ
Low Insertion Loss at High Frequencies ƒ
Low Transfer Signal Loss ƒ
Single Supply Operation & Simple Driver Requirement Applications: ƒ
Fast Analog Switching ƒ
Fast Sample & Holds ƒ
Pixel‐Rate Switching ƒ
DAC Deglitchers ƒ
High‐Speed Driver MAXIMUM RATINGS (Continued) Drain Current Lead Temperature (1/16” from ease, 10s) Storage Temperature Operating Junction Temperature Power Dissipation Derate 3mW/C° above 25°C LIMITS TEST CONDITIONS TYP SST211DE SST213DE MIN MAX MIN MAX VGS = VBS = 0V, ID = 10µA 35 30 ‐ ‐ ‐ LIMIT UNIT 50 300 ‐65 to 150 ‐55 to 125 300 mA °C °C °C Click To Buy
ELECTRICAL SPECIFICATION TA = 25°C unless otherwise noted DRAIN‐SOURCE BREAKDOWN VOLTAGE SYMBOL SOURCE‐DRAIN BREAKDOWN VOLTAGE DRAIN‐SUBSTRATE BREAKDOWN VOLTAGE SOURCE‐SUBSTRATE BREAKDOWN VOLTAGE DRAIN‐SOURCE LEAKAGE V(BR)DS UNIT V 30 10 ‐ 10 ‐ 20 ‐ V(BR)SD VGD = VBD = ‐5V, IS = 10nA 22 10 ‐ 10 ‐ 20 ‐ V(BR)DBO 35 15 ‐ 15 ‐ 25 ‐ 35 15 ‐ 15 ‐ 25 ‐ 0.4 0.9 0.5 1 0.01 ‐ ‐ ‐ ‐ ‐ 10 ‐ 10 ‐ 100 ‐ ‐ ‐ ‐ ‐ 10 ‐ 10 ‐ 100 ‐ ‐ ‐ ‐ ‐ ‐ 10 ‐ 10 100 nA 0.8 0.5 1.5 0.1 1.5 0.1 1.5 V 60 40 30 26 24 10.5 0.9 2.5 1.1 3.7 0.2 0.5 0.6 2 6 ‐ ‐ ‐ ‐ ‐ 9 ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ 75 50 ‐ ‐ ‐ ‐ ‐ 3.5 1.5 5.5 0.5 1 1 ‐ ‐ ‐ ‐ ‐ ‐ ‐ 9 ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ 75 50 ‐ ‐ ‐ ‐ ‐ 3.5 1.5 5.5 0.5 1 1 ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ -
75 50 ‐ ‐ ‐ 9 9 3.5 1.5 5.5 0.5 1 1 -
Ω GATE LEAKAGE IGBS THRESHOLD VOLTAGE VGS(th) VDS =VGS , ID = 1µA, VSB = 0V DRAIN‐SOURCE‐ON RESISTANCE V(BR)SBO IDS(off) ISD(off) RDS(on) FORWARD TRANSCONDUCTANCE gfs gos GATE NODE CAPACITANCE DRAIN NODE CAPACITANCE SOURCE NODE CAPACITANCE REVERSE TRANSFER CAPACITANCE TURN‐ON TIME C(GS+GD+GB) C(GD+GB) C(GS+SB) Crss tD(on) tr tD(off) tf TURN‐OFF TIME mW VGS = VBS = ‐5V, ID = 10nA VGB = 0V, ID = 10nA Source Open VGB = 0V, IS = 10µA Drain Open VGS=VBS =‐5V VDS = 10V VDS = 20V VGD =VBD=‐5V VSD = 10V VSD = 20V VDB = VSB = 0V , VGB = 30V SOURCE‐DRAIN LEAKAGE SST215DE MIN MAX ‐ ‐ VSB = 0V ID = 1mA VGS = 5V VGS = 10V VGS = 15V VGS = 20V VGS = 25V VDS = 10V , VSB = 0V ID = 20mA, f = 1kHz VDS = 10V , f = 1MHz VGS = VBS = ‐15V VSB = 0V, VIN 0 to 5V, RG = 25Ω, VDD = 5V RL = 680Ω This is trial version
IfLtd,you
version,
pleaseEmail:
register
it, thank you.
Micross Components
Unitedwant
Kingdom, get
Tel: +44full
1603 788967,
Fax: +44 1603788920,
[email protected]
Web: www.micross.com
www.verypdf.com
Demo (http://www.verypdf.com)
mS pF ns Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents
or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.