MAXIM MAX17504

19-6844; Rev 1; 2/14
备有评估板
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
概述
优势和特性
MAX17504是一款高效率、高电压、同步整流降压型转换
器;内置双MOSFET,可工作在4.5V至60V的输入电压范
围。它可提供高达3.5A的电流以及0.9V至90% VIN输出电
压。全输出电压范围的内置补偿,无需外部元件。反馈(FB)
调节精度在-40°C至+125°C温度范围内为±1.1%。器件采
用紧凑的(5mm x 5mm) TQFN无铅(Pb)封装,带裸焊盘。
提供仿真模型。
●
减少外围器件,降低总体成本
• 无需肖特基同步电路,提高效率、降低成本
• 内部补偿,在任意输出电压下均可稳定工作
• 全陶瓷电容设计:超小尺寸布局,外部元件只有8个
●
减少DC-DC稳压器物料清单
• 4.5V至60V宽输入电压范围
• 0.9V至90% VIN输出电压
• 整个温度范围内提供高达3.5A电流
• 200kHz至2.2MHz可调节频率,附带外部同步
• 采用20引脚、5mm x 5mm、TQFN封装
●
降低功耗
• 峰值效率高于90%
• PFM和DCM模式,轻载时保持高效率
• 关断电流仅为2.8μA (典型值)。
●
工作可靠
• 打嗝模式限流和自动重启
• 内置输出电压监测(开漏RESET引脚)
• 电阻可编程EN/UVLO门限
• 可调软启动和预偏置上电电压
• -40°C至+125°C工作温度范围
器件采用峰值电流模式架构,带有MODE功能,可采用脉
宽调制(PWM)、脉冲频率调制(PFM)或非连续模式(DCM)
等 控 制 模 式。PWM工 作 模 式 在 任 何 负 载 条 件 下 都 保 持
固定频率工作,这在对开关频率敏感的应用中非常有用。
PFM工作模式没有负向电感电流以及轻载条件下额外的
跳脉冲,以提高效率。DCM工作模式不采用跳脉冲,而
是在轻载条件下仅禁止负向电感电流,采用固定工作频率
能工作比PFM模式的轻载更低负载条件下。DCM工作模
式的效率介于PWM和PFM模式之间。内置低导通电阻的
MOSFET确保满载时的高效率,同时也简化了PCB的布线。
可编程软启动功能可使用户降低输入浪涌电流。器件有一
个输出使能/欠压锁定引脚(EN/UVLO),允许用户在输入电
压达到相应要求时开启。输出电压成功达到稳压范围时,
经过一定延时,开漏的RESET引脚给系统输出一个电源就
绪指示信号。
应用
●
●
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工业电源
分布式电源调节
基站电源
壁挂式变压稳压器
高压单板系统
通用负载板上电源
定购信息在数据资料的最后给出。
相关型号以及配合该器件使用的推荐产品,请参见:china.maximintegrated.
com/MAX17504.related。
本文是英文数据资料的译文,文中可能存在翻译上的不准确或错误。如需进一步确认,请在您的设计中参考英文资料。
有关价格、供货及订购信息,请联络Maxim亚洲销售中心:10800 852 1249 (北中国区),10800 152 1249 (南中国区),
或访问Maxim的中文网站:china.maximintegrated.com。
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
Absolute Maximum Ratings
VIN to PGND..........................................................-0.3V to +65V
EN/UVLO to SGND................................................-0.3V to +65V
LX to PGND................................................-0.3V to (VIN + 0.3V)
BST to PGND.........................................................-0.3V to +70V
BST to LX..............................................................-0.3V to +6.5V
BST to VCC............................................................-0.3V to +65V
FB, CF, RESET, SS, MODE, SYNC,
RT to SGND......................................................-0.3V to +6.5V
VCC to SGND........................................................-0.3V to +6.5V
SGND to PGND.....................................................-0.3V to +0.3V
LX Total RMS Current.........................................................±5.6A
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70°C) (multilayer board)
TQFN (derate 33.3mW/°C above TA = +70°C).......2666.7mW
Operating Temperature Range.......................... -40NC to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65NC to +160°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θJA)...........30°C/W
Junction-to-Case Thermal Resistance (θJC)..................2°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to china.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VIN = VEN/UVLO = 24V, RRT = 40.2kI (500kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referenced to SGND, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
60
V
INPUT SUPPLY (VIN)
Input Voltage Range
Input Shutdown Current
VIN
IIN-SH
VEN/UVLO = 0V (shutdown mode)
2.8
VFB = 1V, MODE = RT= open
118
VFB = 1V, MODE = open
162
IQ_DCM
DCM mode, VLX = 0.1V
1.16
IQ_PWM
Normal switching mode, fSW = 500kHz,
VFB = 0.8V
9.5
IQ_PFM
Input Quiescent Current
4.5
4.5
µA
1.8
mA
ENABLE/UVLO (EN/UVLO)
EN/UVLO Threshold
EN/UVLO Input Leakage Current
VENR
VEN/UVLO rising
1.19
1.215
1.24
VENF
VEN/UVLO falling
1.068
1.09
1.111
-50
0
+50
nA
4.75
5
5.25
V
VCC = 4.3V, VIN = 6V
26.5
54
100
mA
VIN = 4.5V, IVCC = 20mA
4.2
IEN
VEN/UVLO = 0V, TA = +25ºC
V
LDO
VCC Output Voltage Range
VCC Current Limit
VCC Dropout
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VCC
IVCC-MAX
VCC-DO
6V < VIN < 60V, IVCC = 1mA
1mA ≤ IVCC ≤ 25mA
V
2
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT = 40.2kI (500kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referenced to SGND, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCC_UVR
VCC rising
4.05
4.2
4.3
VCC_UVF
VCC falling
3.65
3.8
3.9
High-Side nMOS On-Resistance
RDS-ONH
ILX = 0.3A
165
325
mΩ
Low-Side nMOS On-Resistance
RDS-ONL
ILX = 0.3A
80
150
mΩ
LX Leakage Current
ILX_LKG
VLX = VIN - 1V, VLX = VPGND + 1V,
TA = +25ºC
-2
+2
µA
VSS = 0.5V
4.7
5
5.3
µA
MODE = SGND or MODE = VCC
0.89
0.9
0.91
MODE = open
0.89
0.915
0.936
0 < VFB < 1V, TA = +25ºC
-50
VCC UVLO
V
POWER MOSFET AND BST DRIVER
SOFT-START (SS)
Charging Current
ISS
FEEDBACK (FB)
FB Regulation Voltage
VFB_REG
FB Input Bias Current
IFB
+50
V
nA
MODE
MODE Threshold
VM-DCM
MODE = VCC (DCM mode)
VM-PFM
MODE = open (PFM mode)
VM-PWM
MODE = GND (PWM mode)
VCC 1.6
V
VCC/2
1.4
CURRENT LIMIT
Peak Current-Limit Threshold
Runaway Current-Limit Threshold
IPEAK-LIMIT
IRUNAWAY-LIMIT
Valley Current-Limit Threshold
ISINK-LIMIT
PFM Current-Limit Threshold
IPFM
MODE = open or MODE = VCC
4.4
5.1
4.9
-0.16
MODE = GND
5.85
A
5.7
6.7
A
0
+0.16
-1.8
MODE = open
0.6
0.75
0.9
RRT = 102kΩ
180
200
220
A
A
RT AND SYNC
Switching Frequency
fSW
SYNC Frequency Capture Range
SYNC Pulse Width
SYNC Threshold
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RRT = 40.2kΩ
475
500
525
RRT = 8.06kΩ
1950
2200
2450
RRT = OPEN
460
500
540
fSW set bt RRT
1.1 x
fSW
1.4 x
fSW
50
VIH
VIL
kHz
kHz
ns
2.1
0.8
V
3
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT = 40.2kI (500kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referenced to SGND, unless otherwise noted.) (Note 2)
PARAMETER
VFB Undervoltage Trip Level to
Cause Hiccup
SYMBOL
CONDITIONS
VFB-HICF
HICCUP Timeout
MIN
TYP
MAX
UNITS
0.56
0.58
0.6
V
(Note 3)
Minimum On-Time
tON-MIN
Minimum Off-Time
tOFF-MIN
32768
140
LX Dead Time
Cycles
135
ns
160
ns
5
ns
RESET
RESET Output Level Low
IRESET = 1mA
RESET Output Leakage Current
TA = TJ = +25ºC, VRESET = 5.5V
-0.1
0.4
V
+0.1
µA
VOUT Threshold for RESET
Assertion
VFB-OKF
VFB falling
90.5
92
94
%
VOUT Threshold for RESET
Deassertion
VFB-OKR
VFB rising
93.8
95
97.2
%
RESET Deassertion Delay After FB
Reaches 95% Regulation
1024
Cycles
165
ºC
10
ºC
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Temperature rising
Thermal Shutdown Hysteresis
Note 2: All limits are 100% tested at +25°C. Limits over temperature are guaranteed by design.
Note 3: See the Overcurrent Protection/HICCUP Mode section for more details.
china.maximintegrated.com
4
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
典型工作特性
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT toc01
100
100
90
VIN = 24V
70
VIN = 36V
VIN = 48V
VIN = 12V
60
50
80
VIN = 24V VIN = 36V
70
VIN = 12V
60
EFFICIENCY (%)
80
VIN = 48V
0
40
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
70
VIN = 48V
VIN = 24V VIN = 36V
100
1000
3500
VIN = 48V
VIN = 36V
VIN = 24V
70
60
VIN = 12V
50
VIN = 12V
40
40
MODE = OPEN
1
10
100
1000
30
3500
MODE = VCC
1
3.3V OUTPUT, DCM MODE,
FIGURE 4 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT
100
OUTPUT VOLTAGE (V)
VIN = 12V
60
50
40
10
100
LOAD CURRENT (mA)
china.maximintegrated.com
1000
5.05
toc07
VIN = 36V
5.04
5.03
5.02
5.01
VIN = 12V VIN = 48V
5.00
4.99
MODE = VCC
1
3500
5.06
VIN = 24V
70
1000
5.07
VIN = 36V
80
100
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT,
LOAD AND LINE REGULATION
5.08
VIN = 48V
90
10
LOAD CURRENT (mA)
LOAD CURRENT (mA)
EFFICIENCY (%)
10
5V OUTPUT, DCM MODE,
FIGURE 3 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT
100
80
30
MODE = OPEN
1
LOAD CURRENT (mA)
80
30
VIN = 12V
LOAD CURRENT (mA)
90
50
VIN = 48V
VIN = 24V VIN = 36V
60
30
500 1000 1500 2000 2500 3000 3500
EFFICIENCY (%)
EFFICIENCY (%)
0
90
60
70
40
MODE = SGND
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT toc04
100
80
50
50
MODE = SGND
5V OUTPUT, PFM MODE,
FIGURE 3 CIRCUIT,
EFFICIENCY vs. LOAD CURRENTtoc03
100
90
EFFICIENCY (%)
EFFICIENCY (%)
90
40
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT toc02
3500
4.98
VIN = 24V
MODE = SGND
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
5
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
典型工作特性(续)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, PFM MODE,
FIGURE 3 CIRCUIT,
LOAD AND LINE REGULATION toc09
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT,
LOAD AND LINE REGULATION
3.36
toc08
5.5
3.35
3.31
3.30
VIN = 36V
VIN = 12V
3.28
VIN = 24V
3.27
5.1
5.0
4.9
4.8
4.5
LOAD CURRENT (mA)
SWITCHING FREQUENCY (kHz)
VIN = 36V
4.6
500 1000 1500 2000 2500 3000 3500
VIN = 48V
MODE = OPEN
0
3.4
3.3
3.2
VIN = 24V
3.1
3.0
500 1000 1500 2000 2500 3000 3500
toc10
VIN = 12V
VIN = 36V
VIN = 48V
MODE = OPEN
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
SWITCHING FREQUENCY
vs. RT RESISTANCE
2400
VIN = 12V
4.7
MODE = SGND
0
OUTPUT VOLTAGE (V)
3.32
3.29
5.2
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VIN = 48V
3.5
VIN = 24V
5.3
3.33
3.26
3.6
5.4
3.34
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT,
LOAD AND LINE REGULATION
LOAD CURRENT (mA)
SOFT-START/SHUTDOWN FROM EN/UVLO,
5V OUTPUT, 3.5A LOAD CURRENT,
FIGURE 3 CIRCUIT
toc12
toc11
2200
2000
VEN/UVLO
1800
2V/div
1600
1400
1200
1000
800
600
400
200
0
0
20
40
60
80
VOUT
2V/div
IOUT
2A/div
VRESET
5V/div
100
1ms/div
RRT (kΩ)
SOFT-START/SHUTDOWN FROM EN/UVLO,
3.3V OUTPUT, 3.5A LOAD CURRENT,
FIGURE 4 CIRCUIT
toc13
SOFT-START/SHUTDOWN FROM EN/UVLO,
5V OUTPUT, PFM MODE, 5mA LOAD CURRENT,
FIGURE 3 CIRCUIT
toc14
MODE = OPEN
VEN/UVLO
2V/div
VOUT
2V/div
IOUT
2A/div
VRESET
5V/div
VEN/UVLO
2V/div
VOUT
1V/div
VRESET
1ms/div
china.maximintegrated.com
2ms/div
5V/div
6
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
典型工作特性(续)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
SOFT-START WITH 2.5V PREBIAS,
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT
SOFT-START/SHUTDOWN FROM EN/UVLO,
3.3V OUTPUT, PFM MODE, 5mA LOAD CURRENT,
FIGURE 4 CIRCUIT
toc15
VEN/UVLO
2V/div
SOFT-START WITH 2.5V PREBIAS,
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT
toc17
toc16
VEN/UVLO
VEN/UVLO
2V/div
2V/div
1V/div
2V/div
VOUT
VRESET
1V/div
VOUT
5V/div
VRESET
VOUT
VRESET
5V/div
5V/div
MODE = SGND
MODE = OPEN
2ms/div
MODE = OPEN
1ms/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, 3.5A LOAD CURRENT,
FIGURE 3 CIRCUIT
toc18
1ms/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, PWM MODE, NO LOAD,
FIGURE 3 CIRCUIT
toc19
MODE = SGND
VOUT
(AC)
20mV/div
VOUT
(AC)
VLX
10V/div
VLX
10V/div
ILX
500mA/div
ILX
2A/div
1μs/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, PFM MODE, 25mA LOAD,
FIGURE 3 CIRCUIT
toc20
20mV/div
1μs/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, DCM MODE, 25mA LOAD,
FIGURE 3 CIRCUIT
toc21
MODE = VCC
VOUT
(AC)
100mV/
div
VOUT
(AC)
VLX
10V/div
VLX
10V/div
500mA/div
ILX
200mA/div
ILX
20mV/div
MODE = OPEN
10μs/div
china.maximintegrated.com
1μs/div
7
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
典型工作特性(续)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, PWM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM 1.75A TO 3.5A)
toc22
VOUT
(AC)
100mV/div
IOUT
2A/div
3.3V OUTPUT, PWM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM 1.75A TO 3.5A)
toc23
VOUT
(AC)
100mV/div
IOUT
2A/div
40μs/div
100μs/div
5V OUTPUT, PWM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM NO LOAD TO 1.75A)
toc24
VOUT
(AC)
100mV/div
IOUT
MODE = SGND
1A/div
3.3V OUTPUT, PWM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM NO LOAD TO 1.75A) toc25
VOUT
(AC)
IOUT
100mV/div
1A/div
MODE = SGND
40μs/div
100μs/div
5V OUTPUT, PFM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM 5mA TO 1.75A)
toc26
3.3V OUTPUT, PFM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM 5mA TO 1.75A)
toc27
VOUT
(AC)
IOUT
100mV/div
1A/div
MODE = OPEN
2ms/div
china.maximintegrated.com
VOUT
(AC)
IOUT
100mV/div
1A/div
MODE = OPEN
2ms/div
8
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
典型工作特性(续)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, DCM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM 50mA TO 1.75A)
toc28
VOUT
(AC)
3.3V OUTPUT, DCM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM 50mA TO 1.75A)
toc29
100mV/div
VOUT
(AC)
1A/div
IOUT
100mV/div
1A/div
IOUT
MODE = VCC
MODE = VCC
200μs/div
200μs/div
OVERLOAD PROTECTION
5V OUTPUT, FIGURE 3 CIRCUIT
APPLICATION OF EXTERNAL CLOCK AT 700kHz
5V OUTPUT, FIGURE 3 CIRCUIT toc31
toc30
VOUT
2V/div
VLX
1A/div
IOUT
10V/div
VSYNC
2V/div
MODE = SGND
20ms/div
2μs/div
5V OUTPUT, 3.5A LOAD CURRENT
BODE PLOT, FIGURE 3 CIRCUIT toc32
toc33
140
60
140
50
120
50
120
40
100
40
80
30
PHASE
40
GAIN
0
-10
-20
-30
-40
1K
20
CROSSOVER
FREQUENCY = 48.4KHz,
PHASE MARGIN = 62.3°
10K
FREQUENCY (Hz)
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100K
PHASE
20
100
80
60
GAIN
10
40
0
20
0
-10
-20
-20
-40
-30
-60
-40
1K
PHASE (°)
10
60
PHASE (°)
20
GAIN (dB)
60
30
GAIN (dB)
3.3V OUTPUT, 3.5A LOAD CURRENT,
BODE PLOT, FIGURE 4 CIRCUIT
0
CROSSOVER
FREQUENCY = 52.7KHz,
PHASE MARGIN = 62.4°
-20
-40
-60
10K
100K
FREQUENCY (Hz)
9
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
PGND
SGND
VCC
MODE
TOP VIEW
PGND
引脚配置
15
14
13
12
11
PGND 16
10
RT
LX 17
9
FB
8
CF
7
SS
6
SYNC
MAX17504
LX 18
LX 19
3
4
5
RESET
2
EN/UVLO
VIN
1
VIN
+
VIN
BST 20
TQFN
5mm × 5mm
* EXPOSED PAD (CONNECT TO SIGNAL GROUND).
引脚说明
引脚
名称
功能
1, 2, 3
VIN
电源输入,4.5V至60V输入电压范围。将V IN 引脚连接在一起。利用两个2.2μF陶瓷电容将该引脚连接至
PGND,进行去耦;电容尽量靠近VIN和PGND引脚放置。布局示例请参考MAX17504评估板数据资料。
4
EN/UVLO
使能/欠压锁定。EN/UVLO为电平驱动,高电平时,电压输出使能;连接至VIN和SGND之间的电阻分压器
中心,用于设置输入电压达到多少时MAX17504开启。上拉至VIN时,器件始终开启。
5
RESET
开漏/复位输出。如果FB电压下降到设定值的92%以下,则将RESET输出拉至低电平;FB电压上升到设定
值的95%并保持1024个时钟周期后,RESET跳变为高电平。
6
SYNC
通过该引脚可与外部时钟同步。更详细信息请参见外部频率同步章节。
7
SS
软启动输入。在SS和SGND之间连接电容,设置软启动时间。
8
CF
开关频率低于500kHz时,在CF和FB之间连接电容。如果开关频率等于或高于500kHz,使CF保持开路。详
情请参见环路补偿章节。
9
FB
反馈输入。将FB连接至输出与SGND之间外部电阻分压器的中心抽头,用于设置输出电压。更多详细信息
请参见调节输出电压部分。
10
RT
在RT和SGND之间连接电阻,设置稳压器的开关频率。使RT保持开路时,开关频率为默认500kHz。更多
详细信息请参见设置开关频率(RT)部分。
11
MODE
MODE引脚用于将MAX17504配置为PWM、PFM或DCM工作模式。MODE浮空时,为PFM工作模式(轻
载时跳脉冲);将MODE连接至SGND时,全部负载条件下均为固定频率PWM工作模式;将MODE连接至
VCC时,为DCM工作模式。更多详细信息请参见MODE设置部分。
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10
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
引脚说明(续)
引脚
名称
功能
12
VCC
13
SGND
模拟地。
14, 15, 16
PGND
电源地。在外部将PGND引脚连接至电源地区域。在VCC旁路电容地回路中将SGND和PGND引脚连接在一
起。请参考MAX17504评估板的布局布线。
17, 18, 19
LX
20
BST
—
5V LDO输出。利用2.2μF陶瓷电容将VCC旁路至SGND。
开关节点。将LX引脚连接至电感的开关侧。
升压飞电容。在BST和LX之间连接0.1μF陶瓷电容。
裸焊盘,连接至SGND引脚。连接至IC下方较大的覆铜区域,以改善散热性能。在裸焊盘下方增加散热过
孔。布局示例请参考MAX17504评估板数据资料。
EP
方框图
VCC
5V
BST
MAX17504
LDO
VIN
SGND
CURRENT-SENSE
LOGIC
EN/UVLO
LX
PWM/
PFM/
HICCUP
LOGIC
HICCUP
1.215V
RT
PGND
OSCILLATOR
SYNC
CF
FB
VCC
SS
SWITCHOVER
LOGIC
VBG = 0.9V
SLOPE
COMPENSATION
5µA
FB
HICCUP
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MODE
SELECTION
LOGIC
ERROR AMPLIFIER/
LOOP COMPENSATION
EN/UVLO
MODE
RESET
RESET
LOGIC
11
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
详细说明
PFM工作模式
MAX17504是一款高效率、高电压、同步整流降压型转换
器;内置双MOSFET,可工作在4.5V至60V的输入电压范
围。它可提供高达3.5A的电流以及0.9V至90% VIN输出电
压。全输出电压范围的内置补偿,无需外部元件。反馈(FB)
调节精度在-40°C至+125°C温度范围内为±1.1%。
PFM工作模式可消除负向电感电流以及轻载下额外的跳脉
冲,以获得高效率。PFM模式,每个时钟周期的电感电流
峰值强制为固定的750mA,直到输出上升到标称电压的
102.3%。一旦输出达到标称电压的102.3%后,上边和下
边的FET都关断,器件进入深度休眠状态,直到负载将输
出放电至标称电压的101.1%。在深度休眠状态下,大部
分内部模块被关断,以节约静态电流。当输出下降至标称
电压的101.1%以下时,器件退出深度休眠模式,开起全
部内部所有的电路,再次开始向输出提供能量脉冲的过程,
直到输出达到标称输出电压的102.3%。
器件采用峰值电流模式控制架构。内部的一个传导误差放
大器在内部节点产生积分误差电压,误差电压通过PWM
比较器、高边检流放大器和斜率补偿发生器设置占空比。
在每个时钟的上升沿,上端的MOSFET开启并保持导通,
直到达到适当的或者最大的占空比,或者是到峰值限流
被检测到。在上端的MOSFET导通期间,电感电流上升。
在开关周期的后半周期,上边的MOSFET断开,下边的
MOSFET导通。电感电流下降的同时释放储能,为输出提
供电流。
器 件 有 个MODE引 脚, 用 于 将 器 件 置 于PWM、PFM或
DCM工作模式。器件集成了可调的输入欠压锁定、可调的
软启动、开路复位,以及外部频率同步功能。
模式选择(MODE)
PFM模式的优点是轻载时效率较高,因为它消耗的静态电
流较低;缺点是相对于PWM或DCM工作模式,输出电压
纹波较高,并且轻载时开关频率不固定。
DCM工作模式
DCM工作模式不采用跳脉冲,而是在轻载条件下仅禁止负
向电感电流,所以采用固定频率可工作在比PFM模式的更
轻的负载条件下。DCM工作模式的效率介于PWM和PFM
模式之间。
当VCC和EN/UVLO电压超过相应UVLO上升门限,同时内
部电压都准备就绪、允许LX进行开关工作时,MODE引脚
的逻辑状态就被锁定。如果MODE引脚在上电时开路,器
件在轻载时工作在PFM模式;如果MODE引脚在上电时接
地,器件在所有负载条件下工作在固定频率的PWM模式;
如果MODE引脚在上电时连接至VCC,器件在轻载时工作
在固定频率的DCM模式。常规工作期间,MODE引脚的状
态变化将不予理睬。
线性调节器(VCC)
PWM工作模式
MAX17504的 开 关 频 率 可 利 用RT和SGND之 间 的 电 阻 设
置,范围为200kHz至2.2MHz。开关频率(fSW)与RT引脚电
阻(RRT)的关系如下式:
PWM模式下,允许电感电流出现负值。PWM工作模式在
任何负载条件下都固定频率工作,这对开关频率敏感的应
用是有好处。然而,相对于PFM和DCM工作模式,PWM
模式在轻载条件下效率较低。
内部线性调节器(VCC)提供一个5V标称电源,它为内部电路
及下边MOSFET驱动器供电。线性稳压器的输出(VCC)必须
用2.2μF陶瓷电容旁路至SGND。MAX17504采用欠压锁定
电路,当VCC下降至3.8V (典型值)以下时,就禁止内部线
性稳压器。
设置开关频率(RT)
R RT ≅
21× 10 3
f SW
−
1.7
式中,RRT的单位为kΩ,fSW的单位为kHz 。RT引脚开路
时,器件工作在500kHz默认开关频率。关于几个常见开关
频率对应的RT电阻值,请参见表1。
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12
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
表1. 开关频率及对应RT电阻
过流保护/打嗝模式
SWITCHING FREQUENCY (kHz)
RT RESISTOR (kΩ)
500
OPEN
200
102
400
49.9
1000
19.1
2200
8.06
输入电压工作范围
给定输出电压的最小和最大输入电压计算如下:
VIN(MIN) =
VOUT + (I OUT(MAX) × (R DCR + 0.15))
1- (f SW(MAX) × t OFF(MAX) )
+ (I OUT(MAX) × 0.175)
VIN(MAX) =
VOUT
f SW(MAX) × t ON(MIN)
式中,VOUT为稳态输出电压,IOUT(MAX)为最大负载电流,
RDCR为 电 感 的 直 流 电 阻,fSW(MAX)为 最 大 开 关 频 率,
tOFF(MAX)为 最 差 工 作 条 件 下 的 最 小 关 断 时 间(160ns),
tON(MIN)为最差工作条件下的导通时间(135ns)。
外部频率同步(SYNC)
MAX17504的内部振荡器可同步至SYNC引脚上的外部时
钟信号。外部同步时钟频率必须介于1.1 x fSW至1.4 x fSW
之间,其中fSW为RT电阻设定的频率。外部时钟脉宽为高
电平的最小时间应大于50ns。详细信息请参见Electrical
Characteristics 表中的RT和SYNC部分。
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MAX17504具有可靠的过流保护机制,在过载和输出短路
的条件下有效保护器件。当上边的开关电流超过5.1A (典
型值)的内部限定值时,逐周期间的峰值限流电路将断开上
边的MOSFET。高输入电压、短路条件(输出电压不足以
恢复降压转换器导通期间建立的电感电流)下,上边开关
5.7A (典型值)失控电流检测门限将为器件提供有效保护。
一旦达到失控电流门限,则触发打嗝模式。此外,完成软
启动后,如果反馈电压在任何时间因为故障条件而下降到
0.58V (典型值),同样触发打嗝模式。打嗝模式下,在打
嗝超时周期(32,768个时钟周期)内暂停开关工作,保护转
换器;达到打嗝超时周期后,再次尝试软启动。注意,当
在过载条件下尝试软启动时,如果反馈电压未超过0.58V,
器件以设定开关频率的一半进行开关操作。打嗝工作模式
确保输出短路条件下保持低功耗。
RESET输出
MAX17504包括一个RESET比较器,以监测输出电压。开
漏RESET输出需要外部上拉电阻,稳压器输出升高至标称
稳压值的95%以上,并保持1024个开关周期后,RESET跳
变为高电平(高阻)。稳压器输出电压下降到标称稳压值的
92%以下时,RESET跳变到低电平。热关断期间,RESET
为低电平。
预偏置输出
当MAX17504开始进入预偏置输出时,上边和下边开关均
关断,使转换器不从输出吸入电流,直至PWM比较器触
发第一个PWM脉冲时,上边和下边开关才开始工作;然
后输出电压平稳上升,接近内部基准设置的目标电压。
热关断保护
热关断保护限制MAX17504内部的总功耗,当器件结温超
过+165°C时,芯片上内置的温度传感器关断器件,允许器
件冷却。结温下降10°C后,温度传感器将器件再次打开。
热关断期间会进行软启动复位。严格评估总体功耗(参见 功率耗散 部分),以免在正常工作时意外触发热关断保护。
13
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
应用信息
输出电容选择
输入电容选择
工业应用中,考虑到温度稳定性的要求,X7R陶瓷输出电
容为首选。输出电容的大小需要支持具体应用输出最大电
流时50%的负载跃变,因此输出电压偏差能维持在输出电
压变化的3%。最小输出电容可计算如下:
输入滤波电容用于抑制输入端电源带来的尖峰电流,减小
电路开关工作引起的输入噪声和电压纹波。输入电容的
RMS电流(IRMS)由下式确定:
=
IRMS I OUT(MAX) ×
VOUT × (VIN - VOUT )
VIN
式中,IOUT(MAX)为最大负载电流。输入电容等于输出电压
的2倍时(VIN = 2 x VOUT),IRMS的值最大,所以IRMS(MAX)
= IOUT(MAX)/2。
所选电容在RMS输入电流下的温升应低于+10°C,以确保
最佳长期稳定性。在输入端使用低ESR、可承受高纹波电
流的陶瓷电容。工业应用中,为了保证温度稳定性,建议
使用X7R电容。采用下式计算输入电容:
C IN =
I OUT(MAX) × D × (1- D)
η × f SW × ∆VIN
式中,D = VOUT/VIN为控制器的占空比,fSW为开关频率,
ΔVIN为允许的输入电压纹波,E为效率。
在电源距离MAX17504输入较远的应用中,应该给陶瓷电
容并联一个电解电容,在输入电源通路较长的情况下,能
够抑制电源线电感和输入陶瓷电容引起的潜在自激。
电感选择
为配合MAX17504工作,必须规定三个关键的电感参数:
电感值(L)、电感饱和电流(ISAT)以及直流电阻(RDCR)。开关
频率和输出电压决定电感值,关系如下:
V
L = OUT
f SW
式中,VOUT和fSW为标称值。
选择最接近计算值的低损耗电感,并且电感尺寸在可接受
范围,直流电阻最低。电感饱和电流额定值(ISAT)必须足够
高,以确保电流在峰值电流门限5.1A以上时才会发生饱和。
1 I STEP × t RESPONSE
×
2
∆VOUT
C OUT=
t RESPONSE ≅ (
0.33
1
+
)
fC
f sw
式中,ISTEP为负载电流步长,tRESPONSE为控制器的响应
时间,ΔVOUT为允许的输出电压偏差,fC为目标闭环交越
频率,fSW为开关频率。如果开关频率小于或等于500kHz,
选择fC为fSW的1/9;如果开关频率高于500kHz,选择fC为
55kHz。
软启动电容选择
MAX17504采用可调软启动的方法以降低浪涌电流。在SS
引脚和SGND之间连接外部电容,设置软启动时间。所选
的输出电容(CSEL)和输出电压(VOUT)决定软启动所要求的
最小电容,关系如下:
CSS ≥ 28 x 10-6 x CSEL x VOUT
软启动时间(tSS)与SS上所连接电容(CSS)的关系如下式:
tSS = CSS/(5.55 x 10-6)
例如,为了实现2ms软启动时间,需在SS引脚和SGND之
间连接一个12nF电容。
VIN
R1
EN/UVLO
R2
SGND
图1. 设置输入欠压锁定
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14
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
设置输入欠压锁定电平
MAX17504的输入欠压锁定电平是可调节的。利用VIN和
SGND之间连接的电阻分压器设置MAX17504的开启电压。
将分压器的中间节点连接至EN/UVLO。
选择R1为3.3MΩ,按下式计算R2:
表2. 不同开关频率对应的C6电容值
SWITCHING FREQUENCY RANGE (kHz)
C6 (pF)
200 to 300
2.2
300 to 400
1.2
400 to 500
0.75
R1× 1.215
R2 =
(VINU - 1.215)
VOUT
式中,VINU为MAX17504开启电压。应确保VINU高于0.8 x
VOUT。
R3
FB
环路补偿
R4
MAX17504具有内部环路补偿。然而,如果开关频率低于
500kHz,在CF引脚和FB引脚之间连接0402电容C6。利用
表2选择C6的值。
SGND
图2. 设置输出电压
调节输出电压
利用输出电容(VOUT)正端与SGND之间连接的电阻分压器
设置输出电压(见图2)。将电阻分压器的中间节点连接至FB
引脚。采用以下步骤选择电阻分压器的值:
利用下式计算输出与FB之间的电阻R3:
R3 =
216 × 10 3
f C × C OUT
式中,R3的单位为kΩ,交越频率fC的单位为kHz,输出电
容COUT的单位为μF。如果开关频率小于或等于500kHz,
选择fC为开关频率fSW的1/9;如果开关频率高于500kHz,
选择fC为55kHz。
利用下式计算FB与SGND之间的电阻R4:
R3 × 0.9
R4 =
(VOUT - 0.9)
功率耗散
应确保MAX17504结温在规定的电源工作条件下不超过
+125°C。
特定工作条件下,按下式估算功率损耗导致器件温度升高
值:
(
1
PLOSS =
(POUT × ( - 1)) - I OUT 2 × R DCR
η
)
P=
OUT VOUT × I OUT
式中,POUT为输出功率,η为电源转换效率,RDCR为输出
电感的直流电阻(关于典型工作条件下效率的更多信息,请
参见典型工作特性 部分)。
对于多层电路板,封装的热性能参数由下式给出:
θ JA = 30°C W
θ JC =2°C W
可 利 用 下 式 估 算MAX17504在 任 意 给 定 最 大 环 境 温 度 (TA_MAX)下的结温:
TJ_MAX
= T A _MAX + (θ JA × PLOSS )
如果热管理系统提供适当散热,则可确保MAX17504的裸
焊盘维持在给定温度(TEP_MAX),可利用下式估算最大环境
温度下的结温:
T=
J_MAX TEP_MAX + (θ JC × PLOSS )
china.maximintegrated.com
15
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
PCB布局指南
通常是VCC旁路电容的返回点。以保证模拟地不受大功率
开关信号的影响。应尽量保证接地区域连续/不中断。不要
在任何非连续接地区域的正上方布设承载大开关电流的引
线。
所有承载脉冲电流的连线必须非常短,并尽可能宽。这些
引线的电感必须保持在最小值,否则电流的di/dt大。由于
电流承载环路的电感与环路的闭合面积成比例,缩小环路
面积有助于减小寄生电感。此外,小电流环路面积也可降
低EMI辐射。
PCB布局也影响设计的热性能。应在器件的裸焊盘下方提
供大面积覆铜,通过多个过孔接至较大的接地区域,以有
效散热。
输入滤波陶瓷电容应尽量靠近IC的VIN引脚,尽可能消除布
线电感的影响,为IC提供干净的电源。VCC引脚的旁路电
容也要靠近引脚放置,以减小引线阻抗的影响。
为确保设计的一次通过率,请参考MAX17504评估板布局,
可从以下网站下载:china.maximintegrated.com。
在IC周围布线时,模拟小信号地和开关电流的功率地应隔
离开;应该在开关信号最低的位置将其单点连接在一起,
VIN
(7.5V TO 60V)
EN/UVLO
VIN
VIN
BST
RT
LX
SYNC
MAX17504
MODE
C2
2.2µF
LX
LX
VCC
C8
2.2µF
C5
0.1µF
L1
10µH
VOUT
5V, 3.5A
C4
22µF
C9
22µF
R3
100kΩ
FB
SGND
CF
C1
2.2µF
VIN
R4
22.1kΩ
RESET
SS
PGND
PGND
PGND
C3
12000pF
fSW = 500kHz
L1 = SLF12575T-100M5R4-H
图3. 5V输出典型应用电路
china.maximintegrated.com
16
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
VIN
(5.5V TO 60V)
EN/UVLO
VIN
VIN
BST
RT
LX
SYNC
MAX17504
MODE
C2
2.2µF
LX
C8
2.2µF
C5
0.1µF
L1
6.8µH
LX
VCC
VOUT
3.3V, 3.5A
C4
22µF
C9
22µF
R3
82.5kΩ
FB
SGND
CF
C1
2.2µF
VIN
R4
30.9kΩ
RESET
SS
PGND
PGND
PGND
C3
12000pF
fSW = 500kHz
L1 = MSS1048-682NL
图4. 3.3V输出典型应用电路
定购信息
封装信息
器件
MAX17504ATP+
引脚-封装
20 TQFN 5mm x 5mm
注:除非另外说明,所有器件均可工作在-40ºC至+125ºC温度范
围。
+表示无铅(Pb)/符合RoHS标准的封装。
芯片信息
如需最近的封装外形信息和焊盘布局(占位面积),请查询china.
maximintegrated.com/packages。请注意,封装编码中的
“+”
、
“#”或
“-”仅表示RoHS状态。封装图中可能包含不同的尾缀字符,
但封装图只与封装有关,与RoHS状态无关。
封装类型
封装编码
外形编号
焊盘布局编号
20 TQFN-EP*
T2055+4
21-0140
90-0009
*EP = 裸焊盘。
PROCESS: BiCMOS
china.maximintegrated.com
17
MAX17504
4.5V–60V、3.5A、高效率、
同步降压DC-DC转换器,带内部补偿
修订历史
修订号
修订日期
说明
0
11/13
最初版本。
1
2/14
更新了TOC 32和33,以及典型应用电路特性。
修改页
—
9, 16, 17
Maxim北京办事处
免费电话:800 810 0310
电话:010-6211 5199
传真:010-6211 5299
Maxim不对Maxim产品以外的任何电路使用负责,也不提供其专利许可。Maxim保留在任何时间、没有任何通报的前提下修改产品资料和规格的权利。电气
特性表中列出的参数值(最小值和最大值)均经过设计验证,数据资料其它章节引用的参数值供设计人员参考。
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-10 00
18
© 2014 Maxim Integrated
Maxim标志和Maxim Integrated是Maxim Integrated Products, Inc.的商标。
MAX17504 4.5V–60V、3.5A、高效率、同步降压DC-DC转换器,带内部补偿 - ... Page 1 of 2
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我的Maxim
MAX17504
4.5V–60V、3.5A、高效率、同步降压DC-DC转换器,带内部补偿
业内仅有的60V、3.5A同步降压转换器,带内部FET
概述
设计资源
定购信息
相关产品
所有内容
状况
数据资料
状况:生产中。
英文
下载
Rev. 1 (PDF, 1.8MB)
Email
概述
中文
下载
Rev. 1 (PDF, 1.6MB)
Email
MAX17504是一款高效率、高电压、同步整流降压型转换器;内置双MOSFET,可工作在4.5V至60V的输入电压范
围。它可提供高达3.5A的电流以及0.9V至90% VIN输出电压。全输出电压范围的内置补偿,无需外部元件。反馈
(FB)调节精度在-40°C至+125°C温度范围内为±1.1%。器件采用紧凑的(5mm x 5mm) TQFN无铅(Pb)封装,带裸焊
盘。提供仿真模型。
器件采用峰值电流模式架构,带有MODE功能,可采用脉宽调制(PWM)、脉冲频率调制(PFM)或非连续模式(DCM)
等控制模式。PWM工作模式在任何负载条件下都保持固定频率工作,这在对开关频率敏感的应用中非常有用。
PFM工作模式没有负向电感电流以及轻载条件下额外的跳脉冲,以提高效率。DCM工作模式不采用跳脉冲,而是
在轻载条件下仅禁止负向电感电流,采用固定工作频率能工作比PFM模式的轻载更低负载条件下。DCM工作模式
的效率介于PWM和PFM模式之间。内置低导通电阻的MOSFET确保满载时的高效率,同时也简化了PCB的布线。
可编程软启动功能可使用户降低输入浪涌电流。器件有一个输出使能/欠压锁定引脚(EN/UVLO),允许用户在输入
电压达到相应要求时开启。输出电压成功达到稳压范围时,经过一定延时,开漏的RESET引脚给系统输出一个电
源就绪指示信号。
现备有评估板:MAX17504EVKITA MAX17504EVKITB
关键特性




应用/使用
减少外围器件,降低总体成本
 无需肖特基同步电路,提高效率、降低成本
 内部补偿,在任意输出电压下均可稳定工作
 全陶瓷电容设计:超小尺寸布局,外部元件只有8个
减少DC-DC稳压器物料清单
 4.5V至60V宽输入电压范围
 0.9V至90% VIN输出电压
 整个温度范围内提供高达3.5A电流
 200kHz至2.2MHz可调节频率,附带外部同步
 采用20引脚、5mm x 5mm、TQFN封装
降低功耗
 峰值效率高于90%;
 PFM和DCM模式,轻载时保持高效率
 关断电流仅为2.8µA (典型值)
工作可靠
 打嗝模式限流和自动重启
 内置输出电压监测(开漏/RESET引脚)
 电阻可编程EN/UVLO门限
 可调软启动和预偏置上电电压
 -40°C至+125°C工作温度范围






基站电源
配电稳压
通用负载点电源
高压单板系统
工业电源
壁式变压器稳压
关键特性:
Step-Down Switching Regulators
Part Number
MAX17504 NEW!
VIN
(V)
VIN
(V)
VOUT1
(V)
VOUT1
(V)
min
max
min
4.5
60
0.9
IOUT1
(max)
(A)
Switch
Type
Synchronous
Switching
Power
Good
Signal
DC-DC
Outputs
Oper.
Freq.
(kHz)
Budgetary
Price
max
Output
Adjust.
Method
54
Resistor
3.5
Internal
Yes
Yes
1
2200
$1.81 @1k
See Notes
查看所有Step-Down Switching Regulators (310)
Pricing Notes:
价格仅供参考,用于同类产品的比较。所提供报价为美元,需要依汇率折合成人民币。该价格将因当地关税、税率和汇
率而异。有关特定订购量和指定版本的报价和供货问题,请参考:价格与供货网站或与指定代理商联系。
图表
http://china.maximintegrated.com/datasheet/index.mvp/id/8270
2014-3-24
MAX17504 4.5V–60V、3.5A、高效率、同步降压DC-DC转换器,带内部补偿 - ... Page 2 of 2
Typical Application Circuit
更多信息
新品发布
[ 2014-02-04 ]
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参考文献: 19-6844 Rev. 1; 2014-02-20
本页最后一次更新: 2014-02-20
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2014-3-24
EVALUATION KIT AVAILABLE
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
General Description
The
MAX17504
high-efficiency,
high-voltage,
synchronously rectified step-down converter with dual
integrated MOSFETs operates over a 4.5V to 60V
input. It delivers up to 3.5A and 0.9V to 90% VIN output
voltage. Built-in compensation across the output voltage
range eliminates the need for external components. The
feedback (FB) regulation accuracy over -40°C to +125°C
is ±1.1%. The device is available in a compact (5mm x
5mm) TQFN lead (Pb)-free package with an exposed pad.
Simulation models are available.
The device features a peak-current-mode control
architecture with a MODE feature that can be used to
operate the device in pulse-width modulation (PWM),
pulse-frequency modulation (PFM), or discontinuous
mode (DCM) control schemes. PWM operation provides
constant frequency operation at all loads, and is useful
in applications sensitive to switching frequency. PFM
operation disables negative inductor current and
additionally skips pulses at light loads for high efficiency.
DCM features constant frequency operation down to
lighter loads than PFM mode, by not skipping pulses,
but only disabling negative inductor current at light loads.
DCM operation offers efficiency performance that lies
between PWM and PFM modes. The low-resistance,
on-chip MOSFETs ensure high efficiency at full load and
simplify the layout.
Benefits and Features
● Eliminates External Components and Reduces Total Cost
• No Schottky-Synchronous Operation for High
Efficiency and Reduced Cost
• Internal compensation for Stable Operation at Any
Output Voltage
• All Ceramic Capacitor Solution: Ultra-Compact
Layout with as Few as Eight External Components
●
Reduce Number of DC-DC Regulators to Stock
• Wide 4.5V to 60V Input Voltage Range
• 0.9V to 90% VIN Output Voltage
• Delivers Up to 3.5A Over Temperature
• 200kHz to 2.2MHz Adjustable Frequency with
External Synchronization
• Available in a 20-Pin, 5mm x 5mm TQFN Package
●
Reduce Power Dissipation
• Peak Efficiency > 90%
• PFM and DCM Modes for High Light-Load Efficiency
• Shutdown Current = 2.8FA (typ)
● Operate Reliably
• Hiccup-Mode Current Limit and Autoretry Startup
• Built-In Output Voltage Monitoring—(Open-Drain
RESET Pin)
• Resistor Programmable EN/UVLO Threshold
• Adjustable Soft-Start and Pre-Biased Power-Up
• -40NC to +125NC Operation
A programmable soft-start feature allows users to reduce
input inrush current. The device also incorporates an
output enable/undervoltage lockout pin (EN/UVLO) that
allows the user to turn on the part at the desired inputvoltage level. An open-drain RESET pin provides a
delayed power-good signal to the sys­tem upon achieving
successful regulation of the output voltage.
Applications
●
●
●
●
●
●
Industrial Power Supplies
Distributed Supply Regulation
Base Station Power Supplies
Wall Transformer Regulation
High-Voltage Single-Board Systems
General-Purpose Point-of-Load
19-6844; Rev 1; 2/14
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part, refer
to www.maximintegrated.com/MAX17504.related.
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Absolute Maximum Ratings
VIN to PGND..........................................................-0.3V to +65V
EN/UVLO to SGND................................................-0.3V to +65V
LX to PGND................................................-0.3V to (VIN + 0.3V)
BST to PGND.........................................................-0.3V to +70V
BST to LX..............................................................-0.3V to +6.5V
BST to VCC............................................................-0.3V to +65V
FB, CF, RESET, SS, MODE, SYNC,
RT to SGND......................................................-0.3V to +6.5V
VCC to SGND........................................................-0.3V to +6.5V
SGND to PGND.....................................................-0.3V to +0.3V
LX Total RMS Current.........................................................±5.6A
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70°C) (multilayer board)
TQFN (derate 33.3mW/°C above TA = +70°C).......2666.7mW
Operating Temperature Range.......................... -40NC to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65NC to +160°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θJA)...........30°C/W
Junction-to-Case Thermal Resistance (θJC)..................2°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VIN = VEN/UVLO = 24V, RRT = 40.2kI (500kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referenced to SGND, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
60
V
INPUT SUPPLY (VIN)
Input Voltage Range
Input Shutdown Current
VIN
IIN-SH
VEN/UVLO = 0V (shutdown mode)
2.8
VFB = 1V, MODE = RT= open
118
VFB = 1V, MODE = open
162
IQ_DCM
DCM mode, VLX = 0.1V
1.16
IQ_PWM
Normal switching mode, fSW = 500kHz,
VFB = 0.8V
9.5
IQ_PFM
Input Quiescent Current
4.5
4.5
µA
1.8
mA
ENABLE/UVLO (EN/UVLO)
EN/UVLO Threshold
EN/UVLO Input Leakage Current
VENR
VEN/UVLO rising
1.19
1.215
1.24
VENF
VEN/UVLO falling
1.068
1.09
1.111
-50
0
+50
nA
4.75
5
5.25
V
VCC = 4.3V, VIN = 6V
26.5
54
100
mA
VIN = 4.5V, IVCC = 20mA
4.2
IEN
VEN/UVLO = 0V, TA = +25ºC
V
LDO
VCC Output Voltage Range
VCC Current Limit
VCC Dropout
www.maximintegrated.com
VCC
IVCC-MAX
VCC-DO
6V < VIN < 60V, IVCC = 1mA
1mA ≤ IVCC ≤ 25mA
V
Maxim Integrated │ 2
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT = 40.2kI (500kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referenced to SGND, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCC_UVR
VCC rising
4.05
4.2
4.3
VCC_UVF
VCC falling
3.65
3.8
3.9
High-Side nMOS On-Resistance
RDS-ONH
ILX = 0.3A
165
325
mΩ
Low-Side nMOS On-Resistance
RDS-ONL
ILX = 0.3A
80
150
mΩ
LX Leakage Current
ILX_LKG
VLX = VIN - 1V, VLX = VPGND + 1V,
TA = +25ºC
-2
+2
µA
VSS = 0.5V
4.7
5
5.3
µA
MODE = SGND or MODE = VCC
0.89
0.9
0.91
MODE = open
0.89
0.915
0.936
0 < VFB < 1V, TA = +25ºC
-50
VCC UVLO
V
POWER MOSFET AND BST DRIVER
SOFT-START (SS)
Charging Current
ISS
FEEDBACK (FB)
FB Regulation Voltage
VFB_REG
FB Input Bias Current
IFB
+50
V
nA
MODE
MODE Threshold
VM-DCM
MODE = VCC (DCM mode)
VM-PFM
MODE = open (PFM mode)
VM-PWM
MODE = GND (PWM mode)
VCC 1.6
V
VCC/2
1.4
CURRENT LIMIT
Peak Current-Limit Threshold
Runaway Current-Limit Threshold
IPEAK-LIMIT
IRUNAWAY-LIMIT
Valley Current-Limit Threshold
ISINK-LIMIT
PFM Current-Limit Threshold
IPFM
MODE = open or MODE = VCC
4.4
5.1
4.9
-0.16
MODE = GND
5.85
A
5.7
6.7
A
0
+0.16
-1.8
MODE = open
0.6
0.75
0.9
RRT = 102kΩ
180
200
220
A
A
RT AND SYNC
Switching Frequency
fSW
SYNC Frequency Capture Range
SYNC Pulse Width
SYNC Threshold
www.maximintegrated.com
RRT = 40.2kΩ
475
500
525
RRT = 8.06kΩ
1950
2200
2450
RRT = OPEN
460
500
540
fSW set bt RRT
1.1 x
fSW
1.4 x
fSW
50
VIH
VIL
kHz
kHz
ns
2.1
0.8
V
Maxim Integrated │ 3
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT = 40.2kI (500kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referenced to SGND, unless otherwise noted.) (Note 2)
PARAMETER
VFB Undervoltage Trip Level to
Cause Hiccup
SYMBOL
CONDITIONS
VFB-HICF
HICCUP Timeout
MIN
TYP
MAX
UNITS
0.56
0.58
0.6
V
(Note 3)
Minimum On-Time
tON-MIN
Minimum Off-Time
tOFF-MIN
32768
140
LX Dead Time
Cycles
135
ns
160
ns
5
RESET
RESET Output Level Low
IRESET = 1mA
RESET Output Leakage Current
TA = TJ = +25ºC, VRESET = 5.5V
-0.1
ns
0.4
V
+0.1
µA
VOUT Threshold for RESET
Assertion
VFB-OKF
VFB falling
90.5
92
94
%
VOUT Threshold for RESET
Deassertion
VFB-OKR
VFB rising
93.8
95
97.2
%
RESET Deassertion Delay After FB
Reaches 95% Regulation
1024
Cycles
165
ºC
10
ºC
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Temperature rising
Thermal Shutdown Hysteresis
Note 2: All limits are 100% tested at +25°C. Limits over temperature are guaranteed by design.
Note 3: See the Overcurrent Protection/HICCUP Mode section for more details.
www.maximintegrated.com
Maxim Integrated │ 4
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT toc01
100
100
90
VIN = 24V
70
VIN = 36V
VIN = 48V
VIN = 12V
60
50
80
VIN = 24V VIN = 36V
70
VIN = 12V
60
EFFICIENCY (%)
80
VIN = 48V
0
40
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
70
VIN = 48V
VIN = 24V VIN = 36V
100
1000
3500
VIN = 48V
VIN = 36V
VIN = 24V
70
60
VIN = 12V
50
VIN = 12V
40
40
MODE = OPEN
1
10
100
1000
30
3500
MODE = VCC
1
3.3V OUTPUT, DCM MODE,
FIGURE 4 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT
100
OUTPUT VOLTAGE (V)
VIN = 12V
60
50
40
10
100
LOAD CURRENT (mA)
www.maximintegrated.com
1000
5.05
toc07
VIN = 36V
5.04
5.03
5.02
5.01
VIN = 12V VIN = 48V
5.00
4.99
MODE = VCC
1
3500
5.06
VIN = 24V
70
1000
5.07
VIN = 36V
80
100
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT,
LOAD AND LINE REGULATION
5.08
VIN = 48V
90
10
LOAD CURRENT (mA)
LOAD CURRENT (mA)
EFFICIENCY (%)
10
5V OUTPUT, DCM MODE,
FIGURE 3 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT
100
80
30
MODE = OPEN
1
LOAD CURRENT (mA)
80
30
VIN = 12V
LOAD CURRENT (mA)
90
50
VIN = 48V
VIN = 24V VIN = 36V
60
30
500 1000 1500 2000 2500 3000 3500
EFFICIENCY (%)
EFFICIENCY (%)
0
90
60
70
40
MODE = SGND
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT toc04
100
80
50
50
MODE = SGND
5V OUTPUT, PFM MODE,
FIGURE 3 CIRCUIT,
EFFICIENCY vs. LOAD CURRENTtoc03
100
90
EFFICIENCY (%)
EFFICIENCY (%)
90
40
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT,
EFFICIENCY vs. LOAD CURRENT toc02
3500
4.98
VIN = 24V
MODE = SGND
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
Maxim Integrated │ 5
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, PFM MODE,
FIGURE 3 CIRCUIT,
LOAD AND LINE REGULATION toc09
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT,
LOAD AND LINE REGULATION
3.36
toc08
5.5
3.35
3.31
3.30
VIN = 36V
VIN = 12V
3.28
VIN = 24V
3.27
5.1
5.0
4.9
4.8
4.5
LOAD CURRENT (mA)
SWITCHING FREQUENCY (kHz)
VIN = 36V
4.6
500 1000 1500 2000 2500 3000 3500
VIN = 48V
MODE = OPEN
0
3.4
3.3
3.2
VIN = 24V
3.1
3.0
500 1000 1500 2000 2500 3000 3500
toc10
VIN = 12V
VIN = 48V
VIN = 36V
MODE = OPEN
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
SWITCHING FREQUENCY
vs. RT RESISTANCE
2400
VIN = 12V
4.7
MODE = SGND
0
OUTPUT VOLTAGE (V)
3.32
3.29
5.2
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VIN = 48V
3.5
VIN = 24V
5.3
3.33
3.26
3.6
5.4
3.34
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT,
LOAD AND LINE REGULATION
LOAD CURRENT (mA)
SOFT-START/SHUTDOWN FROM EN/UVLO,
5V OUTPUT, 3.5A LOAD CURRENT,
FIGURE 3 CIRCUIT
toc12
toc11
2200
2000
VEN/UVLO
1800
2V/div
1600
1400
1200
1000
800
600
400
200
0
0
20
40
60
80
VOUT
2V/div
IOUT
2A/div
VRESET
5V/div
100
1ms/div
RRT (kΩ)
SOFT-START/SHUTDOWN FROM EN/UVLO,
3.3V OUTPUT, 3.5A LOAD CURRENT,
FIGURE 4 CIRCUIT
toc13
SOFT-START/SHUTDOWN FROM EN/UVLO,
5V OUTPUT, PFM MODE, 5mA LOAD CURRENT,
FIGURE 3 CIRCUIT
toc14
MODE = OPEN
VEN/UVLO
2V/div
VOUT
2V/div
IOUT
2A/div
VRESET
5V/div
VEN/UVLO
2V/div
VOUT
1V/div
VRESET
1ms/div
www.maximintegrated.com
2ms/div
5V/div
Maxim Integrated │ 6
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
SOFT-START WITH 2.5V PREBIAS,
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT
SOFT-START/SHUTDOWN FROM EN/UVLO,
3.3V OUTPUT, PFM MODE, 5mA LOAD CURRENT,
FIGURE 4 CIRCUIT
toc15
VEN/UVLO
2V/div
SOFT-START WITH 2.5V PREBIAS,
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT
toc17
toc16
VEN/UVLO
VEN/UVLO
2V/div
2V/div
1V/div
2V/div
VOUT
VRESET
1V/div
VOUT
5V/div
VRESET
VOUT
VRESET
5V/div
5V/div
MODE = SGND
MODE = OPEN
2ms/div
MODE = OPEN
1ms/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, 3.5A LOAD CURRENT,
FIGURE 3 CIRCUIT
toc18
1ms/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, PWM MODE, NO LOAD,
FIGURE 3 CIRCUIT
toc19
MODE = SGND
VOUT
(AC)
20mV/div
VOUT
(AC)
VLX
10V/div
VLX
10V/div
ILX
500mA/div
ILX
2A/div
1μs/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, PFM MODE, 25mA LOAD,
FIGURE 3 CIRCUIT
toc20
20mV/div
1μs/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, DCM MODE, 25mA LOAD,
FIGURE 3 CIRCUIT
toc21
MODE = VCC
VOUT
(AC)
100mV/
div
VOUT
(AC)
VLX
10V/div
VLX
10V/div
500mA/div
ILX
200mA/div
ILX
20mV/div
MODE = OPEN
10μs/div
www.maximintegrated.com
1μs/div
Maxim Integrated │ 7
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, PWM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM 1.75A TO 3.5A)
toc22
VOUT
(AC)
100mV/div
IOUT
2A/div
3.3V OUTPUT, PWM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM 1.75A TO 3.5A)
toc23
VOUT
(AC)
100mV/div
IOUT
2A/div
40μs/div
100μs/div
5V OUTPUT, PWM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM NO LOAD TO 1.75A)
toc24
VOUT
(AC)
IOUT
100mV/div
MODE = SGND
1A/div
3.3V OUTPUT, PWM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM NO LOAD TO 1.75A) toc25
VOUT
(AC)
IOUT
100mV/div
1A/div
MODE = SGND
40μs/div
100μs/div
5V OUTPUT, PFM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM 5mA TO 1.75A)
toc26
3.3V OUTPUT, PFM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM 5mA TO 1.75A)
toc27
VOUT
(AC)
IOUT
100mV/div
1A/div
MODE = OPEN
2ms/div
www.maximintegrated.com
VOUT
(AC)
IOUT
100mV/div
1A/div
MODE = OPEN
2ms/div
Maxim Integrated │ 8
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 12,000pF, RT = MODE = open, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.)
5V OUTPUT, DCM MODE, FIGURE 3 CIRCUIT
(LOAD CURRENT STEPPED
FROM 50mA TO 1.75A)
toc28
VOUT
(AC)
3.3V OUTPUT, DCM MODE, FIGURE 4 CIRCUIT
(LOAD CURRENT STEPPED
FROM 50mA TO 1.75A)
toc29
100mV/div
VOUT
(AC)
1A/div
IOUT
100mV/div
1A/div
IOUT
MODE = VCC
MODE = VCC
200μs/div
200μs/div
OVERLOAD PROTECTION
5V OUTPUT, FIGURE 3 CIRCUIT
APPLICATION OF EXTERNAL CLOCK AT 700kHz
5V OUTPUT, FIGURE 3 CIRCUIT toc31
toc30
VOUT
2V/div
VLX
1A/div
IOUT
10V/div
VSYNC
2V/div
MODE = SGND
20ms/div
2μs/div
5V OUTPUT, 3.5A LOAD CURRENT
BODE PLOT, FIGURE 3 CIRCUIT toc32
toc33
140
60
140
50
120
50
120
40
100
40
80
30
PHASE
40
GAIN
0
-10
-20
-30
20
CROSSOVER
FREQUENCY = 48.4KHz,
PHASE MARGIN = 62.3°
-40
1K
10K
FREQUENCY (Hz)
www.maximintegrated.com
100K
PHASE
20
100
80
60
GAIN
10
40
0
20
0
-10
-20
-20
-40
-30
-60
-40
1K
PHASE (°)
10
60
PHASE (°)
20
GAIN (dB)
60
30
GAIN (dB)
3.3V OUTPUT, 3.5A LOAD CURRENT,
BODE PLOT, FIGURE 4 CIRCUIT
0
CROSSOVER
FREQUENCY = 52.7KHz,
PHASE MARGIN = 62.4°
-20
-40
-60
10K
100K
FREQUENCY (Hz)
Maxim Integrated │ 9
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
PGND
SGND
VCC
MODE
TOP VIEW
PGND
Pin Configuration
15
14
13
12
11
PGND 16
10
RT
LX 17
9
FB
8
CF
7
SS
6
SYNC
MAX17504
LX 18
LX 19
3
4
5
RESET
2
EN/UVLO
VIN
1
VIN
+
VIN
BST 20
TQFN
5mm × 5mm
* EXPOSED PAD (CONNECT TO SIGNAL GROUND).
Pin Description
PIN
NAME
FUNCTION
1, 2, 3
VIN
Power-Supply Input. 4.5V to 60V input supply range. Connect the VIN pins together. Decouple to PGND
with two 2.2µF capacitors; place the capacitors close to the VIN and PGND pins. Refer to the MAX17504
Evaluation Kit datasheet for a layout example.
4
EN/UVLO
Enable/Undervoltage Lockout. Drive EN/UVLO high to enable the output voltage. Connect to the center
of the resistor-divider between VIN and SGND to set the input voltage at which the MAX17504 turns on.
Pull up to VIN for always on operation.
5
RESET
6
SYNC
7
SS
Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.
8
CF
At switching frequencies lower than 500kHz, connect a capacitor from CF to FB. Leave CF open if the
switching frequency is equal to or more than 500kHz. See the Loop Compensation section for more
details.
9
FB
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to SGND to
set the output voltage. See the Adjusting Output Voltage section for more details.
10
RT
Connect a resistor from RT to SGND to set the regulator’s switching frequency. Leave RT open for the
default 500kHz frequency. See the Setting the Switching Frequency (RT) section for more details.
MODE
MODE configures the MAX17504 to operate in PWM, PFM or DCM modes of operation. Leave MODE
unconnected for PFM operation (pulse skipping at light loads). Connect MODE to SGND for constantfrequency PWM operation at all loads. Connect MODE to VCC for DCM operation. See the Mode
Selection (MODE) section for more details.
11
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Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set value.
RESET goes high 1024 clock cycles after FB rises above 95% of its set value.
The device can be synchronized to an external clock using this pin. See the External Frequency
Synchronization section for more details.
Maxim Integrated │ 10
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Pin Description (continued)
PIN
NAME
FUNCTION
12
VCC
13
SGND
Analog Ground
14, 15, 16
PGND
Power Ground. Connect the PGND pins externally to the power ground plane. Connect the SGND and
PGND pins together at the ground return path of the VCC bypass capacitor. Refer to the MAX17504
Evaluation Kit datasheet for a layout example.
17, 18, 19
LX
20
BST
—
EP
5V LDO Output. Bypass VCC with a 2.2µF ceramic capacitance to SGND.
Switching Node. Connect LX pins to the switching side of the inductor.
Boost Flying Capacitor. Connect a 0.1µF ceramic capacitor between BST and LX.
Exposed pad. Connect to the SGND pin. Connect to a large copper plane below the IC to improve heat
dissipation capability. Add thermal vias below the exposed pad. Refer to the MAX17504 Evaluation Kit
datasheet for a layout example.
Block Diagram
VCC
5V
BST
MAX17504
LDO
VIN
SGND
CURRENT-SENSE
LOGIC
EN/UVLO
LX
PWM/
PFM/
HICCUP
LOGIC
HICCUP
1.215V
RT
PGND
OSCILLATOR
SYNC
CF
FB
VCC
SS
SWITCHOVER
LOGIC
VBG = 0.9V
SLOPE
COMPENSATION
5µA
FB
HICCUP
www.maximintegrated.com
MODE
SELECTION
LOGIC
ERROR AMPLIFIER/
LOOP COMPENSATION
EN/UVLO
MODE
RESET
RESET
LOGIC
Maxim Integrated │ 11
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Detailed Description
The MAX17504 high-efficiency, high-voltage, synchronously
rectified step-down converter with dual integrated
MOSFETs operates over a 4.5V to 60V input. It delivers
up to 3.5A and 0.9V to 90% VIN output voltage. Built-in
compensation across the output voltage range eliminates
the need for external components. The feedback (FB)
regulation accuracy over -40°C to +125°C is ±1.1%.
The device features a peak-current-mode control
architecture. An internal transconductance error
amplifier produces an integrated error voltage at an
internal node that sets the duty cycle using a PWM
comparator, a high-side current-sense amplifier, and a
slope-compensation generator. At each rising edge of
the clock, the high-side MOSFET turns on and remains
on until either the appropriate or maximum duty cycle
is reached, or the peak current limit is detected. During
the high-side MOSFET’s on-time, the inductor current
ramps up. During the second half of the switching
cycle, the high-side MOSFET turns off and the low-side
MOSFET turns on. The inductor releases the stored
energy as its current ramps down and provides current
to the output.
PFM Mode Operation
PFM mode of operation disables negative inductor current
and additionally skips pulses at light loads for high
efficiency. In PFM mode, the inductor current is forced to
a fixed peak of 750mA every clock cycle until the output
rises to 102.3% of the nominal voltage. Once the output
reaches 102.3% of the nominal voltage, both the high-side
and low-side FETs are turned off and the device enters
hibernate operation until the load discharges the output to
101.1% of the nominal voltage. Most of the internal blocks
are turned off in hibernate operation to save quiescent
current. After the output falls below 101.1% of the nominal
voltage, the device comes out of hibernate operation,
turns on all internal blocks, and again commences the
process of delivering pulses of energy to the output until it
reaches 102.3% of the nominal output voltage.
The advantage of the PFM mode is higher efficiency at
light loads because of lower quiescent current drawn from
supply. The disadvantage is that the output-voltage ripple
is higher compared to PWM or DCM modes of operation
and switching frequency is not constant at light loads.
DCM Mode Operation
The device features a MODE pin that can be used
to operate the device in PWM, PFM, or DCM control
schemes. The device integrates adjustable-input
undervoltage lockout, adjustable soft-start, open RESET,
and external frequency synchronization features.
DCM mode of operation features constant frequency
operation down to lighter loads than PFM mode, by not
skipping pulses but only disabling negative inductor
current at light loads. DCM operation offers efficiency
performance that lies between PWM and PFM modes.
Mode Selection (MODE)
Linear Regulator (VCC)
The logic state of the MODE pin is latched when VCC
and EN/UVLO voltages exceed the respective UVLO
rising thresholds and all internal voltages are ready to
allow LX switching. If the MODE pin is open at power-up,
the device operates in PFM mode at light loads. If the
MODE pin is grounded at power-up, the device operates
in constant-frequency PWM mode at all loads. Finally,
if the MODE pin is connected to VCC at power-up, the
device operates in constant-frequency DCM mode at light
loads. State changes on the MODE pin are ignored during
normal operation.
PWM Mode Operation
In PWM mode, the inductor current is allowed to go negative. PWM operation provides constant frequency operation at all loads, and is useful in applications sensitive to
switching frequency. However, the PWM mode of operation gives lower efficiency at light loads compared to PFM
and DCM modes of operation.
www.maximintegrated.com
An internal linear regulator (VCC) provides a 5V nominal
supply to power the internal blocks and the low-side
MOSFET driver. The output of the linear regulator (VCC)
should be bypassed with a 2.2µF ceramic capacitor to
SGND. The MAX17504 employs an undervoltage lockout
circuit that disables the internal linear regulator when VCC
falls below 3.8V (typ).
Setting the Switching Frequency (RT)
The switching frequency of the MAX17504 can be
programmed from 200kHz to 2.2MHz by using a resistor
connected from RT to SGND. The switching frequency
(fSW) is related to the resistor connected at the RT pin
(RRT) by the following equation:
R RT ≅
21× 10 3
f SW
−
1.7
where RRT is in kΩ and fSW is in kHz. Leaving the RT pin
open causes the device to operate at the default switching
frequency of 500kHz. See Table 1 for RT resistor values
for a few common switching frequencies.
Maxim Integrated │ 12
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Table 1. Switching Frequency vs. RT
Resistor
SWITCHING FREQUENCY (kHz)
RT RESISTOR (kΩ)
500
OPEN
200
102
400
49.9
1000
19.1
2200
8.06
Operating Input Voltage Range
The minimum and maximum operating input voltages for
a given output voltage should be calculated as follows:
VIN(MIN) =
VOUT + (I OUT(MAX) × (R DCR + 0.15))
1- (f SW(MAX) × t OFF(MAX) )
+ (I OUT(MAX) × 0.175)
VIN(MAX) =
VOUT
f SW(MAX) × t ON(MIN)
where VOUT is the steady-state output voltage, IOUT(MAX)
is the maximum load current, RDCR is the DC resistance
of the inductor, fSW(MAX) is the maximum switching
frequency, tOFF(MAX) is the worst-case minimum switch
off-time (160ns), and tON(MIN) is the worst-case minimum
switch on-time (135ns).
External Frequency Synchronization (SYNC)
The internal oscillator of the MAX17504 can be synchronized
to an external clock signal on the SYNC pin. The external
synchronization clock frequency must be between 1.1
x fSW and 1.4 x fSW, where fSW is the frequency
programmed by the RT resistor. The minimum external
clock pulse-width high should be greater than 50ns. See
the RT and SYNC section in the Electrical Characteristics
table for details.
Overcurrent Protection/HICCUP Mode
The MAX17504 is provided with a robust overcurrent
protection scheme that protects the device under overload
and output short-circuit conditions. A cycle-by-cycle peak
current limit turns off the high-side MOSFET whenever
the high-side switch current exceeds an internal limit
of 5.1A (typ). A runaway current limit on the high-side
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switch current at 5.7A (typ) protects the device under
high input voltage, short-circuit conditions when there is
insufficient output voltage available to restore the inductor
current that was built up during the ON period of the
step-down converter. One occurrence of the runaway
current limit triggers a hiccup mode. In addition, if due
to a fault condition, feedback voltage drops to 0.58V
(typ) anytime after soft-start is complete, hiccup mode
is triggered. In hiccup mode, the converter is protected
by suspending switching for a hiccup timeout period of
32,768 clock cycles. Once the hiccup timeout period
expires, soft-start is attempted again. Note that when softstart is attempted under an overload condition, if feedback
voltage does not exceed 0.58V, the device switches at
half the programmed switching frequency. Hiccup mode
of operation ensures low power dissipation under output
short-circuit conditions.
RESET Output
The MAX17504 includes a RESET comparator to monitor
the output voltage. The open-drain RESET output requires
an external pullup resistor. RESET goes high (highimpedance) 1024 switching cycles after the regulator
output increases above 95% of the designed nominal
regulated voltage. RESET goes low when the regulator
output voltage drops to below 92% of the nominal
regulated voltage. RESET also goes low during thermal
shutdown.
Prebiased Output
When the MAX17504 starts into a prebiased output, both
the high-side and the low-side switches are turned off so
that the converter does not sink current from the output.
High-side and low-side switches do not start switching
until the PWM comparator commands the first PWM
pulse, at which point switching commences. The output
voltage is then smoothly ramped up to the target value in
alignment with the internal reference.
Thermal-Shutdown Protection
Thermal-shutdown protection limits total power dissipation
in the MAX17504. When the junction temperature of
the device exceeds +165°C, an on-chip thermal sensor
shuts down the device, allowing the device to cool. The
thermal sensor turns the device on again after the junction
temperature cools by 10°C. Soft-start resets during thermal
shutdown. Carefully evaluate the total power dissipation
(see the Power Dissipation section) to avoid unwanted
triggering of the thermal shutdown in normal operation.
Maxim Integrated │ 13
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Applications Information
saturation can occur only above the peak current-limit
value of 5.1A.
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
=
IRMS I OUT(MAX) ×
VOUT × (VIN - VOUT )
VIN
where, IOUT(MAX) is the maximum load current. IRMS has
a maximum value when the input voltage equals twice
the output voltage (VIN = 2 x VOUT), so IRMS(MAX) =
IOUT(MAX)/2.
Choose an input capacitor that exhibits less than +10°C
temperature rise at the RMS input current for optimal
long-term reliability. Use low-ESR ceramic capacitors with
high ripple current capability at the input. X7R capacitors
are recommended in industrial applications for their
temperature stability. Calculate the input capacitance
using the following equation:
I OUT(MAX) × D × (1- D)
C IN =
η × f SW × ∆VIN
where D = VOUT/VIN is the duty ratio of the controller,
fSW is the switching frequency, ΔVIN is the allowable input
voltage ripple, and E is the efficiency.
In applications where the source is located distant from
the MAX17504 input, an electrolytic capacitor should
be added in parallel to the ceramic capacitor to provide
necessary damping for potential oscillations caused by
the inductance of the longer input power path and input
ceramic capacitor.
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX17504: inductance value (L),
inductor saturation current (ISAT), and DC resistance
(RDCR). The switching frequency and output voltage
determine the inductor value as follows:
L=
VOUT
f SW
where VOUT and fSW are nominal values.
Select a low-loss inductor closest to the calculated
value with acceptable dimensions and having the lowest
possible DC resistance. The saturation current rating
(ISAT) of the inductor must be high enough to ensure that
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Output Capacitor Selection
X7R ceramic output capacitors are preferred due to their
stability over temperature in industrial applications. The
output capacitors are usually sized to support a step load
of 50% of the maximum output current in the application,
so the output voltage deviation is contained to 3% of the
output voltage change. The minimum required output
capacitance can be calculated as follows:
C OUT=
1 I STEP × t RESPONSE
×
2
∆VOUT
t RESPONSE ≅ (
0.33
1
)
+
fC
f sw
where ISTEP is the load current step, tRESPONSE is the
response time of the controller, DVOUT is the allowable
output voltage deviation, fC is the target closed-loop
crossover frequency, and fSW is the switching frequency.
Select fC to be 1/9th of fSW if the switching frequency is
less than or equal to 500kHz. If the switching frequency is
more than 500kHz, select fC to be 55kHz.
Soft-Start Capacitor Selection
The MAX17504 implements adjustable soft-start operation
to reduce inrush current. A capacitor connected from
the SS pin to SGND programs the soft-start time. The
selected output capacitance (CSEL) and the output
voltage (VOUT) determine the minimum required soft-start
capacitor as follows:
CSS ≥ 28 x 10-6 x CSEL x VOUT
The soft-start time (tSS) is related to the capacitor
connected at SS (CSS) by the following equation:
tSS = CSS/(5.55 x 10-6)
For example, to program a 2ms soft-start time, a 12nF
capacitor should be connected from the SS pin to SGND.
VIN
R1
EN/UVLO
R2
SGND
Figure 1. Setting the Input Undervoltage Lockout
Maxim Integrated │ 14
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Setting the Input Undervoltage Lockout Level
The MAX17504 offers an adjustable input undervoltage
lockout level. Set the voltage at which MAX17504 turns
ON, with a resistive voltage-divider connected from VIN to
SGND. Connect the center node of the divider to EN/UVLO.
Choose R1 to be 3.3MI and then calculate R2 as follows:
R2 =
R1× 1.215
(VINU - 1.215)
where VINU is the voltage at which the MAX17504 is
required to turn ON. Ensure that VINU is higher than 0.8
x VOUT.
Loop Compensation
The MAX17504 is internally loop compensated. However,
if the switching frequency is less than 500kHz, connect a
0402 capacitor, C6, between the CF pin and the FB pin.
Use Table 2 to select the value of C6.
Adjusting Output Voltage
Set the output voltage with a resistive voltage-divider
connected from the positive terminal of the output
capacitor (VOUT) to SGND (see Figure 2). Connect the
center node of the divider to the FB pin. Use the following
procedure to choose the resistive voltage-divider values:
Calculate resistor R3 from the output to FB as follows:
R3 =
216 × 10 3
f C × C OUT
where R3 is in kI, crossover frequency fC is in kHz, and
output capacitor COUT is in µF. Choose fC to be 1/9th of
the switching frequency, fSW, if the switching frequency is
less than or equal to 500kHz. If the switching frequency is
more than 500kHz, select fC to be 55kHz.
Calculate resistor R4 from FB to SGND as follows:
R3 × 0.9
R4 =
(VOUT - 0.9)
Power Dissipation
Ensure that the junction temperature of the MAX17504
does not exceed +125°C under the operating conditions
specified for the power supply.
At a particular operating condition, the power losses that
lead to temperature rise of the part are estimated as
follows:
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Table 2. C6 Capacitor Value at Various
Switching Frequencies
SWITCHING FREQUENCY RANGE (kHz)
C6 (pF)
200 to 300
2.2
300 to 400
1.2
400 to 500
0.75
VOUT
R3
FB
R4
SGND
Figure 2. Setting the Output Voltage
(
1
PLOSS =
(POUT × ( - 1)) - I OUT 2 × R DCR
η
)
P=
OUT VOUT × I OUT
where POUT is the total output power, η is the efficiency
of the converter, and RDCR is the DC resistance of the
inductor. (See the Typical Operating Characteristics for more
information on efficiency at typical operating conditions).
For a multilayer board, the thermal performance metrics
for the package are given below:
θ JA = 30°C W
θ JC =2°C W
The junction temperature of the MAX17504 can be
estimated at any given maximum ambient temperature
(TA_MAX) from the equation below:
TJ_MAX
= T A _MAX + (θ JA × PLOSS )
If the application has a thermal management system
that ensures that the exposed pad of the MAX17504 is
maintained at a given temperature (TEP_MAX) by using
proper heat sinks, then the junction temperature of the
MAX17504 can be estimated at any given maximum
ambient temperature from the equation below:
T=
J_MAX TEP_MAX + (θ JC × PLOSS )
Maxim Integrated │ 15
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
PCB Layout Guidelines
currents must be kept separate. They should be connected
together at a point where switching activity is at a
minimum, typically the return terminal of the VCC bypass
capacitor. This helps keep the analog ground quiet.
The ground plane should be kept continuous/unbroken
as far as possible. No trace carrying high switching
current should be placed directly over any ground plane
discontinuity.
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to
the high di/dt of the currents. Since inductance of a current
carrying loop is proportional to the area enclosed by the
loop, if the loop area is made very small, inductance is
reduced. Additionally, small current loop areas reduce
radiated EMI.
PCB layout also affects the thermal performance of the
design. A number of thermal vias that connect to a large
ground plane should be provided under the exposed pad
of the part, for efficient heat dissipation.
A ceramic input filter capacitor should be placed close to the
VIN pins of the IC. This eliminates as much trace inductance
effects as possible and give the IC a cleaner voltage supply.
A bypass capacitor for the VCC pin also should be placed
close to the pin to reduce effects of trace impedance.
For a sample layout that ensures first pass success,
refer to the MAX17504 evaluation kit layout available at
www.maximintegrated.com.
When routing the circuitry around the IC, the analog
small-signal ground and the power ground for switching
VIN
(7.5V TO 60V)
EN/UVLO
VIN
VIN
BST
RT
LX
SYNC
MAX17504
MODE
C2
2.2µF
LX
LX
VCC
C8
2.2µF
C5
0.1µF
L1
10µH
VOUT
5V, 3.5A
C4
22µF
C9
22µF
R3
100kΩ
FB
SGND
CF
C1
2.2µF
VIN
R4
22.1kΩ
RESET
PGND
SS
PGND
PGND
C3
12000pF
fSW = 500kHz
L1 = SLF12575T-100M5R4-H
Figure 3. Typical Application Circuit for 5V Output
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Maxim Integrated │ 16
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
VIN
(5.5V TO 60V)
EN/UVLO
VIN
VIN
BST
RT
LX
SYNC
MAX17504
MODE
C2
2.2µF
LX
C8
2.2µF
C5
0.1µF
VOUT
3.3V, 3.5A
L1
6.8µH
C4
22µF
LX
VCC
C9
22µF
R3
82.5kΩ
FB
SGND
CF
C1
2.2µF
VIN
R4
30.9kΩ
RESET
SS
PGND
PGND
PGND
C3
12000pF
fSW = 500kHz
L1 = MSS1048-682NL
Figure 4. Typical Application Circuit for 3.3V Output
Ordering Information
PART
MAX17504ATP+
Package Information
PIN-PACKAGE
20 TQFN 5mm x 5mm
Note: All devices operate over the temperature range of -40ºC
to +125ºC, unless otherwise noted.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
PROCESS: BiCMOS
www.maximintegrated.com
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND PATTERN
NO.
20 TQFN-EP*
T2055+4
21-0140
90-0009
*EP = Exposed pad.
Maxim Integrated │ 17
MAX17504
4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
11/13
Initial release
1
2/14
Updated TOCs 32 and 33 and Typical Application Circuit Figures
DESCRIPTION
—
9, 16, 17
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim
reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2014 Maxim Integrated Products, Inc. │ 18