(Preliminary) Low Phase Noise VCXO (1MHz to 18MHz) FEATURES DESCRIPTION The PLL500-15/16 is a low cost, high performance and low phase noise VCXO for the 1MHz to 18MHz range, providing less than -130dBc at 10kHz offset when using a 35.328MHz crystal. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 16MHz to 36MHz (fundamental resonant mode). XIN 1 VCON 2 DIVSEL^ 3 GND 4 8 XOUT 7 OE^ 6 VDD 5 CLK SOP-8L VCON 1 GND 2 XIN 3 P500-15/16 VCXO with Divider Selection (DIVSEL) input pin PLL500-15: ÷8, ÷16 PLL500-16: ÷2, ÷4 VCXO output for the 1MHz to 18MHz range 16MHz to 36MHz fundamental crystal input. Low phase noise (-130 dBc @ 10kHz offset using a 35.328MHz crystal). LVCMOS output with OE tri-state control. Integrated high linearity variable capacitors. 12mA drive capability at TTL output. ± 150 ppm pull range, max 5% linearity. Low jitter (RMS): 2.5ps period jitter. 2.5V ~ 3.3V operation. Available in 8-Pin SOP, 6-pin SOT23 GREEN/ RoHS compliant packages, or DIE. PLL500-15/16 PIN CONFIGURATION 6 CLK 5 VDD 4 XOUT SOT23-6L* ^: Denotes internal Pull-up *: SOT package offers single divider option only DIVIDER SELECTION LOGIC LEVELS Part # PLL500-15 PLL500-16 DivSel State Operation 1 (Default)* ÷16 0 ÷8 1 (Default)* ÷4 0 ÷2 * Setting for SOT23 package BLOCK DIAGRAM DIVSEL XIN Xtal Osc XOUT VCON Selectable Divider CLK Varicap 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/12/08 Page 1 (Preliminary) Low Phase Noise VCXO (1MHz to 18MHz) DIE PAD LAYOUT DIE SPECIFICATIONS 32 mil (812,986) 8 1 XOUT XIN OE^ 7 39 mil 2 VCON VDD 6 3 DIVSEL^ Name Value Size 39 x 32 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 10 mil CLK 5 4 GND DIE ID: PLL500-15: C500A-1111-12 PLL500-16: C500A-1111-11 Y (0,0) X Note: ^ denotes internal pull up PACKAGE PIN AND DIE PAD ASSIGNMENT Name Pin# Die Pad Position Type Description SOP-8 SOT23-6 X (m) Y (m) XIN 1 3 94.183 768.599 I Crystal input pin. VCON 2 1 94.157 605.029 P Frequency Control Voltage input pin. DIVSEL 3 - 94.183 331.756 I Divider Selection input pin. Default Logic 1 for SOT23 package. See Divider Selection Logic Levels table on Page 1. GND 4 2 94.193 140.379 P Ground pin. CLK 5 6 715.472 203.866 O Output clock pin. VDD 6 5 715.307 455.726 P VDD power supply pin. OE 7 - 715.472 626.716 I Output Enable input pin. Disables the output when low. Internal pull-up enables output by default if pin is not connected to low. Default “Enabled” (Logic 1) for SOT23 package. XOUT 8 4 476.906 888.881 I Crystal output pin. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/12/08 Page 2 (Preliminary) Low Phase Noise VCXO (1MHz to 18MHz) ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage MIN. V DD MAX. UNITS 4.6 V Input Voltage, dc VI -0.5 V DD +0.5 V Output Voltage, dc VO -0.5 V DD +0.5 V Storage Temperature TS -65 150 C Ambient Operating Temperature* TA -40 85 C Junction Temperature TJ 125 C Lead Temperature (soldering, 10s) 260 C ESD Protection, Human Body Model 2 kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only. 2. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS Input Crystal Frequency MIN. TYP. 16 Output Clock Rise/Fall Time Output Clock Duty Cycle 0.8V ~ 2.0V, 10 pF load 1.15 0.3V ~ 3.0V, 15 pF load 3.7 Measured @ 1.4V MAX. UNITS 36 MHz ns 45 50 55 % MIN. TYP. MAX. UNITS 10 ms 3. Voltage Control Crystal Oscillator PARAMETERS VCXO Stabilization Time * SYMBOL T VCXOSTB CONDITIONS From power valid VCXO Tuning Range XTAL C 0 /C 1 < 250 0V VCON 3.3V CLK output pullability VCON=1.65V, 1.65V 300 150 VCXO Tuning Characteristic PWSRR Frequency change with VDD varied +/- 10% VCON pin input impedance VCON modulation BW ppm 100 Pull range linearity Power Supply Rejection ppm 0V VCON 3.3V, -3dB -1 ppm/V 5 % +1 ppm 2000 k 18 kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/12/08 Page 3 (Preliminary) Low Phase Noise VCXO (1MHz to 18MHz) 4. Jitter and Phase Noise Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS RMS Period Jitter (1 sigma – 1000 samples) With capacitive decoupling between VDD and GND. 2.5 ps Phase Noise relative to carrier 13.5MHz @100Hz offset -100 dBc/Hz Phase Noise relative to carrier 13.5MHz @1kHz offset -125 dBc/Hz Phase Noise relative to carrier 13.5MHz @10kHz offset -142 dBc/Hz Phase Noise relative to carrier 13.5MHz @100kHz offset -150 dBc/Hz Phase Noise relative to carrier 13.5MHz @1MHz offset -150 dBc/Hz 5. DC Specifications PARAMETERS SYMBOL Supply Current, Dynamic, with Loaded Outputs I DD Operating Voltage V DD Output Low Voltage at CMOS level V OLC I OL = +4mA Output High Voltage at CMOS level V OHC I OH = -4mA Output drive current VCXO Control Voltage CONDITIONS F XIN = 27MHz Output load of 15pF MIN. TYP. MAX. 3.3V 3.7 5 2.5V 2.4 3.5 2.25 VCON 8 mA 3.63 V 0.4 V V DD – 0.4 For V OL <0.4V or V OH >2.4V UNITS V 9.5 0 mA V DD V MAX. UNITS 6. Crystal Specifications PARAMETERS Crystal Loading Rating (VCON = 1.65V, 3.3V VDD) Crystal Loading Rating (VCON = 1.25V, 2.5V VDD) SYMBOL C L (xtal) (see note below) MIN. TYP. 7.8 pF 8.9 Maximum Sustainable Drive Level 200 Operating Drive Level W W 50 Max C0 5 pF C0/C1 250 - 30 Ω ESR RS Note: The crystal must be such that it oscillates (parallel resonant) at nominal frequency when presented a C Load as specified above. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range. Note that the Cload values above are for the IC only, and do not include PCB parasitics. Crystal specifications for Cload include PCB parasitics. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/12/08 Page 4 (Preliminary) Low Phase Noise VCXO (1MHz to 18MHz) PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT) SOP-8L Symbol A A1 A2 B C D E H L e Dimension in MM Min. Max. 1.35 1.75 0.10 0.25 1.25 1.50 0.33 0.53 0.19 0.27 4.80 5.00 3.80 4.00 5.80 6.20 0.40 0.89 1.27 BSC E H D A2 A A1 C L b e SOT23-6L Symbol A A1 A2 B C D E H L e Dimension in MM Min. Max. 1.05 1.35 0.05 0.15 1.00 1.20 0.30 0.50 0.08 0.20 2.80 3.00 1.50 1.70 2.60 3.00 0.35 0.55 0.95 BSC E H D A2 A A1 C e b L 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/12/08 Page 5 (Preliminary) Low Phase Noise VCXO (1MHz to 18MHz) ORDERING INFORMATION (GREEN PACKAGE COMPLIANT) For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Part number, Package type and Operating temperature range PLL500-XX X X X - X NONE= TUBE R=TAPE AND REEL PART NUMBER BLANK=NORMAL PACKAGE L=GREEN PACKAGE PACKAGE TYPE D=Die S= SOP-8L T= SOT23-6L Part / Order Number PLL500-15DC PLL500-15SC PLL500-15SC-R PLL500-15SCL PLL500-15SCL-R PLL500-15TC PLL500-15TC-R PLL500-15TCL PLL500-15TCL-R PLL500-16DC PLL500-16SC PLL500-16SC-R PLL500-16SCL PLL500-16SCL-R PLL500-16TC PLL500-16TC-R PLL500-16TCL PLL500-16TCL-R TEMPERATURE C=COMMERCIAL I=INDUSTRIAL Marking Package Option P500-15DC P500-15SC P500-15SC P500-15SCL P500-15SCL P500-15TC P500-15TC P500-15TCL P500-15TCL P500-16DC P500-16SC P500-16SC P500-16SCL P500-16SCL P500-16TC P500-16TC P500-16TCL P500-16TCL Die (Waffle Pack) 8-Pin SOP (Tube) 8-Pin SOP (Tape and Reel) 8-Pin SOP GREEN (Tube) 8-Pin SOP GREEN (Tape and Reel) 6-Pin SOT23 (Tube) 6-Pin SOT23 (Tape and Reel) 6-Pin SOT23 GREEN (Tube) 6-Pin SOT23 GREEN (Tape and Reel) Die (Waffle Pack) 8-Pin SOP (Tube) 8-Pin SOP (Tape and Reel) 8-Pin SOP GREEN (Tube) 8-Pin SOP GREEN (Tape and Reel) 6-Pin SOT23 (Tube) 6-Pin SOT23 (Tape and Reel) 6-Pin SOT23 GREEN (Tube) 6-Pin SOT23 GREEN (Tape and Reel) PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/12/08 Page 6