PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) VDD VDD VDD VDD DNC Reserved Reserved 24 23 22 21 20 19 18 26 XIN XOUT 27 DNC 28 DNC 29 OE_CTRL 30 DNC 31 Die ID: A1919-19C C502A 3 4 5 6 GND Reserved X 7 8 GNDBUF 2 GNDBUF 1 GND (0,0) Y (1550,1475) 17 GNDBUF 16 DNC 15 LVDSB 14 PECLB 13 VDDBUF 12 VDDBUF 11 PECL 10 LVDS 9 GND PLL620-21 is an XO IC specifically designed to work with high frequency fundamental and third overtone crystals. Its design was optimized to tolerate higher limits of interelectrodes capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. It offers a selectable OE logic and is ideal for XO applications requiring LVDS or PECL output levels at high frequencies. 25 GND DESCRIPTIONS OESEL 65 mil 100MHz to 200MHz Fundamental Mode Crystal. Output range: 100 – 200MHz (no multiplication). Selectable OE logic. Minimum bondwires required for VDD and GND. Available outputs: PECL or LVDS. Supports 3.3V-Power Supply. Available in die form. Thickness 10 mil. 62 mil • • • • • • • • DIE CONFIGURATION GND FEATURES OUTSEL^ DIE SPECIFICATIONS BLOCK DIAGRAM Name Value Size Reverse side 62 x 65 mil GND OE Pad dimensions 80 micron x 80 micron Q Thickness 10 mil X+ X- Q Oscillator Amplifier OUTPUT SELECTION AND ENABLE Pad #9 OUTSEL Selected Output 0 1 PLL620 PLL620620-21 Pad #25 OESEL 0 1 (default) LVDS PECL (default) Pad #30 OE_CTRL 0 1 0 1 State Tri-state Output enabled (default) Output enabled (default) Tri-state Pad # 9: Bond to GND to set to “0”, bond to VDD to set to “1” Pad # 30: Logical states defined by PECL levels if OUTSEL (pad # 9) is “1” Logical states defined by CMOS levels if OUTSEL is “0” 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 1 PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage MIN. MAX. UNITS 7 V V DD Input Voltage, dc VI V SS -0.5 V DD +0.5 V Output Voltage, dc VO V SS -0.5 V DD +0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature* TA -40 85 °C Junction Temperature TJ 125 °C 260 °C 2 kV Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only. 2. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating Interelectrode Capacitance Recommended ESR SYMBOL F XIN C L (xtal) C0 RE CONDITIONS Fundamental or 3 rd overtone* Die only MIN. TYP. 100 MAX. UNITS 200 MHz 3.0 F XIN <160MHz and C0<3.0pF F XIN <200MHz and C0<3.0pF F XIN <200MHz and C0<2.5pF 3 30 25 30 pF pF Ω Ω Ω * Note: 3 rd overtone crystals require an external resistor between XIN and XOUT to prevent the fundamental from oscillating. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 2 PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) 3. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS Supply Current (Loaded Outputs) I DD PECL/LVDS Operating Voltage V DD MIN. 3.13 @ 1.25V (LVDS) @ Vdd – 1.3V (PECL) Output Clock Duty Cycle TYP. 45 45 Short Circuit Current 50 50 MAX. UNITS 100/80 mA 3.47 V 55 55 % mA ±50 4. Jitter specifications PARAMETERS Period jitter RMS at 155MHz Period jitter peak-to-peak at 155MHz CONDITIONS MIN. TYP. 2.5 With capacitive decoupling between VDD and GND. UNITS ps 20 Accumulated jitter peak-to-peak at 155MHz With capacitive decoupling between VDD and GND. Over 1,000,000 cycles. 25 Integrated jitter RMS at 155MHz Integrated 12 kHz to 20 MHz 0.3 Accumulated jitter RMS at 155MHz MAX. 3 ps ps Note: Higher Q factor of 3 rd overtone crystals will result in even better jitter performance. 5. Phase noise specifications PARAMETERS Phase Noise vs. carrier with fund. crystal. FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS 155.52MHz -80 -110 -125 -143 -145 dBc/Hz Note: Higher Q factor of 3 rd overtone crystals will result in even better phase noise performance. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 3 PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) 6 . LVDS Electrical Characteristics PARAMETERS SYMBOL MIN. TYP. MAX. UNITS V OD 247 355 454 mV ∆V OD -50 50 mV 1.6 V Output Differential Voltage V DD Magnitude Change Output High Voltage V OH Output Low Voltage V OL Offset Voltage CONDITIONS 1.4 R L = 100 Ω (see figure) 0.9 1.1 V OS 1.125 1.2 1.375 V Offset Magnitude Change ∆V OS 0 3 25 mV Power-off Leakage I OXD ±1 ±10 uA Output Short Circuit Current I OSD -5.7 -8 mA V out = V DD or GND V DD = 0V V 7. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf R L = 100 Ω C L = 10 pF (see figure) 0.2 0.7 1.0 ns LVDS Levels Test Circuit LVDS Switching Test Circuit OUT OUT CL = 10pF 50Ω VOD VDIFF VOS RL = 100Ω 50Ω CL = 10pF OUT OUT LVDS Transistion Time Waveform OUT 0V (Differential) OUT 80% VDIFF 80% 0V 20% 20% tR tF 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 4 PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) 8. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. Output High Voltage V OH V DD – 1.025 Output Low Voltage V OL R L = 50 Ω to (V DD – 2V) (see figure) MAX. UNITS V V DD – 1.620 V 9. PECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time tr @20/80% - PECL 0.6 1.5 ns Clock Fall Time tf @80/20% - PECL 0.5 1.5 ns PECL Levels Test Circuit OUT PECL Output Skew OUT VDD 50Ω 2.0V 50% 50Ω OUT tSKEW OUT PECL Transistion Time Waveform DUTY CYCLE 45 - 55% 55 - 45% OUT 80% 50% 20% OUT tR tF 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 5 PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) PAD ASSIGNMENT Pad # Name X (µ µ m) Y (µ µ m) 1 Optional GND 248 109 2 Optional GND 361 109 3 Optional GND 473 109 4 Optional GND 587 109 5 GND 702 109 6 Reserved 874 109 7 Optional GNDBUF 1042 109 8 GNDBUF 1171 109 9 OUTSEL 1400 125 10 LVDS 1400 259 11 PECL 1400 476 12 VDDBUF 1400 616 13 Optional VDDBUF 1400 716 14 PECLB 1400 871 15 LVDSB 1400 1089 16 Do Not Connect 1400 1227 17 GNDBUF 1389 1365 18 Reserved 1232 1365 19 Do Not Connect 1042 1365 20 Do Not Connect 854 1365 21 Optional VDD 659 1365 22 Optional VDD 559 1365 23 VDD 459 1365 24 Optional VDD 358 1365 25 OESEL 194 1365 26 XIN 109 1223 27 XOUT 109 1017 28 Do Not Connect 109 858 29 Do Not Connect 109 646 30 OE_CTRL 109 397 31 Do Not Connect 109 181 Note: for optimal Phase Noise performance, it is recommended to bond all optional VDD and GND pads. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 6 PLL620-21 Low Phase Noise XO (for HF Fund. and 3 rd O.T.) ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL620-21 D C TEMPERATURATRE PART NUMBER C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE D=DIE Order Number Marking Package Option PLL620-21DC P620-21DC Die – Waffle Pack PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/10/07 Page 7