AN598 H I G H - S PEED L EVEL S HIFT ING U SING Si8 XXX I SOLATORS 1. Introduction Voltage level shifting is common in analog and mixed-signal system applications. While several technologies implement level shifting (e.g., HVIC processes, discrete circuits, dedicated level shifting ICs), recent advances in CMOS isolation technology enables fast, reliable, and highly-integrated ICs that are ideal for a broad range of level shifting applications. This application note discusses precision high-speed level shifting techniques using Silicon Labs' Si8xxx Digital isolators and ISOdrivers. Specifically, this application note covers common-mode voltage level shifting, logic threshold voltage level shifting, and gate driver common-mode inversion. 2. Addressing Common Mode Level Shifting Many industrial applications require measurements of very low-level analog signals from sensors, such as thermocouples and pressure transducers. These sensors often ride on very high common-mode voltages (VCM) and, as a result, have differential outputs. Typically, an instrumentation amplifier applies differential gain to amplify the sensor output signal (typically <100 mV), amplifying the signal to a level compatible with the analog-to-digital converter (ADC) input range (typically >1 V). Since the digitized signal is typically processed by an earth-ground-based MCU or other controller, galvanic isolation is required between the ADC output and ground-based controller input to prevent the high common-mode voltage from entering low-voltage, ground-based circuitry. VDD2 Si86xx Digital Isolator Bias VDD VDD1 VDD2 IN1 S ADC Instrumentation Amp Tx INPUT‐SIDE DIE Si86xx Isolator GND1 Isolation Barrier OUT1 Rx BUF OUTPUT‐SIDE DIE Digital Input GND2 MCU or Other Processor GND VCM Figure 1. Example Industrial Application Figure 1 shows a Silicon Labs Si86xx digital isolator providing isolation and level-shifting between an analog data acquisition circuit (riding on a high common-mode voltage) and a ground-referenced controller. The Si86xx isolator operates by enabling its input-side transmitter when IN1 is logic high, causing the transmitter to generate a carrier wave that propagates through the isolation barrier to the output-side receiver. The receiver asserts a logic high on OUT1 when sufficient in-band energy is detected. Conversely, a logic low at IN1 results in no carrier, which, in turn, results in a logic low at OUT1. This simple architecture carries with it industry-leading performance, reliability, power savings, integration, cost effectiveness, and space savings. These isolators are very easy to use; the designer need only choose the isolation working voltage rating, speed, and dc bias. (Note the difference between working voltage and rated voltage; rated voltage is a component-level specification that specifies the isolator's voltage withstand capability at 2500 VRMS or 5000 VRMS for one minute.) In Figure 1, the VCM is 560 V (peak or dc) and is also the working voltage for the system, i.e. the voltage that the barrier must withstand continuously throughout the system’s lifetime. As shown in Figure 2, the mean time-to-failure for these isolators at a working voltage of 396 VRMS (560 Vpk) is 60 years. Rev. 0.1 5/11 Copyright © 2011 by Silicon Laboratories AN598 AN598 Figure 2. Si84xx Time-Dependent Dielectric Breakdown 2 Rev. 0.1 AN598 3. Logic Level Shifting To reduce overall system power consumption, many of today's high-speed logic devices (e.g. FPGAs) operate from supplies of 3V or less. Lower bias voltages (and consequently lower logic thresholds) complicate interface with 5 V devices, creating a need for a fast and robust logic level shifter. The “minimalist” approach of Figure 3A provides compatible logic thresholds, but the maximum 4.8 V VOH of the 5 V logic device can negatively impact the performance or damage the 2.5 V logic device. Figure 3B eliminates the over-voltage problem of Figure 3A using an open drain (or open collector) buffer with a pull-up to 2.5 V. While this is a good solution for low-speed logic circuits, the pull-up resistor can significantly slow the rising edge of the output waveform, creating timing problems in high-speed circuits. Figure 3C shows the Si86xx isolator used as a logic threshold level shifter where each side of the isolator is biased to match the local logic rails. Note the common ground on both sides of the isolator since all logic supplies are assumed to be connected to a common ground. 5V 2.5V 5V 2.5V 5V Logic 2.5V Logic 5V Logic 2.5V Logic Input Output Input Output Input Output Input Output VOH = 4.8V(max) B A 5V 2.5V Si86xx Digital Isolator VIH VIL VDD1 5V Logic Input VDD2 IN1 Output Tx VIH = 2.0V(min) VIL = 0.8V(max) VOH = 2.5V(min), 4.8V(max) Isolation Barrier INPUT‐SIDE DIE Si86xx Isolator GND1 OUT1 Rx BUF OUTPUT‐SIDE DIE 2.5V Logic Input GND2 VIH = 2.5V VIL = 0.1V Output VOH VOL VOH = 2.0V(min) VOL = 0.8V(max) C Figure 3. Logic Level Shift Approaches Rev. 0.1 3 AN598 4. Isolated Gate Driver Common Mode Inversion The Si823x ISOdrivers are isolated dual 0.5 A and 4.0 A MOSFET/IGBT gate drivers based on the same proprietary Silicon Labs CMOS isolation technology used in the Si86xx digital isolators. ISOdrivers provide up to 5 kVRMS withstand voltage per UL1577 and have fast 60 ns propagation delay time. Their high integration, flexibility, and performance allow these drivers to be used in a number of switch mode power system (SMPS) applications. For more information, please see Silicon Labs application note “AN441: Using the Si8232/5/6 Dual ISODrivers in Power Delivery Systems”. The Dual ISOdrivers have no built-in overlap protection or dead time generator, enabling the state of each driver output to unconditionally follow that of its input as long as both sides of the device are powered. A block diagram of the Si8232/5/6 Dual ISOdriver is shown in Figure 4. VDDI ISOLATION VDDA VIA VOA UVLO GNDA VDDI VDDI UVLO VDDI ISOLATION VDDB DISABLE VOB UVLO GNDB VIB GNDI Si8232/5/6 Figure 4. Common Mode Inversion For example, in a given application, GNDA might have a common-mode voltage of 100 V while GNDB has a common-mode voltage of 200 V. These two common-mode voltages can reverse (i.e., GNDA can change to 200 V, and GNDB can change to 100 V as in Figure 5) without damaging or upsetting the driver. The Si8232/5/6 drivers can therefore be used in dual-low-side, dual-high-side, or high-side/low-side configurations in systems where common-mode voltages vary greatly. VDDA VDDI VDDI VDDA VOA GNDI OUT A GNDA GNDA VIA VDDB From Controller VIB VDDB VOB DISABLE OUT B Common Mode Voltage (V) Si8232/5/6 VOB Output Output Signal Signal VOB VOA Output Signal Common Mode Voltage V1 VOA VOAOutput OutputSignal Signal VOB Output Signal GNDB GNDB Common Mode Voltage V2 Time Figure 5. Common Mode Inversion 4 Rev. 0.1 AN598 5. Summary This application note discusses high-speed level shifting techniques using Silicon Labs' Si8xxx digital isolators and ISOdrivers. The underlying technology of Silicon Labs CMOS isolation technology offers high-speed and lowpower operation, high reliability and integration, and ease-of-use for voltage level-shifting as well as other applications. Rev. 0.1 5 AN598 CONTACT INFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. 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