ZSPM4521

Data Sheet
Rev. 1.01 / September 2014
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Power Management
Power and Precision
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Features
Brief Description

The ZSPM4521 is a DC/DC synchronous switching
lithium-ion (Li-Ion) battery charger with fully integrated power switches, internal compensation, and
full fault protection. It uses a temperature-independent photovoltaic maximum power point tracking
(MPPT) function to optimize power output from the
source during Full-Charge Constant-Current (CC)
Mode. Its switching frequency of 1MHz enables the
use of small filter components, resulting in smaller
board space and reduced bill-of material costs.






During Full-Charge Constant-Current Mode, the duty
cycle is controlled by the MPPT regulator. Once the
battery’s termination voltage is reached, the regulator operates in Constant Voltage Mode. In this mode,
the ZSPM4521 modulates the charging current until
the battery reaches full charge. When the regulator
is disabled (the EN pin is low), the device draws
10µA (typical) quiescent current (Disabled Mode).


Temperature-independent photovoltaic maximum
power tracking (MPPT) regulator
VBAT reverse-current blocking
Programmable temperature-compensated
termination voltage: 3.94V to 4.18V ± 1%
User programmable maximum charge current:
50mA to 1500mA
Supervisor for VBAT reported at the NFLT pin
Input supply under-voltage lockout
Full protection for VBAT over-current, overtemperature, VBAT over-voltage, and charging
timeout
Charge status indication
2
I C™ program interface with EEPROM registers
Related ZMDI Smart Power Products

The ZSPM4521 includes supervisory reporting
through the NFLT (inverted fault) open-drain output
to interface other components in the system. Device
programming is achieved by an I²C™* interface
through the SCL and SDA pins.



ZSPM4523 DC/DC Synchronous Switching
Super Capacitor Charger With MPPT Regulator
ZSPM4551 High-Efficiency Li-Ion Battery Charger
ZSPM4121 Ultra-low Power Under-Voltage Switch
ZSPM4141 Ultra-Low-Power Linear Regulator
Benefits
Physical Characteristics



Up to 1.5A of continuous output current in FullCharge Constant Current (CC) Mode
High efficiency – up to 92% with typical loads


Available Support


Wide input voltage range: 4.0V to 7.2V
Junction operating temperature: -40°C to 125°C
Package: 16-pin PQFN (4mm x 4mm)
ZSPM4521 Application Circuit
Evaluation Kit
Documentation
ZSPM4521
Photovoltaic Cells
VIN
VTH_REF
RREF
CIN
VTHERM
GND
CVDD
RSENSE
LOUT
VDD
Battery
SW
COUT
VDD
RPULLUP
(optional)
SCL
VSENSE
SDA
VBAT
RTHM
VDD
EN
NFLT
RPULLUP
(optional)
PGND
* I2C™ is a trademark of NXP.
For more information, contact ZMDI via [email protected]
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01— October 3, 2014. All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated,
stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
ZSPM4521 Block Diagram
EN
NFLT
Photovoltaic
Cells
VIN
VIN
CIN
VIN
ZSPM4521
SCL
I²C™*
Interface
MONITOR
&
CONTROL
OverVoltage
Protection
Oscillator
SDA
~5V @ 450mA
VBAT
VTH_REF
BATT Thermal
Control
Ramp
Generator
BATT Current
Control
RREF
VTHERM
VBAT
VIN

Vref
Gate
Drive
Typical Applications
Backgate
Blocking
Gate Drive
Control

Portable solar chargers

Off-grid systems
Comparator
Wireless sensor
networks
 HVAC controls
LOUT
RSENSE
BATTERY
COUT
Compensation
Network
RTHM
Gate
Drive
Error Amp

SW
PGND
VIN
VDD Regulator
MPP & Current
Control
VSENSE
VBAT
VDD
GND
CVDD
*I2C™ is a trademark of NXP.
Ordering Information
Ordering Code
Description
Package
ZSPM4521AA1W
ZSPM4521 High Efficiency Li-Ion Battery Charger for
Photovoltaic Sources
16-pin PQFN / 7” Reel (1000 parts)
ZSPM4521AA1R
ZSPM4521 High Efficiency Li-Ion Battery Charger for
Photovoltaic Sources
16-pin PQFN / 13” Reel (3300 parts)
ZSPM4521KIT
ZSPM4521 Evaluation Kit
Kit
Sales and Further Information
www.zmdi.com
[email protected]
Zentrum Mikroelektronik
Dresden AG
Global Headquarters
Grenzstrasse 28
01109 Dresden, Germany
ZMD America, Inc.
1525 McCarthy Blvd., #212
Milpitas, CA 95035-7453
USA
Central Office:
Phone +49.351.8822.306
Fax
+49.351.8822.337
USA Phone 1.855.275.9634
Phone +1.408.883.6310
Fax
+1.408.883.6358
European Technical Support
Phone +49.351.8822.7.772
Fax
+49.351.8822.87.772
DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The
information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer,
licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or
in any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any
customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for
any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty,
tort (including negligence), strict liability, or otherwise.
European Sales (Stuttgart)
Phone +49.711.674517.55
Fax
+49.711.674517.87955
Zentrum Mikroelektronik
Dresden AG, Japan Office
2nd Floor, Shinbashi Tokyu Bldg.
4-21-3, Shinbashi, Minato-ku
Tokyo, 105-0004
Japan
ZMD FAR EAST, Ltd.
3F, No. 51, Sec. 2,
Keelung Road
11052 Taipei
Taiwan
Phone +81.3.6895.7410
Fax
+81.3.6895.7301
Phone +886.2.2377.8189
Fax
+886.2.2377.8199
Zentrum Mikroelektronik
Dresden AG, Korea Office
U-space 1 Building
11th Floor, Unit JA-1102
670 Sampyeong-dong
Bundang-gu, Seongnam-si
Gyeonggi-do, 463-400
Korea
Phone +82.31.950.7679
Fax
+82.504.841.3026
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01— October 3, 2014
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Contents
1
2
3
4
5
6
7
8
ZSPM4521 Characteristics............................................................................................................................... 6
1.1. Absolute Maximum Ratings ....................................................................................................................... 6
1.2. Thermal Characteristics ............................................................................................................................. 6
1.3. Recommended Operating Conditions ....................................................................................................... 7
1.4. Electrical Characteristics ........................................................................................................................... 7
2
1.5. I C™ Interface Timing Requirements ...................................................................................................... 11
Functional Description .................................................................................................................................... 12
2.1. Internal Protection ................................................................................................................................... 13
2.1.1. VIN Under-Voltage Lockout .............................................................................................................. 13
2.1.2. Internal Current Limit ........................................................................................................................ 13
2.1.3. Thermal Shutdown ............................................................................................................................ 13
2.1.4. VBAT Over-Voltage Protection ......................................................................................................... 13
2.2. Fault Handling.......................................................................................................................................... 14
2.2.1. NFLT Pin Functionality ...................................................................................................................... 14
2.2.2. Other Faults ...................................................................................................................................... 14
2.3. Serial Interface ........................................................................................................................................ 16
2
2.3.1. I C™ Subaddress Definition ............................................................................................................. 16
2
2.3.2. I C™ Bus Operation .......................................................................................................................... 16
2.4. Status and Configuration Registers ......................................................................................................... 18
Application Circuits ......................................................................................................................................... 23
3.1. Typical Application Circuit ....................................................................................................................... 23
3.2. Selection of External Components .......................................................................................................... 23
3.2.1. COUT Output Capacitor ...................................................................................................................... 23
3.2.2. LOUT Output Inductor ......................................................................................................................... 23
3.2.3. CIN Bypass Capacitor for Input from Photovoltaic Source ................................................................ 23
3.2.4. CVDD Bypass Capacitor for VDD Internal Reference Voltage Output ............................................... 24
3.2.5. RSENSE Output Sensing Resistor ....................................................................................................... 24
3.2.6. Pull-up Resistors ............................................................................................................................... 24
Pin Configuration and Package ...................................................................................................................... 25
4.1. ZSPM4521 Package Dimensions ............................................................................................................ 25
4.2. Pin-Out Assignments ............................................................................................................................... 26
4.3. Pin Description for 16-Pin PQFN (4 x 4 mm) .......................................................................................... 26
4.4. Package Markings ................................................................................................................................... 27
Layout Recommendations.............................................................................................................................. 28
5.1. Multi-Layer PCB Layout ........................................................................................................................... 28
5.2. Single-Layer PCB Layout ........................................................................................................................ 29
Ordering Information ...................................................................................................................................... 30
Related Documents ........................................................................................................................................ 30
Document Revision History ............................................................................................................................ 31
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
4 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
List of Figures
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 3.1
Figure 4.1
Figure 4.2
Figure 4.3
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
ZSPM4521 Block Diagram ............................................................................................................... 12
Charging State Diagram ................................................................................................................... 15
2
Subaddress in I C™ Transmission ................................................................................................... 16
2
I C™ Start / Stop Protocol ................................................................................................................ 17
2
I C™ Data Transmission Timing ...................................................................................................... 17
Typical Application Circuit for Charging a Lithium-Ion Battery via Photovoltaic Cells ...................... 23
PQFN-16 Package Dimensions ........................................................................................................ 25
ZSPM4521 Pin Assignments ............................................................................................................ 26
Marking Diagram 16-Pin PQFN (4 x 4 mm) ...................................................................................... 27
Package and PCB Land Configuration for Multi-Layer PCB ........................................................... 28
JEDEC Standard FR4 Multi-Layer Board – Cross-Sectional View ................................................... 28
Conducting Heat Away from the Die using an Exposed Pad Package ............................................ 29
Application Using a Single-Layer PCB ............................................................................................. 30
List of Tables
Table 1.1
Table 1.2
Table 1.3
Table 1.4
Table 1.5
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 4.1
Data Sheet
October 3, 2014
Absolute Maximum Ratings ................................................................................................................ 6
Thermal Characteristics ...................................................................................................................... 6
Recommended Operating Conditions ................................................................................................ 7
Electrical Characteristics .................................................................................................................... 7
2
I C™ Interface Timing Characteristics .............................................................................................. 11
Register Descriptions (Device Address = 48HEX) .............................................................................. 18
STATUS Register—Address 00HEX .................................................................................................. 18
Configuration Register CONFIG1—Address 02HEX .......................................................................... 19
Configuration Register CONFIG2—Address 03HEX .......................................................................... 19
Configuration Register CONFIG3—Address 04HEX .......................................................................... 20
Configuration Register CONFIG4—Address 05HEX .......................................................................... 20
Configuration Register CONFIG5—Address 06HEX .......................................................................... 21
Enable Configuration Register CONFIG_ENABLE—Address 11HEX................................................ 22
EEPROM Control Register EEPROM_CTRL—Address 12HEX ........................................................ 22
Pin Description .................................................................................................................................. 26
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
5 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
1
ZSPM4521 Characteristics
Important: Stresses beyond those listed under “Absolute Maximum Ratings” (section 1.1) may cause permanent
damage to the device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to
absolute–maximum–rated conditions for extended periods may affect device reliability.
1.1.
Absolute Maximum Ratings
Over operating free–air temperature range unless otherwise noted.
Table 1.1
Absolute Maximum Ratings
Parameter
Value
1)
Unit
VIN, EN, NFLT, SCL, SDA, VTHERM, VTH_REF, VBAT, VSENSE
-0.3 to 8
V
SW
-1 to 8.8
V
VDD
-0.3 to 3.6
V
Operating Junction Temperature Range, TJ
-40 to 125
°C
-65 to 150
°C
±2k
V
+/-200
V
260
°C
Storage Temperature Range, TSTOR
Electrostatic Discharge – Human Body Model
Electrostatic Discharge – Machine Model
2)
2)
Lead Temperature (soldering, 10 seconds)
1.2.
1)
All voltage values are with respect to network ground terminal.
2)
ESD testing is performed according to the respective JESD22 JEDEC standard.
Thermal Characteristics
Table 1.2
Thermal Characteristics
Parameter
Thermal Resistance Junction to Air
1)
Symbol
1)
JA
Value
1)
50
Unit
°C/W
2
Assumes a 4x4mm QFN-16 in 1 in area of 2 oz. copper and 25°C ambient temperature.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
6 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
1.3.
Recommended Operating Conditions
Table 1.3
Recommended Operating Conditions
Parameter
Photovoltaic Input Operating Voltage at VIN Pin
Sense Resistor
Output Filter Inductor Typical Value
1)
Output Filter Capacitor Typical Value
2)
Symbol
Min
Typ
Max
Unit
VIN
4.0
5.3
7.2
V
RSENSE
50
m
LOUT
4.7
µH
COUT
4.7
µF
COUT-ESR
Output Filter Capacitor ESR
100
Input Supply Bypass Capacitor Value
3)
CIN
3.3
10
VDD Supply Bypass Capacitor Value
2)
CVDD
70
100
Operating Free Air Temperature
TA
Operating Junction Temperature
TJ
m
µF
130
nF
-40
85
°C
-40
125
°C
1)
For best performance, use an inductor with a saturation current rating higher than the maximum V BAT load requirement plus the
inductor current ripple.
2)
For best performance, use a low ESR ceramic capacitor.
3)
For best performance, use a low ESR ceramic capacitor. If CIN is not a low ESR ceramic capacitor, add a 0.1µF ceramic capacitor in
parallel to CIN.
1.4.
Electrical Characteristics
Electrical characteristics TJ = -40°C to 125°C, VIN = 5.3V, (unless otherwise noted)
Table 1.4
Electrical Characteristics
Parameter
Symbol
Condition
Min
Typ
Max
Unit
4
5.3
7.2
V
VIN Supply Voltage
Photovoltaic Voltage Input
VIN
Quiescent Current
Normal Mode
ICC-NORM
Quiescent Current
Disabled Mode
ICC-DISABLE
ILOAD = 0A, no switching
EN  2.2V (HIGH)
3
EN = 0V
10
mA
50
µA
VBAT Leakage
Leakage Current From
Battery
IBAT-LEAK
EN = 0V, VVBAT = 4.1V
10
µA
Reverse Current
IBAT-BACK
VVBAT> VIN, VVBAT = 4.1V,
Tj < 85°C
10
µA
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
7 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Parameter
Symbol
Condition
Min
Typ
Max
Unit
VIN Under-Voltage Lockout
Input Supply Under-Voltage
Threshold
VIN-UV
Input Supply Under-Voltage
Threshold Hysteresis
VIN-UV_HYST
fOSC
VIN increasing
3.15
V
100
200
mV
0.9
1
OSC
Oscillator Frequency
1.1
MHz
NFLT Open Drain Output
High-Level Output Leakage
IOH-NFLT
VNFLT = 5.3V
Low-Level Output Voltage
VOL-NFLT
INFLT = -1mA
0.1
µA
0.4
V
EN/SCL/SDA Input Voltage Thresholds
High Level Input Voltage
VIH
Low Level Input Voltage
VIL
Input Hysteresis– EN, SCL,
SDA Pins
VHYST
Input Leakage – EN Pin
IIN-EN
Input Leakage – SCL Pin
Input Leakage – SDA Pin
Low-Level Output Voltage
IIN-SCL
IIN-SDA
VOL-SDA
2.2
V
0.8
V
200
mV
VEN=VIN
0.1
µA
VEN=0V
-2.0
µA
VSCL=VIN
55
µA
VSCL=0V
-0.1
µA
VSDA=VIN
0.1
µA
VSDA=0V
-0.1
µA
ISDA = -1mA
0.4
V
Thermal Shutdown
Thermal Shutdown Junction
Temperature
TSD Hysteresis
TSD
150
TSD-HYST
170
°C
10
°C
Pre-Charge End
Pre-charge Voltage
Threshold
VPRECHG
2.9
3.0
3.1
V
Pre-charge Voltage
Hysteresis
VPC-HYST
70
mV
VRESTART
100
mV
Charge Restart
Voltage Below Termination
for Charging Restart
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
8 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Charging Regulator with LOUT=4.7µH and COUT=4.7µF
Output Current Limit
Tolerance in Full-Charge
Mode
IBAT-FC
IBAT is user programmable;
see Table 2.5.
IBAT 10%
IBAT
IBAT +
10%
A
Termination Voltage
Tolerance in Top-Off Mode
VBAT-TO
ICHG = 0.1C, 0°C < Tj < 85°C
VBAT is user programmable;
see section 2.4.
VBAT 1%
VBAT
VBAT +
1%
V
Top-Off Mode Time Out
tTO
0
120
Minutes
Full-Charge Timer
tFC
200
1400
Minutes
Timer Accuracy
tACC
-10%
+10%
High Side (HS) Switch On
Resistance
Low Side (LS) Switch On
Resistance
RDSON
Maximum Output Current
IBAT
Over-Current Detection
IOCD
VBAT Over-Voltage Threshold
Maximum Duty Cycle
ISW = -1A, TJ=25°C
200
mΩ
ISW = 1A, TJ=25°C
250
mΩ
1.5
A
HS switch current
2.5
101%
VBAT
VBAT-OV
DUTYMAX
A
102%
VBAT
103%
VBAT
V
98
%
1.8
V
Thermistor
VTH_REF Output Voltage
VVTH_REF
IVT_REF = 2µA to 100µA
Thermistor: 10kΩ Temperature Thresholds – β=3434K
0°C
Decreasing Temperature
75.6
%VTH_REF
0°CHYST
Increasing Temperature
66.5
%VTH_REF
10°C VTHERM Threshold
(10°C)
10°C
Decreasing Temperature
66.2
%VTH_REF
10°C VTHERM Threshold
with Hysteresis (11°C)
10°CHYST
Increasing Temperature
65.4
%VTH_REF
45°C VTHERM Threshold
(45°C)
45°C
Increasing Temperature
34.5
%VTH_REF
45°C VTHERM Threshold
with Hysteresis (44°C)
45°CHYST
Decreasing Temperature
35.3
%VTH_REF
50°C VTHERM Threshold
(50°C)
50°C
Increasing Temperature
30.8
%VTH_REF
0°C VTHERM Threshold
(0°C)
0°C VTHERM Threshold with
Hysteresis (10°C)
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
9 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Parameter
Symbol
Condition
Min
Typ
Max
Unit
50°C VTHERM Threshold
with Hysteresis (49°C)
50°CHYST
Decreasing Temperature
31.5
%VTH_REF
60°C VTHERM Threshold
(60°C)
60°C
Increasing Temperature
24.9
%VTH_REF
60°C VTHERM Threshold
with Hysteresis (50°C)
60°CHYST
Decreasing Temperature
30.8
%VTH_REF
Thermistor: 100KΩ Temperature Thresholds – β=4311K
0°C
Decreasing Temperature
80.5
%VTH_REF
0°CHYST
Increasing Temperature
69.8
%VTH_REF
10°C VTHERM Threshold
(10°C)
10°C
Decreasing Temperature
69.8
%VTH_REF
10°C VTHERM Threshold
with Hysteresis (11°C)
10°CHYST
Increasing Temperature
68.6
%VTH_REF
45°C VTHERM Threshold
(45°C)
45°C
Increasing Temperature
31.3
%VTH_REF
45°C VTHERM Threshold
with Hysteresis (44°C)
45°CHYST
Decreasing Temperature
32.3
%VTH_REF
50°C VTHERM Threshold
(50°C)
50°C
Increasing Temperature
27.0
%VTH_REF
50°C VTHERM Threshold
with Hysteresis (49°C)
50°CHYST
Decreasing Temperature
27.8
%VTH_REF
60°C VTHERM Threshold
(60°C)
60°C
Increasing Temperature
19.4
%VTH_REF
60°C VTHERM Threshold
with Hysteresis (50°C)
60°CHYST
Decreasing Temperature
27.0
%VTH_REF
0°C VTHERM Threshold
(0°C)
0°C VTHERM Threshold with
Hysteresis (10°C)
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
10 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
1.5.
I2C™ Interface Timing Requirements
Electrical characteristics TJ = -40°C to 125°C, VIN = 5.3V. See Figure 2.5 for an illustration of the timing specifications given in Table 1.5.
Table 1.5
2
I C™ Interface Timing Characteristics
Standard Mode
Parameter
Fast Mode
1)
Symbol
Unit
Min
Max
Min
Max
100
0
400
2
fscl
0
2
tsch
4
0.6
µs
1.3
µs
I C™ Clock Frequency
I C™ Clock High Time
2
I C™ Clock Low Time
kHz
tscl
4.7
2)
tsp
0
I C™ Serial Data Setup Time
tsds
250
250
ns
tsdh
0
0
µs
2
I C™ Tolerable Spike Time
2
2
I C™ Serial Data Hold Time
2
I C™ Input Rise Time
2
I C™ Input Fall Time
2)
2)
50
0
50
ns
ticr
1000
300
ns
ticf
300
300
ns
2
tocf
300
300
ns
2
tbuf
4.7
1.3
µs
2
tsts
4.7
0.6
µs
2
tsth
4
0.6
µs
tsps
4
0.6
µs
I C™ Output Fall Time; 10pF to
2)
400pF Bus
I C™ Bus Free Time Between Stop
and Start
I C™ Start or Repeated Start Condition
Setup Time
I C™ Start or Repeated Start Condition
Hold Time
2
I C™ Stop Condition Setup Time
2)
1)
The I²C™ interface will operate in either standard or fast mode.
2)
Parameter not tested in production.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
11 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
2
Functional Description
The ZSPM4521 is a fully-integrated Li-Ion battery charger IC based on a highly-efficient switching topology. It
includes a maximum power point tracking (MPPT) function to optimize its input voltage in order to extract the
maximum possible power from photovoltaic (PV) cells. It is configurable for termination voltage, charge current,
and additional variables to allow optimum charging conditions for a wide range of Li-Ion batteries. A 1MHz internal
switching frequency facilitates low-cost LC filter combinations. Figure 2.1 provides a block diagram.
When the battery voltage is below 3.0V, the ZSPM4521 enters a pre-charge state and applies a small,
programmable charge current to safely charge the battery to a level for which full-charge current can be applied.
Once the Full-Charge Mode has been initiated, the ZSPM4521 will maximize available charge current to the
battery by adjusting its duty cycle to regulate its input voltage to the MPP voltage of the photovoltaic (PV) cell. If
sufficient current is available from the PV cell to exceed the safe 1C charge rate of the battery, then the programmable 1C current limit function will take precedence over the MPPT control function and the PV cell voltage will
rise above the MPP value.
Figure 2.1
ZSPM4521 Block Diagram
EN
NFLT
Photovoltaic
Cells
VIN
VIN
CIN
VIN
ZSPM4521
SCL
I²C™*
Interface
MONITOR
&
CONTROL
OverVoltage
Protection
Oscillator
SDA
~5V @ 450mA
VBAT
VTH_REF
BATT Thermal
Control
Ramp
Generator
BATT Current
Control
RREF
VTHERM
VBAT
VIN

Vref
Gate
Drive
Gate Drive
Control
Backgate
Blocking
SW
LOUT
RSENSE
BATTERY
COUT
Comparator
Gate
Drive
Error Amp
Compensation
Network
RTHM
PGND
VIN
VDD Regulator
MPP & Current
Control
VSENSE
VBAT
VDD
GND
CVDD
Data Sheet
October 3, 2014
*I2C™ is a trademark of NXP.
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
12 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
When the battery voltage has increased enough to go into maintenance mode, the PWM control loop will force a
constant voltage across the battery. Once in Constant Voltage Mode, current is monitored to determine when the
battery is fully charged. See Figure 2.2 for a diagram of the charging states.
The regulation voltage as well as the 1C charging current can be set to change based on the battery temperature.
There are four temperature ranges for which the regulation voltage can be set independently: 0°C to 10°C, 10°C
to 45°C, 45°C to 50°C, and 50°C to 60°C. The ZSPM4521 will stop charging if the temperature passes the
descending temperature threshold at 0°C or the ascending threshold at 60°C. These thresholds have 10 degrees
of hysteresis. The intermediate points have 1 degree of hysteresis.
2.1.
2.1.1.
Internal Protection
VIN Under-Voltage Lockout
The device is held in the off state until the EN pin voltage is HIGH ( 2.2V) and VIN reaches 3.15V (typical). There
is a 200mV hysteresis on this input, which requires the input to fall below 2.95V (typical) before the device will
disable.
2.1.2.
Internal Current Limit
The current through the inductor LOUT is sensed on a cycle-by-cycle basis and if the current limit (IOCD; see section 1.4) is reached, the ZSPM4521 will abbreviate the cycle. The current limit is always active when the regulator
is enabled.
2.1.3.
Thermal Shutdown
If the junction temperature of the ZSPM4521 exceeds 170°C (typical), the SW output will tri-state to protect the
device from damage. The NFLT and all other protection circuitry will stay active to inform the system of the failure
mode. Once the device cools to 160°C (typical), the device will attempt to start up again. If the device reaches
170°C, the shutdown/restart sequence will repeat.
2.1.4.
VBAT Over-Voltage Protection
The ZSPM4521 has a battery protection circuit designed to shut down the charging profile if the battery voltage is
greater than the termination voltage. The termination voltage can change based on user programming, so the
protection threshold is set to 2% above the termination voltage. Shutting down the charging profile puts the
ZSPM4521 in a fault condition.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
13 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
2.2.
2.2.1.
Fault Handling
NFLT Pin Functionality
In the event of a battery over-voltage, the battery temperature being outside of the safe charging range, or the full
charge timer expiring, charging stops and the NFLT pin is pulled low. When the fault condition is no longer
present, the device will enter the INITIALIZE state (see Figure 2.2), but the NFLT pin will remain low until the
STATUS register (00HEX) is read (see Table 2.2). When the STATUS register is read, the NFLT pin will go high
until a new fault is detected.
2.2.2.
Other Faults
When an open thermistor, thermal shutdown, VIN under-voltage, or top-off time-out are detected, charging
immediately stops and the corresponding bit in the STATUS register (00HEX) is set. The device will enter the
INITIALIZE state until the fault is no longer detected.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
14 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Figure 2.2
Charging State Diagram
EN
INITIALIZE STATE
INITIALIZE
Waiting for Valid
Charging Conditions
NO
No Faults &
VBAT< VRESTART
YES
PRE-CHARGE STATE
PRE-CHARGE
MPPT w/Pre-charge
Current Limit
NO
VBAT > VPRECHG
Threshold
YES
YES
FULL-CHARGE CONSTANT
CURRENT (CC) MODE
1C CHARGING
MPPT w/1C Current Limit and
Full Charge Timer
VBAT<VPRECHG
Threshold
NO
NO
NO
VBAT =VTERMINATION
& ICHARGE < IEOC
YES
CONSTANT VOLTAGE MODE
VBAT=
VTERMINATION
END OF CHARGE
VBAT regulated to VTERMINATION
with EOC Timer
YES
ICHARGE < Top
Off End Current
NO
YES
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
15 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
2.3.
Serial Interface
2
The ZSPM4521 features an I C™ slave interface that offers advanced control and diagnostic features. It supports
2
standard and fast mode data rates and auto-sequencing, and it is compliant to I C™ standard version 3.0.
2
I C™ operation offers configuration control for termination voltages, charge currents, and charge timeouts. This
2
configurability allows optimum charging conditions in a wide range of Li-Ion batteries. I C™ operation also offers
fault and warning indicators. Whenever a fault is detected, the associated status bit in the STATUS register is set
and the NFLT pin is pulled low. Whenever a warning is detected, the associated status bit in the STATUS register
is set, but the NFLT pin is not pulled low. Reading the STATUS register resets the fault and warning status bits,
and the NFLT pin is released after all fault status bits have been reset.
2.3.1.
2
I C™ Subaddress Definition
2
Figure 2.3
Subaddress in I C™ Transmission
Start – Start Condition
G[3:0] – Group ID: address fixed at 1001BIN
S[7:0] – Subaddress: defined per the address register map
A[2:0] – Device ID: address fixed at 000BIN
D[7:0] – Data: data to be transmitted with device
R/nW – Read / not Write Select Bit
2.3.2.
ACK – Acknowledge
Stop – Stop Condition
2
I C™ Bus Operation
2
The ZSPM4521’s I C™ is a two-wire serial interface; the two lines are serial clock (SCL) and serial data (SDA)
(see Figure 2.4). SDA must be connected to a positive supply (e.g., the VDD pin) through an external pull-up
resistor. The devices communicating on this bus can drive the SDA line low or release it to high impedance. To
2
ensure proper operation, setup and hold times must be met (see Table 1.5). The device that initiates the I C™
transaction becomes the master of the bus.
Communication is initiated by the master sending a START condition, which is a high-to-low transition on SDA
while the SCL line is high. After the START condition, the device address byte is sent, most significant bit (MSB)
first, including the data direction bit (read = 1; write = 0). After receiving the valid address byte, the device
responds with an acknowledge (ACK). An ACK is a low on SDA during the high of the ACK-related clock pulse.
2
On the I C™ bus, during each clock pulse, only one data bit is transferred. The data on the SDA line must remain
stable during the high pulse of the clock period, as changes in the data line at this time are interpreted as START
or STOP control conditions. A low-to-high transition on SDA while the SCL input is high indicates a STOP
condition and is sent by the master.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
16 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Any number of data bytes can be transferred from the transmitter to receiver between the START and the STOP
conditions. Each byte of eight bits is followed by one ACK bit from the receiver. The SDA line must be released by
the transmitter before the receiver can send an ACK bit. The receiver that acknowledges must pull down the SDA
line during the ACK clock pulse, so that the SDA line is stable low during the high pulse of the ACK-related clock
period. When a slave receiver is addressed, it must generate an ACK after each byte is received. Similarly, the
master must generate an ACK after each byte that it receives from the slave transmitter. An end of data is
signaled by the master receiver to the slave transmitter by not generating an acknowledge after the last byte has
been clocked out of the slave. This is done by the master receiver by holding the SDA line high. The transmitter
must then release the data line to enable the master to generate a STOP condition.
Figure 2.4
2
I C™ Start / Stop Protocol
See Table 1.5 for the definitions and specifications for the timing parameters labeled in Figure 2.5.
Figure 2.5
Data Sheet
October 3, 2014
2
I C™ Data Transmission Timing
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
17 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
2.4.
Status and Configuration Registers
Table 2.1
Register Descriptions (Device Address = 48HEX)
Register
Address
0
00HEX
1
N/A
2
02HEX
3
03HEX
Name
Default
STATUS
N/A
Description
00HEX
Status bit register
N/A
Register not implemented
CONFIG1
1)
EEPROM
Configuration register
CONFIG2
1)
EEPROM
Configuration register
EEPROM
Configuration register
4
04HEX
CONFIG3
1)
5
05HEX
CONFIG4
1)
EEPROM
Configuration register
CONFIG5
1)
EEPROM
Configuration register
N/A
Registers not implemented
6
06HEX
7-16
N/A
17
11HEX
CONFIG_ENABLE
00HEX
Enable configuration register access
12HEX
1)
00HEX
EEPROM control register
18
1)
N/A
EEPROM_CTRL
CONFIGx and EEPROM_CTRL registers are only accessible when the CONFIG_ENABLE register is written with the EN_CFG bit
set to 1 (see Table 2.8).
Table 2.2
STATUS Register—Address 00HEX
Note: All of the STATUS register bits are READ-only.
DATA BIT
FIELD NAME
D7
D6
D5
D4
D3
D2
D1
D0
BATT_OV
1C_TO
TEMP_0C
TEMP_60C
TSD
TOP_TO
VIN_UV
TH_OPEN
FIELD NAME
BIT DEFINITION
1)
BATT_OV
VBAT over-voltage.
1C_TO
Full charge timer has timed out.
TEMP_0C
Thermistor indicates battery temperature < 0°C.
TEMP_60C
Thermistor indicates battery temperature > 60°C.
TSD
Thermal shutdown.
TOP_TO
Top-off timer has timed out.
VIN_UV
VIN under-voltage.
TH_OPEN
Thermistor open (battery not present).
1)
Faults are defined as BATT_OV, 1C_TO, TEMP_0C, and TEMP_60C. Warnings are defined as TSD, TOP_TO, VIN_UV, and
TH_OPEN. Faults cause the NFLT pin to be pulled low. Warnings do not cause the NFLT pin to be pulled low. All status bits are
cleared after STATUS register read access. The NFLT pin will go to high impedance (open-drain output) after the STATUS register
has been read and all status bits have been reset.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
18 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Table 2.3
Configuration Register CONFIG1—Address 02HEX
Note: All of the CONFIG1 register bits are READ/WRITE.
DATA BIT
D7
D6
FIELD NAME
PRE_CHRG[1:0]
D5
D4
D1
D0
V_TERM_10_45[2:0]
BIT DEFINITION
1)
V_TERM_0_10[2:0]
D2
V_TERM_0_10[2:0]
FIELD NAME
PRE_CHRG[1:0]
D3
2)
V_TERM_10_45[2:0]
2)
Pre-charging configuration
00BIN – 50mA
01BIN – 100mA
10BIN – 185mA
11BIN – 370mA
Voltage termination:
0-10°C configuration
000BIN – 3.94V
001BIN – 4.00V
010BIN – 4.05V
011BIN – 4.10V
Voltage termination:
10-45°C configuration
100BIN – 4.12V
101BIN – 4.15V
110BIN – 4.18V
111BIN – Invalid setting
1)
PRE_CHRG Note: Maximum output current when VBAT < 3.0V.
2)
V_TERM Note: There are separate settings for battery temperatures 0-10°C, 10-45°C, 45-50°C , and 50-60°C (see Table 2.4 for
45-50°C and 50-60°C). For <0°C and >60°C, charging is disabled and a fault is set.
Table 2.4
Configuration Register CONFIG2—Address 03HEX
Note: All of the CONFIG2 register bits are READ/WRITE.
DATA BIT
D7
FIELD NAME
D6
EOC[1:0]
D5
D4
V_TERM_45_50[2:0]
FIELD NAME
EOC[1:0]
D3
D2
D1
V_TERM_50_60[2:0]
BIT DEFINITION
1)
End of charge configuration
V_TERM_45_50[2:0]
2)
V_TERM_50_60[2:0]
2)
Voltage termination:
45-50°C configuration
Voltage termination:
50-60°C configuration
00BIN – 50mA
01BIN – 100mA
10BIN – 185mA
11BIN – 370mA
000BIN – 3.94V
001BIN – 4.00V
010BIN – 4.05V
011BIN – 4.10V
100BIN – 4.12V
101BIN – 4.15V
110BIN – 4.18V
111BIN – Invalid setting
1)
EOC Note: Maximum output current when VBAT  3.0V.
2)
V_TERM Note: There are separate settings for battery temperatures 0-10°C, 10-45°C, 45-50°C , and 50-60°C
(see Table 2.3 for 0-10°C and 10-45°C). For <0°C and >60°C, charging is disabled and a fault is set.
Data Sheet
October 3, 2014
D0
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
19 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Table 2.5
Configuration Register CONFIG3—Address 04HEX
Note: All of the CONFIG3 register bits are READ/WRITE.
DATA BIT
D7
FIELD NAME
D6
D5
D3
MAX_CHRG_CURR_0_10[3:0]
FIELD NAME
D2
D1
D0
MAX_CHRG_CURR_10_45[3:0]
BIT DEFINITION
MAX_CHRG_CURR_0_10[3:0]
1)
MAX_CHRG_CURR_10_45[3:0]
1)
D4
Maximum charge current:
0-10°C configuration
1)
Maximum charge current;
10-45°C configuration
0000BIN – 50mA
0001BIN – 100mA
0010BIN – 200mA
0011BIN – 300mA
0100BIN – 400mA
0101BIN – 500mA
0110BIN – 600mA
0111BIN – 700mA
1000BIN – 800mA
1001BIN – 900mA
1010BIN – 1000mA
1011BIN – 1100mA
1100BIN – 1200mA
1101BIN – 1300mA
1110BIN – 1400mA
1111BIN – 1500mA
MAX_CHRG_CURR Note: There are separate settings for battery temperatures 0-10°C, 10-45°C, 45-50°C, and 50-60°C (see Table
2.6 for 45-50°C and 50-60°C). For <0°C and >60°C, charging is disabled and a fault is set.
Table 2.6
Configuration Register CONFIG4—Address 05HEX
Note: All of the CONFIG4 register bits are READ/WRITE.
DATA BIT
FIELD NAME
D7
D6
D5
D4
MAX_CHRG_CURR_45_50[3:0]
FIELD NAME
D2
D1
D0
MAX_CHRG_CURR_50_60[3:0]
BIT DEFINITION
MAX_CHRG_CURR_45_50[3:0]
1)
Maximum charge current:
45-50°C configuration
MAX_CHRG_CURR_50_60[3:0]
1)
Maximum charge current:
50-60°C configuration
1)
D3
0000BIN – 50mA
0001BIN – 100mA
0010BIN – 200mA
0011BIN – 300mA
0100BIN – 400mA
0101BIN – 500mA
0110BIN – 600mA
0111BIN – 700mA
1000BIN – 800mA
1001BIN – 900mA
1010BIN – 1000mA
1011BIN – 1100mA
1100BIN – 1200mA
1101BIN – 1300mA
1110BIN – 1400mA
1111BIN – 1500mA
MAX_CHRG_CURR Note: There are separate settings for battery temperatures 0-10°C, 10-45°C, 45-50°C, and 50-60°C
(see Table 2.5 for 0-10°C and 10-45°C). For <0°C and >60°C, charging is disabled and a fault is set.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
20 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Table 2.7
Configuration Register CONFIG5—Address 06HEX
Note: All of the CONFIG5 register bits are READ/WRITE.
DATA BIT
FIELD NAME
D7
D6
TOP_END
TH
D5
D4
TOP_TO[2:0]
FIELD NAME
TOP_END
TH
D0
1C_TO[2:0]
Thermistor configuration
0BIN – 10kΩ
1BIN – 100kΩ
TOP_TO[2:0]
4)
3)
Top off timer time out configuration
000BIN – 0 minutes
001BIN – 20 minutes
010BIN – 40 minutes
011BIN – 60 minutes
100BIN – 80 minutes
101BIN – 100 minutes
110BIN – 120 minutes
111BIN – Disable time out timer
Full charge timer time out configuration
000BIN – Disable full charge timer
001BIN – 200 minutes
010BIN – 400 minutes
011BIN – 600 minutes
100BIN – 800 minutes
101BIN – 1000 minutes
110BIN – 1200 minutes
111BIN – 1400 minutes
1)
TOP_END Note: Charging stops when VVBAT = VTERMINATION and IOUT < TOP_END
2)
TH Note: Setting for nominal thermistor and reference resistor value.
3)
TOP_TO Note: Timer starts when VVBAT = VTERMINATION and IOUT < EOC.
4)
1C_TO Note: Timer starts when VVBAT > 3.0V.
October 3, 2014
D1
Top-off end configuration
0BIN – 25mA
1BIN – 92mA
2)
Data Sheet
D2
BIT DEFINITION
1)
1C_TO[2:0]
D3
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
21 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Table 2.8
Enable Configuration Register CONFIG_ENABLE—Address 11HEX
Note: The reset value for all of the CONFIG_ENABLE register bits is 0.
DATA BIT
D7
D6
D5
D4
D3
D2
D1
D0
FIELD NAME
Not used
Not used
Not used
Not used
Not used
Not used
Not used
EN_CFG
READ/WRITE
R
R
R
R
R
R
R
R/W
FIELD NAME
BIT DEFINITION
EN_CFG
Table 2.9
Enable-access control bit for configuration registers CONFIG1 through CONFIG5
(addresses 02HEX to 06HEX)
0BIN – Disable access
1BIN – Enable access
EEPROM Control Register EEPROM_CTRL—Address 12HEX
Note: The reset value for all of the EEPROM_CTRL register bits is 0.
DATA BIT
D7
D6
D5
D4
D3
D2
D1
D0
FIELD NAME
Not used
Not used
Not used
Not used
Not used
Not used
Not used
EE_PROG
READ/WRITE
R
R
R
R
R
R
R
R/W
FIELD NAME
EE_PROG
1)
1)
BIT DEFINITION
EEPROM program control bit for configuration registers CONFIG1 through CONFIG5
(addresses 02HEX to 06HEX)
0BIN – Disable EEPROM programming
1BIN – Enable EEPROM programming with data from configuration registers
CONFIG1 through CONFIG5 (addresses 02HEX to 06HEX)
EE_PROG Note: Inputs VIN and EN must be present for 200ms.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
22 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
3
3.1.
Application Circuits
Typical Application Circuit
Figure 3.1
Typical Application Circuit for Charging a Lithium-Ion Battery via Photovoltaic Cells
ZSPM4521
Photovoltaic Cells
VIN
VTH_REF
RREF
CIN
VTHERM
GND
CVDD
RSENSE
LOUT
VDD
Battery
SW
COUT
VDD
RPULLUP
(optional)
SCL
VSENSE
SDA
VBAT
RTHM
VDD
EN
NFLT
RPULLUP
(optional)
PGND
3.2.
Selection of External Components
Note that the internal compensation is optimized for a 4.7µF output capacitor (COUT) and a 4.7µH output inductor
(LOUT). Table 1.3 provides recommended ranges for most of the following components.
3.2.1.
COUT Output Capacitor
To keep the output ripple low, a low ESR (less than 35mΩ) ceramic capacitor is recommended for the 4.7µF
output filter capacitor. The ESR should not exceed 100mΩ.
3.2.2.
LOUT Output Inductor
For best performance, an inductor with a saturation current rating higher than the maximum V OUT load requirement
plus the inductor current ripple should be used for the 4.7µH output filter inductor.
3.2.3.
CIN Bypass Capacitor for Input from Photovoltaic Source
For best performance, a low ESR ceramic capacitor should be used for the 10µF input supply bypass capacitor. If
it is not a low ESR ceramic capacitor, a 0.1µF ceramic capacitor should be added in parallel to CIN.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
23 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
3.2.4.
CVDD Bypass Capacitor for VDD Internal Reference Voltage Output
For best performance, a low ESR ceramic capacitor should be used for the100nF bypass capacitor from the VDD
pin to ground.
3.2.5.
RSENSE Output Sensing Resistor
The typical value for the output sensing resistor is 50mΩ.
3.2.6.
Pull-up Resistors
2
For proper function of the I C™ interface, the SDA pin must be connected to a positive supply (e.g., the VDD pin)
through an external pull-up resistor.
For proper function of the fault-warning signal on the NFLT pin, it must be connected to a positive supply (VDD)
through an external pull-up resistor.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
24 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
4
4.1.
Pin Configuration and Package
ZSPM4521 Package Dimensions
Figure 4.1
Data Sheet
October 3, 2014
PQFN-16 Package Dimensions
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
25 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Pin-Out Assignments
11
10
9
VTHERM
12
VTH_REF
ZSPM4521 Pin Assignments
VIN
Figure 4.2
SCL
4.2.
13 SDA
14 SW
15 PGND
VDD 8
ZSPM4521
PQFN16 4X4
Top View
4.3.
SW
VIN
VSENSE
VBAT
16 PGND
1
2
3
4
NFLT
7
EN
6
GND
5
Pin Description for 16-Pin PQFN (4 x 4 mm)
Table 4.1
Pin Description
Pin #
Name
Function
Description
1
SW
Switching Voltage
Node
Connect to LOUT 4.7µH (typical) inductor. Also connect to additional SW
pin 14.
2
VIN
Photovoltaic Input
Voltage
Input voltage from the photovoltaic cell. Also connect to CIN. Also
connect to additional VIN pin 11.
3
VSENSE
Current Sense
Positive Input
Positive input for the MPPT current loop.
4
VBAT
Output Voltage
Regulator feedback input.
5
GND
GND
Primary ground for the majority of the device except the low-side power
FET.
6
EN
Enable Input
When EN is high ( 2.2V), the device is enabled. Ground the pin to
disable the device. Includes internal pull-up.
7
NFLT
Inverted Fault
Open-drain output.
8
VDD
Internal 3.3V
Supply Output
Connect to a 100nF capacitor to GND.
9
VTHERM
Battery
Temperature
Sensor Minus
Node
Negative node for the thermistor, which must be located in close
proximity to the battery.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
26 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Pin #
Name
10
VTH_REF
11
4.4.
Function
Description
Battery
Temperature
Sensor Positive
Node
Positive node for the thermistor, which must be located in close
proximity to the battery.
VIN
Photovoltaic Input
Voltage
Additional VIN pin for input voltage from the photovoltaic cell; connect to
VIN pin 2.
12
SCL
Clock Input
I C™ clock input.
13
SDA
Data Input/Output
I C™ data (open-drain output).
14
SW
Switching Voltage
Node
Additional SW pin; connect to SW pin 1.
15
PGND
Power GND
GND supply for internal low-side FET/integrated diode. Also connect to
additional PGND pin 16.
16
PGND
Power GND
GND supply for internal low-side FET/integrated diode. Also connect to
additional PGND pin 15.
2
2
Package Markings
Figure 4.3
Marking Diagram 16-Pin PQFN (4 x 4 mm)
4521A
XXXXX
oYYWW
Data Sheet
October 3, 2014
XXXXX:
Lot Number (last five digits)
O:
Pin 1 mark
YY:
Year
WW:
Work Week
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
27 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
5
Layout Recommendations
To maximize the efficiency of this package for application on a single layer or multi-layer PCB, certain guidelines
must be followed when laying out this part on the PCB.
5.1.
Multi-Layer PCB Layout
The following are guidelines for mounting the exposed pad ZSPM4521 on a multi-layer PCB with ground a plane.
In a multi-layer board application, the thermal vias are the primary method of heat transfer from the package
thermal pad to the internal ground plane. The efficiency of this method depends on several factors, including die
area, number of thermal vias, and thickness of copper, etc.
Figure 5.1
Package and PCB Land Configuration for Multi-Layer PCB
Solder Pad (Land Pattern)
Package Thermal Pad
Thermal Vias
Package Outline
Figure 5.2
JEDEC Standard FR4 Multi-Layer Board – Cross-Sectional View
(square)
Package Solder
Pad
1.5038 - 1.5748 mm
Component Trace
(2oz Cu)
2 Plane
4 Plane
1.5748mm
Component Traces
Thermal Via
Thermal Isolation
Power plane only
1.0142 - 1.0502 mm
Ground Plane
(1oz Cu)
0.5246 - 0.5606 mm
Power Plane
(1oz Cu)
0.0 - 0.071 mm Board
Base & Bottom Pad
Package Solder
Pad (bottom trace)
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
28 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Figure 5.3 is a representation of how the heat can be conducted away from the die using an exposed pad
package. Each application will have different requirements and limitations, and therefore the user should use
sufficient copper to dissipate the power in the system. The output current rating for the linear regulators might
need to be de-rated for higher ambient temperatures. The de-rated value will depend on calculated worst-case
power dissipation and the thermal management implementation in the application.
Figure 5.3
Conducting Heat Away from the Die using an Exposed Pad Package
Mold compound
Die
Epoxy Die attach
Exposed pad
Solder
5% - 10% Cu coverage
Single Layer, 2oz Cu
Ground Layer, 1oz Cu
Signal Layer, 1oz Cu
Thermal Vias with Cu plating
90% Cu coverage
20% Cu coverage
Bottom Layer, 2oz Cu
Note: NOT to scale.
5.2.
Single-Layer PCB Layout
Layout recommendations for a single-layer PCB: Utilize as much copper area for power management as possible.
In a single-layer board application, the thermal pad is attached to a heat spreader (copper areas) by using a low
thermal impedance attachment method (solder paste or thermal conductive epoxy).
In both of the methods mentioned above, it is advisable to use as much copper trace as possible to dissipate the
heat.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
29 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
Figure 5.4
Application Using a Single-Layer PCB
Use as much copper area
as possible for heat spread
Package Thermal Pad
Package Outline
Important: If the attachment method is NOT implemented correctly, the functionality of the product is NOT
guaranteed. Power dissipation capability will be adversely affected if the device is incorrectly mounted onto the
circuit board.
6
7
Ordering Information
Ordering Code
Description
Package
ZSPM4521AA1W
ZSPM4521 High Efficiency Li-Ion Battery Charger for
Photovoltaic Sources
16-pin PQFN / 7” Reel (1000 parts)
ZSPM4521AA1R
ZSPM4521 High Efficiency Li-Ion Battery Charger for
Photovoltaic Sources
16-pin PQFN / 13” Reel (3300 parts)
ZSPM4521KIT
ZSPM4521 Evaluation Kit
Related Documents
Document
File Name
ZSPM4521 Feature Sheet
ZSPM4521_Feature_Sheet_revX_xy.pdf
ZSPM4521 Evaluation Kit Description
ZSPM4521_Eval_Kit_Description_revX_xy.pdf
ZSPM4521 Application Note – Solar Powered Battery
Management and Charging Solutions
ZSPM4521_App_Note_Solar-Batt-Charging_revX_xy.pdf
Visit ZMDI’s website www.zmdi.com or contact your nearest sales office for the latest version of these documents.
Data Sheet
October 3, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
30 of 31
ZSPM4521
High-Efficiency Charger for Li-Ion Batteries with Photovoltaic Sources
8
Document Revision History
Revision
Date
Description
1.00
February 14, 2013
First release.
1.01
October 3, 2014
Revision of specification for VTH_REF output voltage in Table 1.4.
Updates for contact information and imagery on cover and headers.
Sales and Further Information
www.zmdi.com
[email protected]
Zentrum Mikroelektronik
Dresden AG
Global Headquarters
Grenzstrasse 28
01109 Dresden, Germany
ZMD America, Inc.
1525 McCarthy Blvd., #212
Milpitas, CA 95035-7453
USA
Central Office:
Phone +49.351.8822.306
Fax
+49.351.8822.337
USA Phone 1.855.275.9634
Phone +1.408.883.6310
Fax
+1.408.883.6358
European Technical Support
Phone +49.351.8822.7.772
Fax
+49.351.8822.87.772
DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The
information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer,
licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or
in any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any
customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for
any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty,
tort (including negligence), strict liability, or otherwise.
European Sales (Stuttgart)
Phone +49.711.674517.55
Fax
+49.711.674517.87955
Data Sheet
October 3, 2014
Zentrum Mikroelektronik
Dresden AG, Japan Office
2nd Floor, Shinbashi Tokyu Bldg.
4-21-3, Shinbashi, Minato-ku
Tokyo, 105-0004
Japan
ZMD FAR EAST, Ltd.
3F, No. 51, Sec. 2,
Keelung Road
11052 Taipei
Taiwan
Phone +81.3.6895.7410
Fax
+81.3.6895.7301
Phone +886.2.2377.8189
Fax
+886.2.2377.8199
Zentrum Mikroelektronik
Dresden AG, Korea Office
U-space 1 Building
11th Floor, Unit JA-1102
670 Sampyeong-dong
Bundang-gu, Seongnam-si
Gyeonggi-do, 463-400
Korea
Phone +82.31.950.7679
Fax
+82.504.841.3026
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
31 of 31