Product Folder Sample & Buy Support & Community Tools & Software Technical Documents SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 SN754410 Quadruple Half-H Driver 1 Features 3 Description • • The SN754410 is a quadruple high-current half-H driver designed to provide bidirectional drive currents up to 1 A at voltages from 4.5 V to 36 V. The device is designed to drive inductive loads such as relays, solenoids, DC and bipolar stepping motors, as well as other high-current/high-voltage loads in positivesupply applications. 1 • • • • • • • • • • • • 1-A Output-Current Capability Per Driver Applications Include Half-H and Full-H Solenoid Drivers and Motor Drivers Designed for Positive-Supply Applications Wide Supply-Voltage Range of 4.5 V to 36 V TTL- and CMOS-Compatible High-Impedance Diode-Clamped Inputs Separate Input-Logic Supply Thermal Shutdown Internal ESD Protection Input Hysteresis Improves Noise Immunity 3-State Outputs Minimized Power Dissipation Sink/Source Interlock Circuitry Prevents Simultaneous Conduction No Output Glitch During Power Up or Power Down Improved Functional Replacement for the SGS L293 2 Applications • • • Stepper Motor Drivers DC Motor Drivers Latching Relay Drivers All inputs are compatible with TTL-and low-level CMOS logic. Each output (Y) is a complete totempole driver with a Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high, the associated drivers are enabled and their outputs become active and in phase with their inputs. When the enable input is low, those drivers are disabled and their outputs are off and in a highimpedance state. With the proper data inputs, each pair of drivers form a full-H (or bridge) reversible drive suitable for solenoid or motor applications. A separate supply voltage (VCC1) is provided for the logic input circuits to minimize device power dissipation. Supply voltage VCC2 is used for the output circuits. The SN754410 is designed for operation from −40°C to 85°C. Device Information(1) PART NUMBER SN754410 PACKAGE (PIN) PDIP (16) BODY SIZE (NOM) 19.80 mm × 6.35 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. 4 Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 9 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 4 4 4 5 5 6 Absolute Maximum Ratings ...................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Switching Characteristics .......................................... Typical Characteristics .............................................. Parameter Measurement Information .................. 7 Detailed Description .............................................. 8 9.1 Overview ................................................................... 8 9.2 Functional Block Diagram ......................................... 8 9.3 Feature Description................................................... 8 9.4 Device Functional Modes.......................................... 9 10 Application and Implementation........................ 10 10.1 Application Information.......................................... 10 10.2 Typical Application ............................................... 10 11 Power Supply Recommendations ..................... 11 12 Layout................................................................... 12 12.1 Layout Guidelines ................................................. 12 12.2 Layout Example .................................................... 12 13 Device and Documentation Support ................. 12 13.1 Trademarks ........................................................... 12 13.2 Electrostatic Discharge Caution ............................ 12 13.3 Glossary ................................................................ 12 14 Mechanical, Packaging, and Orderable Information ........................................................... 12 5 Revision History Changes from Revision B (November 1995) to Revision C Page • Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 2 Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 SN754410 www.ti.com SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 6 Pin Configuration and Functions Pin Functions PIN NAME NO. 1,2EN 1 <1:4>A <1:4>Y GROUND TYPE DESCRIPTION I Enable driver channels 1 and 2 (active high input) 2, 7, 10, 15 I Driver inputs, non-inverting 3, 6, 11, 14 O Driver outputs 4, 5, 12, 13 — Device ground and heat sink pin. Connect to circuit board ground plane with multiple solid vias VCC2 8 — Power VCC for drivers 4.5V to 36V 3,4EN 9 I VCC1 16 — Enable driver channels 3 and 4 (active high input) 5V supply for internal logic translation Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 3 SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX VCC1 Output supply voltage range –0.5 36 V VCC2 Output supply voltage range –0.5 36 V VI Input voltage –0.5 36 V VO Output voltage range –3 VCC2 + 3 V IP Peak output current ±2 A IO Continuous output current ±1 A PD Continuous total power dissipation at (or below) 25°C free-air temperature (3) TA Operating free-air temperature range –40 85 °C TJ Operating virtual junction temperature range –40 150 °C Tstg Storage temperature range 260 °C (1) (2) (3) UNIT 2075 mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network GND. For operation above 25°C free-air temperature, derate linearly at the rate of 16.6 mW/°C. To avoid exceeding the design maximum virtual junction temperature, these ratings should not be exceeded. Due to variations in individual device electrical characteristics and thermal resistance, the built-in thermal overload protection can be activated at power levels slightly above or below the rated dissipation. 7.2 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX VCC1 Logic supply voltage 4.5 5.5 V VCC2 Output supply voltage 4.5 36 V VIH High-level input voltage 2 5.5 V VIL Low-level input voltage –0.3 (1) 0.8 V TJ Operating virtual junction temperature –40 125 °C TA Operating free-air temperature –40 85 °C (1) UNIT The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet for logic voltage levels. 7.3 Thermal Information SN754410 THERMAL METRIC (1) NE UNIT 16 PINS RθJA (1) 4 Junction-to-ambient thermal resistance 60 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 SN754410 www.ti.com SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 7.4 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER VIK Input clamp voltage TEST CONDITIONS High-level output voltage TYP MAX UNIT –0.9 –1.5 V VCC2 – 1.5 VCC2 – 1.1 II = –12 mA IOH = –0.5 A VOH MIN IOH = –1 A VCC2 – 2 IOH = –1 A, TJ = 25°C VCC2 – 1.8 V VCC2 – 1.4 IOL = 0.5 A VOL Low-level output voltage 1 1.4 1.2 1.8 IOK = –0.5 A VCC2 + 1.4 VCC2 + 2 IOK = 1 A VCC2 + 1.9 VCC2 + 2.5 IOL = 1 A 2 IOL = 1 A, TJ = 25°C VOKH High-level output clamp voltage VOKL Low-level output clamp voltage IOZ(off) Off-state high-impedance-state output current VO = VCC2 IIH High-level input current VI = 5.5 V IIL Low-level input current VI = 0 ICC1 ICC2 Output supply current Output supply current IOK = 0.5 A –1.1 –2 IOK = –1 A –1.3 –2.5 IO = 0 V V 500 VO = 0 IO = 0 V µA –500 10 µA –10 µA All outputs at high level 38 All outputs at low level 70 all outputs at high impedance 25 All outputs at high level 33 All outputs at low level 20 All outputs at high impedance mA nA 5 7.5 Switching Characteristics over operating free-air temperature range (unless otherwise noted), VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C PARAMETER td1 Delay time, high-to-low-level output from A input td2 Delay time, low-to-high-level output from A input TEST CONDITIONS MIN TYP MAX UNIT 400 ns 800 ns 300 ns See Figure 3 tTLH Transition time, low-to-high-level output tTHL Transition time, high-to-low-level output 300 ns ten1 Enable time to the high level 700 ns ten2 Enable time to the low level 400 ns tdis1 Disable time from the high level 900 ns tdis2 Disable time from the low level 600 ns See Figure 4 Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 5 SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 www.ti.com 7.6 Typical Characteristics VCC1 = 5 V, VCC2 = 24 V 24.0 2.0 -40C 23.8 25C 23.4 25C 1.6 125C Output Voltage (V) Output Voltage (V) 23.6 -40C 1.8 23.2 23.0 22.8 22.6 1.2 1.0 0.8 0.6 22.4 0.4 22.2 0.2 22.0 125C 1.4 0.0 0.0 0.2 0.4 0.6 Output Current (A) 0.8 1.0 0.0 C001 Figure 1. VOH vs IOH 6 0.2 0.4 0.6 Output Current (A) 0.8 1.0 C001 Figure 2. VOL vs IOL Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 SN754410 www.ti.com SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 8 Parameter Measurement Information A. The pulse generator has the following characteristics: tr ≤10 ns, tf ≤10 ns, tw = 10 µs, PRR = 5 kHz, ZO = 50 Ω B. CL includes probe and jig capacitance. Figure 3. Test Circuit and Switching Times from Data Inputs A. The pulse generator has the following characteristics: tr ≤10 ns, tf ≤10 ns, tw = 10 µs, PRR = 5 kHz, ZO = 50 Ω B. CL includes probe and jig capacitance. Figure 4. Test Circuit and Switching Times from Enable Inputs Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 7 SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 www.ti.com 9 Detailed Description 9.1 Overview The SN754410 is a quadruple high-current half-H driver designed to provide bidirectional drive currents up to 1 A at voltages from 4.5 V to 36 V. The device is designed to drive inductive loads such as relays, solenoids, DC and bipolar stepping motors, as well as other high-current/high-voltage loads in positive-supply applications. All inputs are compatible with TTL and low-level CMOS logic. Each output (Y) is a complete totem-pole driver with a Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high, the associated drivers are enabled and their outputs become active and in phase with their inputs. When the enable input is low, those drivers are disabled and their outputs are off and in a high-impedance state. With the proper data inputs, each pair of drivers form a full-H (or bridge) reversible drive suitable for solenoid or motor applications. A separate supply voltage (VCC1) is provided for the logic input circuits to minimize device power dissipation. Supply voltage VCC2 is used for the output circuits. The SN754410 is designed for operation from −40°C to 85°C. 9.2 Functional Block Diagram This symbol is in accordance with ANSI/IEEE Std 91-1984and IEC Publication 617-12. 9.3 Feature Description 9.3.1 High Current, High Voltage Outputs Four high current and high voltage outputs feature clamp diodes for inductive load driving. Figure 5. Typical of All Outputs 8 Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 SN754410 www.ti.com SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 Feature Description (continued) 9.3.2 TTL Compatible Inputs Data inputs and enable inputs are compatible with TTL. 3.3-V CMOS logic is also acceptable, however open or high impedance input voltage can approach VCC1 voltage. Figure 6. Equivalent of Each Input 9.4 Device Functional Modes Table 1. Function Table (1) INPUTS (2) (1) (2) A EN OUTPUTS Y H H H L H L X L Z H = high-level L = low-level X = irrelevant Z = high-impedance (off) In the thermal shutdown mode, the output is in a high-impedance state regardless of the input levels. Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 9 SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information Provide a 5-V supply to VCC1 and valid logic input levels to data and enable inputs. VCC2 must be connected to a power supply capable of suppling the needed current and voltage demand for the loads connected to the outputs. 10.2 Typical Application 12 V Figure 7. Typical Application Schematic 10.2.1 Design Requirements The design techniques in the following sections may be used for applications which fall within the following requirements. • 4.5-V minimum and 36-V maximum VCC2 voltage • 1000-mA or less output current per channel • 5-V supply with 10% tolerance or less • TTL compatible logic inputs 10 Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 SN754410 www.ti.com SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 Typical Application (continued) 10.2.2 Application Curves Driver output voltage waveform with a two phase stepper motor; 12-V 20-Ω coils. 14 12 Voltage (V) 10 8 6 4 2 0 ±2 Output ±4 0 1 2 3 4 5 6 7 8 9 Time (ms) 10 C001 Figure 8. 100 Hz Driver Output Waveform 11 Power Supply Recommendations VCC1 is 5 V ± 0.5 V and VCC2 can be same supply as VCC1 or a higher voltage supply with peak voltage up to 36 V. Bypass capacitors of 0.1 uF or greater should be used at VCC1 and VCC2 pins. There are no power up or power down supply sequence order requirements. Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 11 SN754410 SLRS007C – NOVEMBER 1986 – REVISED JANUARY 2015 www.ti.com 12 Layout 12.1 Layout Guidelines Place device near the load to keep output traces short to reduce EMI. Use solid vias to transfer heat from ground pins to circuit board's ground plane. 12.2 Layout Example GND 0.1 μF 5V TTL Logic 1 1,2EN TTL Logic 2 1A 4A 15 TTL Logic 1 Ampere 3 1Y 4Y 14 1 Ampere GND VIAS VCC1 16 4 13 5 12 1 Ampere 6 2Y 3Y 11 1 Ampere TTL Logic 7 2A 3A 10 TTL Logic 5V to 36V 8 VCC2 3,4EN 9 TTL Logic 1 μF GND Figure 9. Layout Diagram 13 Device and Documentation Support 13.1 Trademarks All trademarks are the property of their respective owners. 13.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 1986–2015, Texas Instruments Incorporated Product Folder Links: SN754410 PACKAGE OPTION ADDENDUM www.ti.com 24-Oct-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN754410NE ACTIVE PDIP NE 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN754410NE SN754410NEE4 ACTIVE PDIP NE 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN754410NE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Oct-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MPDI003 – OCTOBER 1994 NE (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 20 PIN SHOWN 0.070 (1,78) MAX 11 20 PINS ** DIM A C 1 20 0.914 (23,22) MIN MAX B 16 0.780 (19,80) 0.975 (24,77) MIN 0.930 (23,62) MAX 1.000 (25,40) 10 C MIN 0.240 (6,10) 0.260 (6,61) MAX 0.260 (6,60) 0.280 (7,11) 0.020 (0,51) MIN A 0.200 (5,08) MAX Seating Plane 0.155 (3,94) 0.125 (3,17) 0.100 (2,54) 0.021 (0,533) 0.015 (0,381) 0.010 (0,25) M 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN B 0.200 (5,08) MAX Seating Plane 0.155 (3,94) 0.125 (3,17) 0.100 (2,54) 0.021 (0,533) 0.015 (0,381) 0.010 (0,25) M 0°– 15° 0.010 (0,25) NOM 4040054 / B 04/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. 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