AS3644 Data Sheet

austriamicrosystems AG
is now
ams AG
The technical content of this austriamicrosystems datasheet is still valid.
Contact information:
Headquarters:
ams AG
Tobelbaderstrasse 30
8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
e-Mail: ams_sales@ams.com
Please visit our website at www.ams.com
Datasheet
AS3644
Ultra Small Low Cost 320mA Inductive White LED Flash Driver
1 General Description
2 Key Features
Total
The AS3644 is an inductive high efficient DCDC step up
converter driving a current source. The DCDC step up
converter operates at a fixed frequency of 4MHz and
includes soft startup to allow easy integration into noise
sensitive RF systems. The current source operates in
flash/torch/assist (video/autofocus) mode.
efficiency 4MHz fixed frequency DCDC Boost
converter with soft start allows small coils
currents
260mA to 320mA flash current (20mA steps)
51.6mA or 72.3mA Assist light (=torch) current
lv
LED
Flash
LED(s) cathode connected to ground:
Improved thermal performance (ground = heat sink)
Simplified PCB layout
The AS3644 is able to detect a broken coil. Together
with the LED short and open detection the AS3644 can
be used to verify the connection to its external components and allowing in-circuit test. This reduces test time
and simplifies production test procedures.
Flash Timer
30ms to 480ms in 30ms steps
am
lc s
on A
te G
nt
st
il
Adjustable
Flash,
Torch, Assist and Indicator Mode
Protection
functions:
Automatic Flash timer to protect the LED
Overvoltage and undervoltage Protection
Overtemperature Protection
LED short circuit protection
2
The AS3644 is controlled by an I C interface to allow
sophisticated control of all settings like currents and timings.
The complete flash driver solution measures only
2
al
id
High
The AS3644 includes flash timer, overvoltage, overtemperature, undervoltage and LED short circuit protection
functions.
11mm PCB area.
2
flash driver solution only 11mm
Available
in tiny WL-CSP Packages
2x3 balls 0.5mm pitch, 1.5x1.1x0.6mm package size
The AS3644 is available in a space-saving WL-CSP
package measuring only 1.5x1.1x0.6mm and operates
over the -30ºC to +85ºC temperature range.
3 Applications
Flash/Torch for mobile phones, digital cameras and PDA
Figure 1. Typical Operating Circuit
&
"#$* )')*
AS3644
www.austriamicrosystems.com/AS3644
(ptr)
/1
+,-
Te
ch
.,
%%,/,/0
ni
&
'$( )')"
ca
!
"#$"#%%
AS3644
"
1.2.2
1 - 23
AS3644
Datasheet - P i n o u t
4 Pinout
Pin Assignment
!"
am
lc s
on A
te G
nt
st
il
lv
al
id
Figure 2. Pin Assignments (Top View)
AS3644
AS3644
Pin Description
Table 1. Pin Description for AS3644
Pin Number
Pin Name
A1
SW
DCDC converter switching node - make a short connection to the coil LDCDC
GND
Power and signal ground - connect to GND and make a short connection to
CVOUT
A2
B1
LED_OUT
B2
VOUT
C1
Flash LED current source output
DCDC converter output capacitor and supply for AS3644 - make a short
connection to CVOUT
2
SCL
serial clock input in I C interface
SDA
serial data input/output for I C interface (needs external pullup resistor)
2
Te
ch
ni
ca
C2
Description
www.austriamicrosystems.com/AS3644
1.2.2
2 - 23
AS3644
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Table 3, “Electrical
Characteristics,” on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 2. Absolute Maximum Ratings
Min
Max
Units
VOUT, SW to GND
-0.3
+7.0
V
SCL, SDA, LED_OUT to GND
-0.3
VOUT+
0.3
V
max. +7V
VOUT to SW
-0.3
V
Note: Diode between VOUT and SW
Input Pin Current without causing latchup
-100
+100
+IIN
mA
Norm: EIA/JESD78
Continuous power dissipation
530
mW
PT at 70ºC ambient
Continuous power dissipation derating factor
7.2
mW/ºC
PDERATE
±2000
V
Norm: JEDEC JESD22-A114F
lv
1
am
lc s
on A
te G
nt
st
il
Continuous Power Dissipation (TA = +70ºC)
Comments
al
id
Parameter
2
Electrostatic Discharge
ESD HBM
ESD CDM
±500
V
Norm: JEDEC JESD 22-C101C
ESD MM
±100
V
Norm: JEDEC JESD 22-A115-A level A
+150
ºC
Internally limited (overtemperature
protection) max. 20000s
Temperature Ranges and Storage Conditions
Junction Temperature
Storage Temperature Range
-55
+125
ºC
Humidity
5
85
%
Non condensing
+260
ºC
according to IPC/JEDEC J-STD-020
Body Temperature during Soldering
Te
ch
ni
ca
1. Depending on actual PCB layout and PCB used; for peak power dissipation during flashing see document
'AS3644 Thermal Measurements'
2. PDERATE derating factor changes the total continuous power dissipation (PT) if the ambient temperature is not
70ºC. Therefore for e.g. TAMB=85ºC calculate PT at 85ºC = PT - PDERATE * (85ºC - 70ºC)
www.austriamicrosystems.com/AS3644
1.2.2
3 - 23
AS3644
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VVIN = +2.7V to +5.5V, TAMB = -30ºC to +85ºC, unless otherwise specified. Typical values are at VVIN = +3.7V, TAMB =
+25ºC, unless otherwise specified.
Table 3. Electrical Characteristics
Symbol
Parameter
Condition
Min
Typ
2.7
3.7
Max
Unit
Supply Voltage
VVINREDUCE
Supply Voltage
AS3644 functionally working, but not all
1
parameters fulfilled
ISHUTDOWN
Shutdown Current
SCL=L, SDA=L, VVIN<3.7V,
0ºC < TAMB < 50ºC
ISTANBY
Standby Current
interface active, VVIN<3.7V
TAMB
Operating
Temperature
D_FUNC
2.5
0.5
-30
VVOUT
DCDC Boost output
Voltage (pin VOUT)
Eta
Efficiency
ILED_OUT
LED_OUT current
source output
ILED_OUT
LED_OUT current
source accuracy
ILED_OUT
LED_OUT ramp time
at ILED_OUT=300mA
RAMP
For high supply voltages the output voltage can
reach up to VVOUTMAX (the AS3644 always
runs in PWM mode unless VVOUT>VVOUTMAX
or during startup)
5.0
V
1.0
µA
0.5
5
µA
25
85
ºC
2.8
ILED_OUT=300mA,VVOUT=4.2V
Operating Frequency
Current Source
V
am
lc s
on A
te G
nt
st
il
DCDC Step Up Converter
fCLK
4.5
lv
VVIN
al
id
General Operating Conditions
4.7
82
All internal timings are derived from this
oscillator
-7.5%
4.0
+7.5%
DCDC operating frequency for short pulses
(close to 100% operating mode)
-7.5%
1.0
+7.5%
V
%
MHz
51.6
320
mA
ILED_OUT=300mA or 72.3mA
-7
+7
%
Ramp-up During startup
0.6
1.0
ms
Ramp-down after AS3644 is disabled by
interface
0.2
0.7
ms
LED_OUT current
ripple
ILED_OUT = 300mA
10
VILED_COMP
LED_OUT current
source voltage
compliance
Minimum voltage between pin VOUT and
LED_OUT for operation of the current source
210
350
mV
ca
ILED_OUT
ni
RIPPLE
mAPP
Protection and Fault Detection Functions (see page 9)
VVOUT overvoltage
protection
DCDC Converter Overvoltage Protection
5.0
5.25
5.5
V
Current Limit for coil
LDCDC (Pin SW)
measured at 50%
2
PWM duty cycle
maximum 40000s lifetime operation in
overcurrent limit
0.7
0.8
0.9
A
Flash LED short
circuit detection
voltage
Voltage measured on pin LED_OUT
1.45
1.65
V
ch
VVOUTMAX
Te
ILIMIT
VLEDSHORT
www.austriamicrosystems.com/AS3644
1.2.2
4 - 23
AS3644
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 3. Electrical Characteristics (Continued)
Parameter
TOVTEMP
Overtemperature
Protection
TOVTEMPHY
Condition
ST
Overtemperature
Hysteresis
tFLASHTIMER
Flash Timer
VUVLO
Undervoltage
3
Lockout
Min
Typ
Can be adjusted by register flash_timer (see
page 16)
-7.5%
Falling VVIN
2.3
Rising VVIN
144
ºC
5
ºC
30 to +7.5%
480
2.4
VOL
Low Level Output
Voltage
2
2.5
V
VUVLO VUVLO VUVLO
+0.05 +0.1 +0.15
V
1.26
VVIN0.2
V
0.0
0.54
V
4
Pins SCL, SDA
am
lc s
on A
te G
nt
st
il
Low Level Input
Voltage
ms
lv
High Level Input
Voltage
VIL
Unit
Junction temperature
Digital Interface
VIH
Max
al
id
Symbol
Pin SDA with pullup >1k to digital supply <2V,
VVIN>2.7V
0.3
V
I C interface timings - see Figure 3 on page 6
Minimum time from SDA or SCL going high to
2
first I C start command
tWAKEUP
Wakeup Time
tTIMEOUT
I C timeout time
fSCLK
SCL Clock Frequency
2
500
In flash, assist light and indicator mode if SCL
and SDA are L for tTIMEOUT, the AS3644 enters
automatically shutdown mode
35
1/
tTIMEO
400
µs
ms
kHz
UT
Bus Free Time
Between a STOP and
START Condition
1.3
µs
tHD:STA
Hold Time (Repeated)
5
START Condition
0.6
µs
tLOW
LOW Period of SCL
Clock
1.3
µs
tHIGH
HIGH Period of SCL
Clock
0.6
µs
tSU:STA
Setup Time for a
Repeated START
Condition
0.6
µs
ni
6
0
Data Hold Time
ch
tHD:DAT
ca
tBUF
7
0.9
µs
Data Setup Time
100
tR
Rise Time of Both
SDA and SCL Signals
20 +
0.1CB
300
ns
tF
Fall Time of Both SDA
and SCL Signals
20 +
0.1CB
300
ns
tSU:STO
Setup Time for STOP
Condition
0.6
CB
Capacitive Load for
Each Bus Line
Te
tSU:DAT
CB — total capacitance of one bus line in pF
www.austriamicrosystems.com/AS3644
1.2.2
ns
µs
400
pF
5 - 23
AS3644
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 3. Electrical Characteristics (Continued)
Symbol
Parameter
CI/O
I/O Capacitance
(SDA, SCL)
Condition
Min
Typ
Max
Unit
10
pF
am
lc s
on A
te G
nt
st
il
lv
al
id
1. Limited to max. 5V due to overvoltage protection circuit on pin VOUT
2. Due to slope compensation of the current limit, ILIMIT changes with duty cycle - see Figure 16 on page 9.
3. Due to the architecture (the supply of the AS3644 is connected to the output VOUT), the undervoltage lockout
is only detected when the DCDC converter is not switching
4. The logic input levels VIH and VIL allow for 1.8V supplied driving circuit (70%/30% of 1.8V)
5. After this period, the first clock pulse is generated.
6. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the
SCL signal) to bridge the undefined region of the falling edge of SCL.
7. A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT = to 250ns must then
be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a
device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tR max +
tSU:DAT = 1000 + 250 = 1250ns before the SCL line is released.
Timing Diagrams
2
Figure 3. I C interface Timing Diagram
SDA
tBUF
tLOW
tR
ca
SCL
tHD:STA
tF
tHD:STA
ni
tHD:DAT
tHIGH
tSU:STA
tSU:STO
tSU:DAT
REPEATED
START
Te
ch
STOP START
www.austriamicrosystems.com/AS3644
1.2.2
6 - 23
AS3644
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
VVIN = 3.7V, TA = +25ºC (unless otherwise specified)
Figure 4. DCDC Efficiency vs. VVIN
85
85
80
75
70
65
IOUT = 50mA
60
IOUT = 120mA
IOUT = 220mA
75
70
65
60
IOUT = 50mA
IOUT = 120mA
55
IOUT = 220mA
am
lc s
on A
te G
nt
st
il
55
80
lv
90
Efficiency PLED/PVIN (%)
95
IOUT = 320mA
IOUT = 320mA
50
3,5
3,9
2,7
4,3
Input Voltage (V)
1V/Div
VVIN,VLED_OUT,VOUT
IVIN
ca
100mA/Div
VVIN,VLED_OUT,VOUT
ILED_OUT
4,3
250µs/Div
1V/Div
20mA/Div
ILED_OUT
ch
ILED_OUT
VLED_OUT
Figure 9. VOUT / ILED_OUT ripple, ILED_OUT = 300mA
ni
Figure 8. ILED Startup (ILED_OUT=51.6mA)
VVIN,VLED_OUT,VOUT
3,9
Figure 7. IVIN Startup (ILED_OUT=300mA)
250µs/Div
Te
3,5
Input Voltage (V)
Figure 6. ILED Startup (ILED_OUT=300mA)
50µs/Div
www.austriamicrosystems.com/AS3644
3,1
1V/Div
3,1
100mA/Div
2,7
50mV/Div
50
20mA/Div
DCDC Efficiency (%)
90
al
id
Figure 5. Application Efficiency (PLED/PVIN) vs. VVIN
100
100ns/Div
1.2.2
7 - 23
AS3644
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 10. ILED Rampdown (ILED_OUT=300mA)
Figure 11. ILED_OUT Linearity of current sink
350
250
200
al
id
ILED_OUT (mA)
IOUT = 50mA
IOUT = 120mA
IOUT = 220mA
IOUT = 320mA
150
100
50
0
0
250µs/Div
0,8
1,2
1,6
2
2,4
am
lc s
on A
te G
nt
st
il
VOUT-LED_OUT (V)
Figure 12. ILED_OUT vs. TAMB
321
0,4
lv
ILED_OUT
100mA/Div
1V/Div
VVIN,VLED_OUT,VOUT
300
Figure 13. Oscillator frequency fCLK vs. TAMB
4,00
Frequency (MHz)
ILED_OUT (mA)
3,98
320
319
3,96
3,94
3,92
10
30
50
3,90
-30
70
10
30
50
70
VLED_OUT, VOUT
Figure 15. DCDC fCLK change 4MHz->1MHz(51mA)
ISW
ISW
100mA/Div
1V/Div
ni
Te
ch
VLED_OUT, VOUT
Figure 14. DCDC fCLK change 4MHz->1MHz(300mA)
5µs/Div
www.austriamicrosystems.com/AS3644
-10
Ambient Temperature (C)
ca
Ambient Temperature (C)
1V/Div
-10
50mA/Div
318
-30
5µs/Div
1.2.2
8 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS3644 is a high performance DCDC step up converter with internal PMOS and NMOS switches. The switching
frequency of 4MHz allows the use of tiny coils. Its output is connected to a flash LED by an internal current source.
2
The AS3644 is controlled by an I C interface. All timings and currents can be accurately adjusted by this interface. It
support following operating modes:
al
id
1. Flash mode (enabled by mode=11):
The LED current (260mA...320mA) is defined by register flash_current. A timer defines the output flash duration (30ms...480ms in 30ms steps defined by register flash_timer). The flash is started immediately after the
2
Internal Circuit
am
lc s
on A
te G
nt
st
il
lv
end of the I C command.
If SCL and SDA are L for more than tTIMEOUT, shutdown mode is automatically entered.
2. Assist light mode (=video or torch light mode) (enabled by mode=10):
The LED current (51.6mA or 72.3mA) is defined by register assist_current. The current is enabled until another
mode is chosen by the interface.
If SCL and SDA are L for more than tTIMEOUT, shutdown mode is automatically entered.
3. Shutdown mode (mode=00), SCL=0V, SDA=0V:
The DCDC and the current source is disabled and the AS3644 is configured to draw minimum current.
The AS3644 includes a fixed frequency DCDC step-up with accurate startup control. Together with the output current
source (on LED_OUT) it includes protection and safety functions as shown in the following internal blockdiagram:
Figure 16. AS3644 internal circuit
+
!"#$5$8'
2
/#
7
7
4!&)5/'
!"#$%$&%'
2
8*5/
&)5/
,-+.,
+/#+
++
0
+
.
#6/
#6/+/#
ca
&55/
+
3
+.
+/#
ni
;+2
+
7
:
:0
+60
(
++
!"#$)$*%'
2
*(-
9
3
/#.
ch
Te
AS3644
The DCDC converter always operates in PWM mode (exception: PFM mode is allowed during startup) to reduce EMI
in EMI sensitive systems. For flash and assist light mode and high duty cycles close to 100% on-time (maximum duty
cycle) of the PMOS, the DCDC converter can switch into a 1MHz operating mode and maximum duty cycle to improve
efficiency for this load condition. The DCDC converter returns back to its normal 4MHz operating frequency when load
or supply conditions change. Due to this switching between two fixed frequencies the noise spectrum of the system is
exactly defined and predictable. If improved efficiency is required, the fixed switching between 1MHz / 4MHz can be
disabled by freq_switch_on (see page 15)=0. In this case pulseskip will be used.
The internal circuit for switching between these two frequencies is shown in Figure 17:
www.austriamicrosystems.com/AS3644
1.2.2
9 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 17. Internal circuit of 4MHz/1Mhz selection
AS3644
3
$
,- #%&!''
()!*+
./. 012-#$.,"
lv
$
"!
#$#
!
al
id
am
lc s
on A
te G
nt
st
il
External Strobe Input
To start the flash operation by an hardware input using an external strobe input, use schematic shown in Figure 18:
Figure 18. External strobe input
AS3644
&
"
!
" #$$%
'#(
ni
ca
ch
To enable this function, program the flash timer with the exact flash duration (by programming flash_timer) and set
external_strobe=1. The AS3644 waits for an external strobe signal on pin LED_OUT and starts the flash pulse with a
duration defined by flash_timer.
Protection and Fault Detection Functions
The protection functions protect the AS3644 and the LED(s) against physical damage. In most cases a register bit is
1
Te
set, which can be readout with the interface. The fault bits are cleared by a readout of the fault register.
1. Except overtemperature protection bit fault_overtemp: This bit can be cleared once the temperature drops
below TOVTEMP-TOVTEMPHYST.
www.austriamicrosystems.com/AS3644
1.2.2
10 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
DCDC Overvoltage Protection
In case of no or a broken LED at the pin LED_OUT and an enabled DCDC converter, the voltage on VOUT rises until
it reaches VVOUTMAX (overvoltage condition) and the voltage across the current source does not reach regulation
(VOUT-VLED < VILED_COMP). If this condition is detected, the DCDC converter is stopped, the current sources are disabled and the bit fault_ovp (see page 17) is set.
DCDC Broken Coil Detection
2
al
id
If the coil LDCDC is broken, the AS3644 is not powered by the pin SW connected to VOUT by the internal switch. Due
to the protection diodes between SCL to VOUT and SDA to VOUT, the AS3644 can be powered through these diodes.
The AS3644 detects this error condition by comparing the voltage on SCL and VOUT. If the voltage on VOUT is lower
compared to the voltage on SCL, the AS3644 will ignore any I C write commands. Therefore the application can simply
detect this condition.
lv
Note: Due to the broken coil detection, the high levels of SDA and SCL should be always below the supply voltage.
LED Short Circuit Protection
am
lc s
on A
te G
nt
st
il
After the startup of the DCDC converter, the voltage on LED_OUT is continuously monitored and compared against
VLEDSHORT. If the voltage stays below VLEDSHORT, the DCDC is stopped (as a shorted LED is assumed), the current
sources are disabled and the bit fault_led_short (see page 17) is set.
Overtemperature Protection
The junction temperature of the AS3644 is continuously monitored. If the temperature exceeds TOVTEMP, the DCDC is
stopped, the current sources are disabled and the bit fault_overtemp (see page 17) is set. The driver cannot be reenabled unless the junction temperature drops below TOVTEMP-TOVTEMPHYST.
Flash Timer
The duration of the flash is defined by the register flash_timer (see page 16). After the timer expires, the DCDC is
stopped and the flash current source (on pin LED_OUT) is disabled.
Supply undervoltage Protection
If the voltage on the pin VOUT (=battery voltage) is or falls below VUVLO, the AS3644 is kept in shutdown state and in
all registers are set to their default state.
Note: During operation of the DCDC converter, the supply undervoltage protection will still monitor the DCDC output
voltage only. Therefore the supply undervoltage protection will only monitor the battery voltage if the DCDC
converter is switched off and the output capacitor is discharged down to the supply voltage.
Wakeup Circuit - Power off detection
ca
In flash, assist light and indicator mode, if SCL and SDA are L for more than tTIMEOUT, shutdown mode is automatically
entered. This feature automatically detects a power-off of the controlling circuit driving SCL and SDA.
ni
I2C Serial Data Bus
2
ch
The AS3644 supports the I C bus protocol. A device that sends data onto the bus is defined as a transmitter and a
device receiving data as a receiver. The device that controls the message is called a master. The devices that are
controlled by the master are referred to as slaves. A master device that generates the serial clock (SCL), controls the
bus access, and generates the START and STOP conditions must control the bus. The AS3644 operates as a slave on
2
Te
the I C bus. Within the bus specifications a standard mode (100kHz maximum clock rate) and a fast mode (400kHz
maximum clock rate) are defined. The AS3644 works in both modes. Connections to the bus are made through the
open-drain I/O lines SDA and SCL.
The following bus protocol has been defined (Figure 19):
Data
transfer may be initiated only when the bus is not busy.
During
data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line
while the clock line is HIGH are interpreted as control signals.
Accordingly, the following bus conditions have been defined:
www.austriamicrosystems.com/AS3644
1.2.2
11 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
Bus Not Busy
Both data and clock lines remain HIGH.
Start Data Transfer
A change in the state of the data line, from HIGH to LOW, while the clock is HIGH, defines a START condition.
Stop Data Transfer
al
id
A change in the state of the data line, from LOW to HIGH, while the clock line is HIGH, defines the STOP condition.
Data Valid
The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of
the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal.
There is one clock pulse per bit of data.
am
lc s
on A
te G
nt
st
il
Acknowledge
lv
Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data bytes
transferred between START and STOP conditions are not limited, and are determined by the master device. The
information is transferred byte-wise and each receiver acknowledges with a ninth bit.
Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The
master device must generate an extra clock pulse that is associated with this acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way that the
SDA line is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of course, setup and hold
times must be taken into account. A master must signal an end of data to the slave by not generating an acknowledge
bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH to
enable the master to generate the STOP condition.
2
Figure 19. Data Transfer on I C Serial Bus
SDA
MSB
SLAVE
ADDRESS
ca
R/W
DIRECTION
BIT
SCL
2
6
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
7
8
9
1
ni
1
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
2
3-8
8
9
ACK
START
CONDITION
ch
REPEATED IF
MORE BYTES ARE
TRANSFERRED
STOP CONDITION
OR REPEATED
START CONDITION
Te
Depending upon the state of the R/W bit, two types of data transfer are possible:
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the
slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received
byte. Data is transferred with the most significant bit (MSB) first.
2. Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave
address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data
bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the
last received byte, a “not acknowledge” is returned. The master device generates all of the serial clock pulses
www.austriamicrosystems.com/AS3644
1.2.2
12 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START
condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not
released. Data is transferred with the most significant bit (MSB) first.
The AS3644 can operate in the following two modes:
al
id
1. Slave Receiver Mode (Write Mode): Serial data and clock are received through SDA and SCL. After each
byte is received an acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial transfer. Address recognition is performed by hardware after reception of the slave
address and direction bit (see Figure 20). The slave address byte is the first byte received after the master
generates the START condition. The slave address byte contains the 7-bit AS3644 address, which is 0110000,
2
am
lc s
on A
te G
nt
st
il
lv
followed by the direction bit (R/W), which, for a write, is 0. After receiving and decoding the slave address
byte the device outputs an acknowledge on the SDA line. After the AS3644 acknowledges the slave address +
write bit, the master transmits a register address to the AS3644. This sets the register pointer on the AS3644.
The master may then transmit zero or more bytes of data, with the AS3644 acknowledging each byte received.
The address pointer will increment after each data byte is transferred. The master generates a STOP condition
to terminate the data write.
2. Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode.
However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the AS3644 while the serial clock is input on SCL. START and STOP conditions are recognized
as the beginning and end of a serial transfer (Figure 21 and Figure 22). The slave address byte is the first byte
received after the master generates a START condition. The slave address byte contains the 7-bit AS3644
3
address, which is 0110000, followed by the direction bit (R/W), which, for a read, is 1. After receiving and
decoding the slave address byte the device outputs an acknowledge on the SDA line. The AS3644 then
begins to transmit data starting with the register address pointed to by the register pointer. If the register
pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in
the register pointer. The AS3644 must receive a “not acknowledge” to end a read.
<Slave Address>
S
0110000
<RW>
Figure 20. Data Write - Slave Receiver Mode
0
A
<Word Address (n)>
<Data(n)>
XXXXXXXX
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
P
Data Transferred
(X + 1 Bytes + Acknowledge)
Te
ch
ni
ca
S - Start
A - Acknowledge (ACK)
P - Stop
A
<Data(n+X)>
<Data(n+1)>
2. The address for writing to the AS3644 is 60h = 01100000b
3. The address for read mode from the AS3644 is 61h = 01100001b
www.austriamicrosystems.com/AS3644
1.2.2
13 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
0110000
1
A
XXXXXXXX
A
XXXXXXXX
S - Start
A - Acknowledge (ACK)
P - Stop
NA - Not Acknowledge (NACK)
<Data(n+X)>
<Data(n+2)>
A
XXXXXXXX
XXXXXXXX
A
Data Transferred
(X + 1 Bytes + Acknowledge)
Note: Last data byte is followed by a NACK
P
0110000
0
A
XXXXXXXX
A
XXXXXXXX
Sr
0110000
A
XXXXXXXX
1
A
<Data(n+X)>
A
XXXXXXXX
NA
P
Data Transferred
(X + 1 Bytes + Acknowledge)
Note: Last data byte is followed by a NACK
Te
ch
ni
ca
S - Start
Sr - Repeated Start
A - Acknowledge (ACK)
P - Stop
NA - Not Acknowledge (NACK)
A
<Slave Address>
<Data(n+2)>
<Data(n+1)>
<Data(n)>
XXXXXXXX
<Word Address (n)>
<RW>
<RW>
am
lc s
on A
te G
nt
st
il
Figure 22. Data Read (Write Pointer, Then Read) - Slave Receive and Transmit
S
NA
al
id
S
<Data(n+1)>
<Data(n)>
lv
<Slave Address>
<RW>
Figure 21. Data Read (from Current Pointer Location) - Slave Transmitter Mode
www.austriamicrosystems.com/AS3644
1.2.2
14 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
Register Description
Table 4. Design Info Register
Design Info Register
Addr: 0
This register has a fixed ID
Bit Name
7:0
fixed_id
Default Access
13h
Description
2
This is a fixed identification (e.g. to verify the I C
communication)
R
Table 5. Version Control Register
Version Control Register
Addr: 1
lv
This register defines design versions
al
id
Bit
Bit Name
Default Access
Description
3:0
version
Xh
R
AS3644 version number
7:4
reserved
Xh
R
reserved - don’t use
am
lc s
on A
te G
nt
st
il
Bit
Table 6. Current Set Register
Addr: 2
Bit
Bit Name
1:0
reserved
Current Set Register
This register defines the Current Settings
Default Access
0h
Description
R
reserved - don’t use
Exact frequency switching between 4MHz/1MHz for assist
and flash modes for operation close to maximum
pulsewidth - see Figure 17 on page 10
freq_switch_on
2
reserved
4:3
1
10
R/W
0
Pulseskip operation is allowed for all modes results in better efficiency
1
In flash and assist light mode, the DCDC is running at
4MHz or 1MHz (pulseskip is disabled) results in improved noise performance
R
reserved - don’t use
Define the current on pin LED_OUT in assist light mode
assist_current
ni
flash_current
10
R/W
0
ILED_OUT = 51.6mA
1
ILED_OUT = 72.3mA
Define the current on pin LED_OUT in flash mode
R/W
00
ILED_OUT = 260mA
01
ILED_OUT = 280mA
10
ILED_OUT = 300mA
11
ILED_OUT = 320mA
Te
ch
7:6
1
ca
5
www.austriamicrosystems.com/AS3644
1.2.2
15 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
Table 7. Control Register
Control Register
Addr: 3
Bit
This register defines the operating mode and different protection
2
functions in I C interface
Bit Name
Default Access
Description
0h
30ms
1h
60ms
2h
90ms
3h
120ms
150ms
default value
lv
4h
al
id
Define the duration of the flash timer
180ms
6h
210ms
am
lc s
on A
te G
nt
st
il
5h
flash_timer
3:0
4h
R/W
7h
240ms
8h
270ms
9h
300ms
Ah
330ms
Bh
360ms
Ch
390ms
Dh
420ms
Eh
450ms
Fh
480ms
AS3644 operating mode selection
mode
00
ca
5:4
reserved
0
ch
external_strobe
2
Te
7
www.austriamicrosystems.com/AS3644
Shutdown mode
01
Shutdown mode, readout of this register will return
00b
10
Assist light mode with assist_current
11
Flash mode with duration flash_timer with
flash_current
1
R
reserved - don’t use
External strobe signal from pin LED_OUT
ni
6
R/W
00
0
0
no external strobe
A flash pulse with current defined by flash_current is
triggered on a rising edge on LED_OUT (e.g. due to
an external signal pulling it high). At the same time
this register is automatically cleared. After the flash
pulse (duration defined by flash_timer) the AS3644
returns to shutdown mode.
R/W
1
Note: Setting this bit automatically sets mode (see
page 16)=11 (flash mode)
A ongoing flash started with external_strobe
can be stopped by writing ‘0’ to
external_strobe and ‘00’ to mode.
1.2.2
16 - 23
AS3644
Datasheet - D e t a i l e d D e s c r i p t i o n
1. Torch mode and assist light mode share the same operating mode and identical currents.
2. Before changing external_strobe register, contact austriamicrosystems to obtain the unlock sequence for this
register (needs one additional register write access for enabling access to this register).
Table 8. Fault Register
al
id
Fault Register
Addr: 4
This register identifies all the different fault conditions and provide
information about the LED detection
Bit
Bit Name
4:0
reserved
Default Access
0
Description
R
reserved - don’t use
fault_overtemp
5
0
R
lv
see Overtemperature Protection on page 11
0
No fault
1
Junction temperature limit has been exceeded
am
lc s
on A
te G
nt
st
il
see LED Short Circuit Protection on page 11
fault_led_short
6
0
R
0
No fault
1
A shorted LED is detected (pin LED_OUT)
see DCDC Overvoltage Protection on page 11
fault_ovp
7
Register Map
Table 9. Register Map
Register
Definition
Default
0
13h
Version Control
1
XXh
Current Set
2
B4h
0
No fault
1
An overvoltage condition is detected (pin VOUT)
b6
b5
b4
b3
b2
b1
b0
fixed_id
reserved
flash_current
version
assist_c
urrent
3
04h
external reserve
_strobe
d
4
00h
fault_ov fault_le fault_ov
p
d_short ertemp
mode
reserved
freq_swi
tch_on
reserved
flash_timer
reserved
Te
ch
ni
Control
R
Content
b7
Design Info
Fault
Addr
ca
Name
0
www.austriamicrosystems.com/AS3644
1.2.2
17 - 23
AS3644
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
2
The AS3644 can be directly connected to an (existing) I C bus (e.g. from the baseband or camera processor). All functions are accessible by this interface.
Input Capacitor CVIN
al
id
External Components
Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. Ceramic
capacitors are required for input decoupling and should be located as close to the device as is practical.
C
TC Code
ESR
Rated
Voltage
Size
CL05A395MQ5NQKL
4.7µF +/-10%
>1.6µF @ VVIN
X5R
<20m
6V3
0402
Manufacturer
Samsung ElectroMechancs
www.sem.samsung.co.kr
am
lc s
on A
te G
nt
st
il
Part Number
lv
Table 10. Recommended Input Capacitor
If a different input capacitor is chosen, ensure similar ESR value and at least 1.6µF capacitance at the maximum input
supply voltage. Larger capacitor values (C) may be used without limitations.
Output Capacitor CVOUT
Low ESR capacitors should be used to minimize VOUT ripple. Multi-layer ceramic capacitors are recommended since
they have extremely low ESR and are available in small footprints. The capacitor should be located as close to the
device as is practical.
X5R dielectric material is recommended due to their ability to maintain capacitance over wide voltage and temperature
range.
Table 11. Recommended Output Capacitor
Part Number
ECJUNBPJ155K
C
TC Code
ESR
Rated
Voltage
Size
Manufacturer
2x1.5µF +/-15%
X5R
<10m
6V3
0405
2-array
Panasonic
www.panasonic.com
Samsung ElectroMechancs
www.sem.samsung.co.kr
ca
CL14A185MQ8SAKL
If a different output capacitor is chosen, ensure similar ESR values and at least 1.0µF capacitance at maximum output
voltage.
ni
Inductor LDCDC
The fast switching frequency (4MHz) of the AS3644 allows for the use of small SMDs for the external inductor. The
2
ch
inductor should have low DC resistance (DCR) to reduce the I R power losses - high DCR values will reduce efficiency.
Table 12. Recommended Inductor
L
DCR
L @ 0.9A
Size
Manufacturer
LQM21PN1R0NGC
1.1µH
100m
>0.7µH
2x1.25x0.9mm
Murata
www.murata.com
ELGTEA1R0SN
1.0µH
>0.7µH
2x1.25x0.9mm
Panasonic
www.panasonic.com
CIG21K1R0SCE
1.17µH
>0.7µH
2x1.25x0.9mm
Samsung ElectroMechancs
www.sem.samsung.co.kr
Te
Part Number
www.austriamicrosystems.com/AS3644
135m
1.2.2
18 - 23
AS3644
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Table 12. Recommended Inductor (Continued)
L
DCR
L @ 0.9A
Size
Manufacturer
CKP2012N1R0M
1.0µH
110m
>0.7µH
2x1.25x0.9mm
Taiyo Yuden
www.t-yuden.com
MLP2012L1R0MT
1.0µH
>0.7µH
2x1.25x0.9mm
TDK
www.tdk.com
MDT2012-CR1R0AN
1.0µH
>0.7µH
2x1.25x0.9mm
Toko
www.toko.co.jp
110m
al
id
Part Number
If a different inductor is chosen, ensure similar DCR values and at least 0.7µH inductance at 0.9A input current.
LED
lv
Use LED and optics as required by the system.
Table 13. Recommended LEDs
Part Number
LXCL-PWF3
Lumen @ 300mA
Size
Manufacturer
Ceramos
55
Osram Opto Semiconductors
2.04x1.64x0.75mm
www.osram-os.com
Luxeon PWF3
30
2.04x1.64x0.7mm
am
lc s
on A
te G
nt
st
il
CERAMOS LUW
C9SM
Name
Philips Lumileds
www.philipslumileds.com
PCB Layout Guideline
The high speed operation requires proper layout for optimum performance. Route the power traces first and try to minimize the area and wire length of the two high frequency/high current loops:
Loop1: CVIN - LDCDC - pin SW - pin GND - CVIN
Loop2: CVIN - LDCDC - pin SW - pin VOUT - CVOUT - pin GND - CVIN
At the pin GND a single via (or more vias, which are closely combined) connects to the common ground plane. This
via(s) will isolate the DCDC high frequency currents from the common ground (as most high frequency current will flow
between Loop1 and Loop2 and will not pass the ground plane) - see the ‘ground via’ in Figure 23.
Figure 23. Layout recommendation
ca
ni
!"
Te
ch
AS3644
Note: If component placement rules allow, move all components close to the AS3644 to reduce the area and length
of Loop1 and Loop2.
The recommended PCB pad size for the AS3644 is 250µm.
www.austriamicrosystems.com/AS3644
1.2.2
19 - 23
AS3644
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Application Self Testing Guideline
Using the in-build self testing features of the AS3644, the errors as shown in Figure 24 during the assembling and soldering of the AS3644, can be detected - this simplifies and can reduce cost during manufacturing:
Figure 24. Self Testing - Detecting Assembling and Soldering Errors
!
lv
am
lc s
on A
te G
nt
st
il
!
al
id
AS3644
The self testing procedure is simple:
1. Write 0x20 into register 0x03 (Control register) [Enable assist light with default 72mA].
4
2
2. Read back register 0x03 - must return 0x20, otherwise LDCDC or I C (SCL or SDA) is broken
3. Write 0x00 into register 0x03 [Power off]
4. Read register 0x04 (Fault register) - must return 0x00, otherwise the LED is open or shorted
See Table 14to identify the different possible soldering errors:
Table 14. How-to identify errors
Error
Identified by
LDCDC broken
writing 0x20 to 0x03 and read back of register 0x03 does not return 0x20
writing 0x20 to 0x03 and read back of register 0x03 does not return 0x20 - see DCDC
Broken Coil Detection on page 11
ca
SCL or SDA broken
register fault_led_short (see page 17) is set
Flash LED open
register fault_ovp (see page 17) is set
Te
ch
ni
Flash LED shorted
4. Alternative testing method: Instead of reading the internal registers, the current into the AS3644 can be
measured. During assist light mode, the supply current must increase by at least 60mA. If an error is
detected, the current source and the DCDC is automatically switched off - see Protection and Fault Detection Functions on page 10
www.austriamicrosystems.com/AS3644
1.2.2
20 - 23
AS3644
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
Figure 25. 6pin WL-CSP Marking
lv
Note:
AS3644
<Code>
Encoded Datecode (4 characters)
am
lc s
on A
te G
nt
st
il
Line 1:
Line 2:
al
id
Figure 26. 6pin WL-CSP Package Dimensions
*
ni
*
&
&
)
*
*
#
ch
" ## &
ca
&
#
$%&
'%(
!
Te
The coplanarity of the balls is 40µm.
www.austriamicrosystems.com/AS3644
1.2.2
21 - 23
AS3644
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The devices are available as the standard products shown in Table 15.
Table 15. Ordering Information
Description
Delivery Form
Package
AS3644-ZWLT
Ultra Small Low Cost 320mA Inductive White LED
Flash Driver
Tape & Reel
6-pin WL-CSP
(1.5mm x 1.1mm x 0.6mm)
RoHS compliant / Pb-Free
Te
ch
ni
ca
am
lc s
on A
te G
nt
st
il
AS3644Z
Temperature Range: -30ºC - 85ºC
WL Package: Wafer Level Chip Scale Package (WL-CSP) 1.5x1.1x0.6mm
T
Delivery Form: Tape & Reel
lv
Note: AS3644-ZWLT
al
id
Model
www.austriamicrosystems.com/AS3644
1.2.2
22 - 23
AS3644
Datasheet - O r d e r i n g I n f o r m a t i o n
Copyrights
Copyright © 1997-2011, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
al
id
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
am
lc s
on A
te G
nt
st
il
lv
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for
each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
ca
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
ni
Contact Information
ch
Headquarters
austriamicrosystems AG
Te
Tobelbaderstrasse 30
Schloss Premstaetten
A-8141 Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com/AS3644
1.2.2
23 - 23