MC33097NL_8NL (PowerSBC_LIN) versus MC33097_8 (PowerSBC) Dec 16th, 2014 TM External Use MC33907NL_8NL: Product Management • MC33907NL_8NL implements new functionalities (LIN, I/O monitoring), and the die is adapted to copper wire assembly process. • Pin to pin compatible and SW compatible with MC33907_8. • MC33907NL_8NL Datasheet and PPAP available. • MC33907NL_8NL and MC33097_8 will be supported in production with objective to switch full production by end 2015 latest on the MC33907NL_8NL. • MC33907NL_8NL CAN/LIN EMC pre-certification tests successfully completed in Freescale. Official lab certification ongoing. MC33907/8 versions MC33907_8 Using Gold Wire MC33907NL_8NL Using Cu Wire Description / Status PPAP available PPAP available MC33907AE MC33907NAE N/A MC33907LAE MC33908AE MC33908NAE N/A MC33908LAE Icore up to 800mA w CAN Icore up to 800mA w CAN & LIN Icore up to 1.5A w CAN Icore up to 1.5A w CAN & LIN TM External Use 1 MC33907NL_8NL vs MC33907_8: Change Management Item # Block Change item MC33907_8 Using Gold Wire MC33907NL_8NL Using Cu Wire 1 LIN New block N/A LIN physical layer embedded I/O IO_1 FB_Core monitoring N/A I0_1 can monitor the second resistor bridge from Vcore for ASIL D safety redundancy requirements. 3 CAN/LIN Configurable INT of CAN/LIN error bits N/A Bit to enable the interruption of CAN/LIN error bits. List of error/diagnostic bits available in datasheet. 4 CAN CAN mode SPI readback SPI readback of CAN mode not possible when CAN in Sleep mode SPI readback of CAN mode available in all CAN modes. 5 Watchdog LFSR forbidden configuration (all bits @ 1) Datasheet explanation of forbidden configuration only Forbidden configuration locked by HW. 6 Vreg Regulator restart condition and LPOFF Go to LPOFF with a regulator disable, the regulator will not restart automatically Go to LPOFF with a regulator disable, the regulator will restart automatically 7 Miscellaneous Parametric changes N/A Parameters listed slide 14 8 Package Implement Copper Wire Bonding technology Gold Wire Copper Wire All Package stress pass AECQ100 2 TM External Use 2 MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #1) CAN_Toy bit removed (was a customer specific configuration) TM External Use 3 LIN SR configuration MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #1) LIN error bits TM External Use 4 MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #1) LIN mode bits TM External Use 5 MC33907NL_8NL: IO_1 FB_Core monitoring (Item #2) FB_Core resistor bridge monitoring connected to IO_1 (New Safety Function to ease ASIL D implementation) TM External Use 6 6 MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #2) Vpre_Disable bit removed TM External Use 7 IO_1 FB_Core monitoring enable MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #2) IO_1 safety critical configuration when IO_1 is used to monitor FB_Core TM External Use 8 MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #2) Report an error of FB_Core monitoring on IO_1 TM External Use 9 MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #3) LIN error bits interrupt configuration TM External Use 10 CAN error bits interrupt configuration MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #4) Condition: Read CAN_LIN mode register when CAN is set in Sleep mode MC33907_8 behavior: MC33908 is in Normal mode, when CAN is set in sleep mode with wake up capability (CAN_Mode_1:0=’10’), the SPI read back is CAN_Mode_1:0=’00’. MC33907NL_8NL behavior: MC33907NL_8NL is in Normal mode, when CAN is set in sleep mode with wake up capability (CAN_Mode_1:0=’10’), the SPI read back is CAN_Mode_1:0=’10’. TM External Use 11 MC33907NL_8NL SPI mapping changes versus MC33907_8 (Item #5) MC33907NL_8NL datasheet update only All bits at 1 is forbidden on MC33907NL_8NL: Trying to write all bits at 1 will be considered as a wrong SPI data. The SPI command is ignored and the SPI_Req/SPI_G bits are set indicating a SPI command error. TM External Use 12 MC33907NL_8NL SPI mapping changes versus MC33907_8 MC33907NL_8NL datasheet update only (bits inverted) TM External Use 13 MC33907NL_8NL vs MC33907_8 (Item #6) Regulator restart condition and LPOFF Condition: 1/ Regulator shutdown by SPI before entering in LPOFF (valid for all regulators) 2/ Regulator shutdown by ILIM detection (valid for Vaux and Vcca with PNP because they are shutdown after T_ILIM to protect external PNP) MC33907_8 behavior: If the device goes to LPOFF with a regulator shutdown from above condition, the regulator will not restart automatically after wake up from LPOFF, causing ABIST fail, Reset stuck and Deep Fail Safe after 8s. MC33907NL_8NL behavior: If the device goes to LPOFF with a regulator shutdown from above condition, the regulator will restart automatically after wake up from LPOFF, ABIST pass and Reset released. This change was done to provide more availability to the application. TM External Use 14 Parametric changes (Item #7) Parameters MC33907_8 MC33907NL_8NL VAUX ESD +/-4KV to AGND only (+/-3.5KV in other conditions) +/-4KV in all conditions VCCA Output Voltage Foldback Hysteresis Min 70mV Min 30mV VAUX Output Voltage Foldback Hysteresis Min 50mV Min 30mV Fail Safe oscillator 400 – 500KHz 405 – 495KHz Supply Voltage Slew Rate +/-2V/us N/A Minimum capacitor on Vsup N/A Min 44µF IPFF Input Voltage Filtering Time Max 4us Max 5us VCAN Undervoltage Filtering Time Max 6us Max 7us Interrupt Long pulse, Min 100us Short pulse, Min 25us Long pulse, Min 90us Short pulse, Min 20us TM External Use 15 TM www.Freescale.com © 2014 Freescale Semiconductor, Inc. | External Use