IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS IDT74FCT163245/A/C Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP • Extended commercial range of -40°C to +85°C • VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range • CMOS power levels (0.4µW typ. static) • Rail-to-Rail output swing for increased noise margin • Low Ground Bounce (0.3V typ.) • Inputs (except I/O) can be driven by 3.3V or 5V components The FCT163245/A/C 16-bit transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power transceivers are ideal for synchronous communication between two busses (A and B). The Direction and Output Enable controls are designed to operate these devices as either two independent 8-bit transceivers or one 16-bit transceiver. The direction control pin (xDIR) controls the direction of data flow. The output enable pin (xOE) overrides the direction control and disables both ports. All inputs are designed with hysteresis for improved noise margin. FUNCTIONAL BLOCK DIAGRAM 1 DIR 2 DIR 2OE 1OE 2A1 1A1 1B1 2B1 1A2 2A2 1B2 2B2 1A3 2A3 2B3 1B3 1A4 2A4 2B4 1B4 1A5 2A5 2B5 1B5 1A6 2A6 2B6 1B6 1A7 2A7 2B7 1B7 1A8 2A8 2B8 1B8 2554 drw 02 2554 drw 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE 1996 Integrated Device Technology, Inc. AUGUST 1996 8.2 8.2 DSC-2554/6 11 1 IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATIONS PIN DESCRIPTION Pin Names xOE Description Output Enable Input (Active LOW) xDIR Direction Control Input xAx Side A Inputs or 3-State Outputs xBx Side B Inputs or 3-State Outputs 1DIR 1 48 1OE 1B1 2 47 1A1 1B2 3 46 1A2 GND 4 45 GND 1B3 5 44 1A3 1B4 6 43 1A4 VCC 7 42 VCC 1B5 8 41 1A5 1B6 9 40 1A6 10 39 GND TSTG Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature I OUT DC Output Current GND 1B7 11 38 1A7 1B8 12 1A8 2B1 13 SO48-1 37 SO48-2 SO48-3 36 2B2 14 35 2A2 GND 15 34 GND 2B3 16 33 2A3 2B4 17 32 2A4 VCC 18 31 VCC 2B5 19 30 2A5 2B6 20 29 2A6 2554 tbl 01 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) VTERM(3) VTERM(4) 21 28 GND 2B7 22 27 2A7 2B8 23 26 2A8 2DIR 24 25 2OE –0.5 to +7.0 V –0.5 to VCC + 0.5 –65 to +150 V °C –60 to +60 mA FUNCTION TABLE(1) Inputs xOE xDIR L L Bus B Data to Bus A L H Bus A Data to Bus B H X High Z State NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance 2554 drw 03 SSOP/ TSSOP/TVSOP TOP VIEW Unit V 2554 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals. 2A1 GND Max. –0.5 to +4.6 Outputs 2554 tbl 02 CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance Conditions VIN = 0V Typ. 3.5 VOUT = 0V 3.5 Max. Unit 6.0 pF 8.0 NOTE: 1. This parameter is measured at characterization but not tested. pF 2554 lnk 04 8.2 2 IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V Symbol VIH Test Conditions(1) Guaranteed Logic HIGH Level Min. 2.0 Guaranteed Logic LOW Level VI = 5.5V Input HIGH Current (I/O pins) Input LOW Current (Input pins) Parameter Input HIGH Level (Input pins) Typ.(2) — Max. 5.5 2.0 — VCC+0.5 –0.5 — 0.8 V — — ±1 µA VI = VCC — — ±1 VI = GND — — ±1 Input HIGH Level (I/O pins) VIL Input LOW Level Unit V (Input and I/O pins) II H II L Input HIGH Current (Input pins) VCC = Max. Input LOW Current (I/O pins) VI = GND — — ±1 — — ±1 VO = GND — — ±1 — –0.7 –1.2 V –36 –60 –110 mA 90 200 mA V High Impedance Output Current I OZL (3-State Output pins) VIK Clamp Diode Voltage VCC = Min., IIN = –18mA I ODH Output HIGH Current VCC = 3.3V, V IN = VIH or VIL, VO = 1.5V(3) I ODL Output LOW Current VCC = 3.3V, V IN = VIH or VIL, VO = 1.5V(3) 50 VOH Output HIGH Voltage VOL Output LOW Voltage I OS Short Circuit Current(4) VH Input Hysteresis I CCL I CCH I CCZ Quiescent Power Supply Current VCC = Max. VO = V CC I OZH µA VCC = Min. I OH = –0.1mA VCC– 0.2 — — VIN = VIH or V IL I OH = –3mA 2.4 3.0 — VCC = 3.0V VIN = VIH or V IL VCC = Min. I OH = –8mA 2.4 (5) 3.0 — I OL = 0.1mA — — 0.2 VIN = VIH or V IL I OL = 16mA — 0.2 0.4 I OL = 24mA — 0.3 0.55 VCC = 3.0V I OL = 24mA VIN = VIH or V IL VCC = Max., VO = GND(3) — 0.3 0.50 –60 –135 –240 mA — 150 — mV — 0.1 10 µA — VCC = Max., VIN = GND or VCC NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC –0.6V at rated current. 8.2 V 2554 lnk 05 3 IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ∆ICC Parameter Quiescent Power Supply Current Test Conditions(1) VIN = VCC – 0.6V(3) VCC = Max. Min. — Typ.(2) 2.0 Max. 30 Unit µA TTL Inputs HIGH ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open xOE = xDIR = GND One Input Toggling 50% Duty Cycle VIN = VCC VIN = GND — 50 75 µA/ MHz IC Total Power Supply Current (6) VCC = Max. VIN = VCC — 0.5 0.8 mA Outputs Open VIN = GND — 0.5 0.8 fi =10MHz 50% Duty Cycle VIN = VCC –0.6V xOE = xDIR = GND One Bit Toggling VIN = GND VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE = xDIR = GND Sixteen Bits Toggling VIN = VCC VIN = GND — 2.0 3.0 (5) VIN = VCC –0.6V VIN = GND — 2.0 3.3 (5) NOTES: 1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 8.2 2554 tbl 06 4 IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(4) FCT163245 Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay A to B, B to A Output Enable Time xOE to A or B Output Disable Time xOE to A or B Output Enable Time xDIR to A or B (5) Output Disable Time xDIR to A or B (5) Output Skew (3) Condition(1) Min.(2) CL = 50pF RL = 500Ω FCT163245A 1.5 Max. 7.0 Min.(2) 1.5 FCT163245C 1.5 Max. 4.6 Min. (2) 1.5 Max. 4.1 Unit ns 9.5 1.5 6.2 1.5 5.8 ns 1.5 7.5 1.5 5.0 1.5 4.8 ns 1.5 9.5 1.5 6.2 1.5 5.8 ns 1.5 7.5 1.5 5.0 1.5 4.8 ns — 0.5 — 0.5 — 0.5 ns 2554 tbl 07 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 5. This parameter is guaranteed but not tested. 8.2 5 IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS 6V ← V CC 500Ω V V IN Pulse Generator Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests Open GND OUT D.U.T. 50pF R T C 500Ω Switch 6V GND Open 2554 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. L 2554 drw 05 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tH tSU tREM tSU PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH 2554 drw 07 2554 drw 06 PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V 1.5V 0V CONTROL INPUT tPZL OUTPUT NORMALLY SWITCH 6V LOW tPZH 3V 1.5V 0V OUTPUT NORMALLY HIGH 2554 drw 08 SWITCH GND tPLZ 3V 1.5V 3V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V 2554 drw 09 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 3. If VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 8.2 6 IDT74FCT163245/A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX FCT XXXX Temp. Range Device Type X Package PV PA PF Shrink Small Outline Package (SO48-1) Thin Shrink Small Outline Package (SO48-2) Thin Very Small Outline Package (SO48-3) 163245 163245A 163245C Non-Inverting 16-Bit Bidirectional Transceiver 74 –40°C to +85°C 2554 drw 10 8.2 7