DS6217F 00

®
RT6217F
3A, 23V, 800kHz, ACOTTM Step-Down Converter
General Description
Features
The RT6217F is a high-efficiency, monolithic synchronous
step-down DC/DC converter that can deliver up to 3A output
current from a 4.5V to 23V input supply. The RT6217F
adopts ACOT architecture to allow the transient response
to be improved and keep in constant frequency. Cycle-bycycle current limit provides protection against shorted
outputs and soft-start eliminates input current surge during
start-up. Fault conditions also include output under voltage
protection and thermal shutdown.

Integrated 85mΩ /40mΩ MOSFETs

4.5V to 23V Supply Voltage Range
800kHz Switching Frequency
ACOT Control
0.791V ± 1.5% Voltage Reference
Monotonic Start-Up into Pre-biased Outputs
Output Adjustable from 0.791V to 6V
Compact package : TSOT-23-8 (FC)
Ordering Information

RT6217F







Applications

Package Type
J8F : TSOT-23-8 (FC)


Lead Plating System
G : Green (Halogen Free and Pb Free)
Set Top Box
Portable TV
Access Point Router
DSL Modem
LCD TV
Pin Configurations
UVP Option
H : Hiccup
FB
NC
EN
BOOT
8
7
6
5
2
3
4
SW
GND
(TOP VIEW)
Note :
Richtek products are :

RoHS compliant and compatible with the current requireSuitable for use in SnPb or Pb-free soldering processes.
MODE

Marking Information
TSOT-23-8 (FC)
0P= : Product Code
0P=DNN
VIN
ments of IPC/JEDEC J-STD-020.
DNN : Date Code
Simplified Application Circuit
RT6217F
VIN
VIN
BOOT
EN
SW
CIN
Enable
MODE
R3
CBOOT
L
VOUT
R1
MODE
CFF
COUT
FB
GND
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RT6217F
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
MODE
Mode select input. MODE = H, to force IC into CCM. Tie to ground, to select
pulse skipping mode. Do not float.
2
VIN
Input Voltage. Support 4.5V to 23V Input Voltage. Must bypass with a suitable
large ceramic capacitor at this pin.
3
SW
Switch node. Connect to external L-C filter.
4
GND
System Ground.
5
BOOT
Bootstrap, supply for high side gate driver. Connect a 0.1F ceramic capacitor
between the BOOT and SW pins.
6
EN
Buck Enable. High = Enable.
7
NC
No Internal Connection.
8
FB
Feedback Input. The pin is used to set the output voltage of the converter to
regulate to the desired via a resistive divider.
Function Block Diagram
NC
VIN
MODE
BOOT
VIN
VCC
Minoff
Reg
VCC
UGATE
OC
VIBIAS
Control
Driver
SW
VREF
LGATE
UV
GND
GND SW
VCC
SW
Ripple
Gen.
EN
+
+
Comparator
FB
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EN
VIN
On
Time
SW
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RT6217F
Operation
The RT6217F is a high-efficiency, monolithic synchronous
step-down DC/DC converter that can deliver up to 3A output
current from a 4.5V to 23V input supply. Using the
ACOTTM control mode can reduce the output capacitance
and perform fast transient response. It can minimize the
component size without additional external compensation
network.
Current Protection
The inductor current is monitored via the internal switches
cycle-by-cycle. Once the output voltage drops under UV
threshold, the RT6217F will enter hiccup mode.
operation when the junction temperature exceeds the OTP
threshold value. Once the junction temperature cools down
and is lower than the OTP lower threshold, the IC will
resume normal operation.
UVP Protection
The RT6217F detects under-voltage conditions by
monitoring the feedback voltage on FB pin. When the
feedback voltage is lower than 50% of the target voltage,
the UVP comparator will go high to turn off both internal
high-side and low-side MOSFETs.
Hiccup Mode
The RT6217F use hiccup mode for UVP. When the
protection function is triggered, the IC will shut down for a
period of time and then attempt to recover automatically.
Hiccup mode allows the circuit to operate safely with low
input current and power dissipation, and then resume
normal operation as soon as the overload or short circuit
is removed.
Input Under-Voltage Lockout
To protect the chip from operating at insufficient supply
voltage, the UVLO is needed. When the input voltage of
VIN is lower than the UVLO falling threshold voltage, the
device will be lockout.
Shut-Down, Start-Up and Enable (EN)
The enable input (EN) has a logic-low level. When VEN is
below this level the IC enters shutdown mode. When VEN
exceeds its logic-high level the IC is fully operational.
External Bootstrap Capacitor
Connect a 0.1μF low ESR ceramic capacitor between
BOOT and SW. This bootstrap capacitor provides the gate
driver supply voltage for the high side N-channel MOSFET
switch.
Over-Temperature Protection
The RT6217F includes an Over-Temperature Protection
(OTP) circuitry to prevent overheating due to excessive
power dissipation. The OTP will shut down switching
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RT6217F
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- −0.3V to 26V
Enable Pin Voltage, EN -------------------------------------------------------------------------------------------------- −0.3V to 26V
 Switch Voltage, SW ------------------------------------------------------------------------------------------------------- −0.3V to 26.3V
<10ns ------------------------------------------------------------------------------------------------------------------------ −5V to 28V
 BOOT to SW, VBOOT − VSW --------------------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Other Pins ------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C
TSOT-23-8 (FC) ------------------------------------------------------------------------------------------------------------- 1.428W
 Package Thermal Resistance (Note 2)
TSOT-23-8 (FC), θJA ------------------------------------------------------------------------------------------------------- 70°C/W
TSOT-23-8 (FC), θJC ------------------------------------------------------------------------------------------------------- 15°C/W
 Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
 Storage Temperature Range --------------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------------------- 2kV


Recommended Operating Conditions



(Note 4)
Supply Input Voltage ------------------------------------------------------------------------------------------------------ 4.5V to 23V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
4.5
--
23
V
3.7
3.9
4.1
V
--
350
--
mV
Supply Voltage
VIN Supply Input Operating Voltage VIN
VIN Under-Voltage Lockout
Threshold
VUVLO
VIN Under-Voltage Lockout
Threshold-Hysteresis
VUVLO
VIN Rising
Supply Current
Supply Current (Shutdown)
ISHDN
VEN = 0V
--
--
10
A
Supply Current (Quiescent)
IQ
VEN = 2V, VFB = 1V
--
150
250
A
tSS
VFB from 0% to 100%
--
1500
--
s
Soft-Start
Internal Soft-Start Period
Enable Voltage
EN Rising Threshold
VENH
1.2
1.4
1.6
V
EN Hysteresis
VEN
80
150
220
mV
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RT6217F
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
779
791
803
mV
--
85
--
m
--
40
--
m
Feedback Voltage
Feedback Voltage
VFB
Internal MOSFET
High-Side Switch-On Resistance RDS(ON)_H
Low-Side Switch-On Resistance
VBOOTVSW = 4.8V
RDS(ON)_L
Current Limit
Low-Side Switch Valley Current
Limit
ILIM_L
3.3
4.2
--
A
High-Side Switch Peak Current
Limit
ILIM_H
--
5.5
--
A
f SW
--
800
--
kHz
Maximum Duty Cycle
DMAX
--
84
--
%
Minimum On-Time
tON
--
60
--
ns
Thermal Shutdown
TSD
--
160
--
C
Thermal Hysteresis
TSD
--
25
--
C
UVP detect
--
50
--
%
Hysteresis
--
10
--
%
Switching Frequency
Switching Frequency
On-Time Timer Control
Thermal Shutdown
Output Under Voltage Protections
UVP Trip Threshold
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. The first
layer of copper area is filled. θJC is measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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RT6217F
Typical Application Circuit
RT6217F
VIN
4.5V to 23V
2
CIN
22µF
6
Enable
VIN
BOOT 5
EN
SW
1 MODE
MODE
3
R3
20
CBOOT
0.1µF
L
1µH
R1
6.49k
FB
8
CFF
Option
C1
22µF
C2
22µF
VOUT
1.05V
R2
20k
GND 4
Table 1. Suggested Component Values
VOUT (V)
R1 (k)
R2 (k)
L (H)
COUT (F)
CFF (pF)
1.05
6.49
20
1
44
--
1.2
10.5
20
1
44
--
1.8
25.5
20
2.2
44
--
2.5
43.2
20
2.2
44
22 to 68
3.3
63.4
20
3.3
44
22 to 68
5
107
20
3.3
44
22 to 68
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RT6217F
Typical Operating Characteristics
Efficiency vs. Output Current
Output Voltage vs. Output Current
100
1.20
90
1.15
Output Voltage (V)
Efficiency (%)
80
70
VIN = 4.5V
VIN = 12V
VIN = 19V
VIN = 23V
60
50
40
30
20
1.10
1.05
VIN = 4.5V
VIN = 12V
VIN = 19V
VIN = 23V
1.00
10
VOUT = 1.05V
0
0.001
VOUT = 1.05V
0.95
0.01
0.1
1
10
0
0.5
1
Output Current (A)
UVLO Threshold vs. Temperature
2.5
3
EN Threshold vs. Temperature
1.60
1.55
4.0
Rising
1.50
3.9
EN Threshold (V)
UVLO Threshold (V)
2
Output Current (A)
4.1
3.8
3.7
3.6
Falling
3.5
EN_H
1.45
1.40
1.35
1.30
1.25
EN_L
1.20
1.15
1.10
3.4
1.05
VOUT = 1.05V, IOUT = 1A
3.3
VOUT = 1.05V, IOUT = 0A
1.00
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Output Voltage vs. Temperature
Output Voltage vs. Temperature
5.10
1.200
5.08
1.175
5.06
1.150
1.125
Output Voltage (V)
Output Voltage (V)
1.5
VIN = 4.5V
VIN = 12V
VIN = 23V
1.100
1.075
1.050
5.04
VIN = 7V
VIN = 12V
VIN = 23V
5.02
5.00
4.98
4.96
4.94
1.025
VOUT = 1.05V, IOUT = 1A
4.92
VOUT = 5V, IOUT = 1A
4.90
1.000
-50
-25
0
25
50
75
100
Temperature (°C)
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125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT6217F
Load Transient Response
Output Ripple Voltage
VOUT
(20mV/Div)
VOUT
(20mV/Div)
IOUT
(1A/Div)
VSW
(10V/Div)
VIN = 12V, VOUT = 1.05V,
IOUT = 3A, L = 1μH
VIN = 12V, VOUT = 1.05V,
IOUT = 1.5A to 3A, L = 1μH
Time (100μs/Div)
Time (2μs/Div)
Power On from EN
Power Off from EN
VOUT
(1V/Div)
VOUT
(1V/Div)
VIN = 12V, VOUT = 1.05V,
IOUT = 3A, L = 1μH
EN
(2V/Div)
EN
(2V/Div)
VSW
(10V/Div)
VSW
(10V/Div)
I SW
(2A/Div)
I SW
(2A/Div)
VIN = 12V, VOUT = 1.05V,
IOUT = 3A, L = 1μH
Time (5ms/Div)
Time (200μs/Div)
Power On from VIN
Power Off from VIN
VOUT
(1V/Div)
VOUT
(1V/Div)
VIN = 12V, VOUT = 1.05V,
IOUT = 3A, L = 1μH
VIN
(10V/Div)
VIN
(10V/Div)
VSW
(10V/Div)
VSW
(10V/Div)
I SW
(2A/Div)
I SW
(2A/Div)
VIN = 12V, VOUT = 1.05V,
IOUT = 3A, L = 1μH
Time (5ms/Div)
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Time (10ms/Div)
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RT6217F
Application Information
Inductor Selection
The consideration of inductor selection includes
inductance, RMS current rating and, saturation current
rating. The inductance selection is generally flexible and
is optimized for the low cost, low physical size, and high
system performance.
Choosing lower inductance to reduce physical size and
cost, and it is useful to improve the transient response.
However, it causes the higher inductor peak current and
output ripple voltage to decrease system efficiency.
Conversely, higher inductance increase system efficiency,
but the physical size of inductor will become larger and
transient response will be slow because more transient
time is required to change current (up or down) by inductor.
A good compromise between size, efficiency, and transient
response is to set a inductor ripple current (ΔIL) about
20% to 50% of the desired full output load current.
Calculate the approximate inductance by the input voltage,
output voltage, switching frequency (fSW), maximum rated
output current (IOUT(MAX)) and inductor ripple current (ΔIL).
VOUT   VIN  VOUT 
L=
VIN  fSW  IL
Once the inductance is chosen, the inductor ripple current
(ΔIL) and peak inductor current can be calculated.
VOUT   VIN  VOUT 
VIN  fSW  L
IL(PEAK) = IOUT(MAX)  1 IL
2
IL(VALLY) = IOUT(MAX)  1 IL
2
IL =
For the typical operating circuit design, the output voltage
is 1.05V, maximum rated output current is 3A, input
voltage is 12V, and inductor ripple current is 1.5A which
is 50% of the maximum rated output current, the
calculated inductance value is :
L=
1.05  12  1.05 
12  800  103  1.5
= 0.8μH
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The inductor ripple current set at 1.5A and so we select
1μH inductance. The actual inductor ripple current and
required peak current is shown as below :
IL =
1.05  12  1.05 
= 1.2A
12  800  103  1 10-6
IL(PEAK) = IOUT(MAX)  1 IL = 3 + 1.2 = 3.6A
2
2
Inductor saturation current should be chosen over IC's
current limit.
Input Capacitor Selection
The input filter capacitors are needed to smooth out the
RMS input ripple current drawn from the input power source
and ripple voltage seen at the input of the converter. The
voltage rating of the input filter capacitors must be greater
than the maximum input voltage. It's also important to
consider the ripple current capabilities of capacitors.
The RMS input ripple current (IRMS) is a function of the
input voltage (VIN), output voltage (VOUT), and rated output
current (IOUT) :
V
IRMS = IOUT(MAX)  OUT
VIN
VIN
1
VOUT
The maximum RMS input ripple current occurs at
maximum output load and it needs to be concerned about
the ripple current capabilities of capacitors at maximum
output load.
Ceramic capacitors are most often used because of their
low cost, small size, high RMS current ratings, and robust
surge current capabilities. It should pay attention that value
of capacitors change as temperature, bias voltage, and
operating frequency change. For example the capacitance
value of a capacitor decreases as the dc bias across the
capacitor increases.
However, take care when these capacitors are used at
the input of circuits supplied by a wall adapter or other
supply connected through long and thin wires. Current
surges through the inductive wires can induce ringing at
the IC's power input which could potentially cause large,
damaging voltage spikes at VIN pin. If this phenomenon
is observed, some bulk input capacitance may be
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RT6217F
required. Ceramic capacitors can be placed in parallel with
other types such as tantalum, electrolytic, or polymer to
reduce voltage ringing and overshoot.
Choose capacitors rated at higher temperatures than
required. Several ceramic capacitors may be paralleled to
meet the RMS current, size, and height requirements of
the application. The typical operating circuit use 22μF and
one 0.1μF low ESR ceramic capacitors on the input.
Output Capacitor Selection
The RT6217F is optimized for output terminal with ceramic
capacitors application and best performance will be
obtained using them. The total output capacitance value
is usually determined by the desired output ripple voltage
level and transient response requirements for sag which
is undershoot on positive load steps and soar which is
overshoot on negative load steps.
Output Ripple Voltage
Output ripple voltage at the switching frequency is caused
by the inductor current ripple and its effect on the output
capacitor's ESR and stored charge. These two ripple
components are called ESR ripple and capacitive ripple.
Since ceramic capacitors have extremely low ESR and
relatively little capacitance, both components are similar
in amplitude and both should be considered if ripple is
critical.
VRIPPLE = VRIPPLE(ESR)  VRIPPLE(C)
VRIPPLE(ESR) = IL  RESR
VRIPPLE(C) =
IL
8  COUT  fSW
For the typical operating circuit design, the output voltage
is 1.05V, inductor ripple current is 1.2A, and using 2 pieces
of 22μF output capacitor with about 5mΩ ESR, the output
voltage ripple components are :
VRIPPLE(ESR) = IL  RESR = 1.2A  5m = 6mV
IL
1.2A
=
8  COUT  fSW
8  44μF  800kHz
= 4.26mV
= VRIPPLE(ESR)  VRIPPLE(C) = 10.26mV
VRIPPLE(C) =
VRIPPLE
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Output Transient Undershoot and Overshoot
In addition to output ripple voltage at the switching
frequency, the output capacitor and its ESR also affect
the voltage sag (undershoot) and soar (overshoot) when
the load steps up and down abruptly. The ACOTTM transient
response is very quick and output transients are usually
small. However, the combination of small ceramic output
capacitors (with little capacitance), low output voltages
(with little stored charge in the output capacitors), and
low duty cycle applications (which require high inductance
to get reasonable ripple currents with high input voltages)
increases the size of voltage variations in response to
very quick load changes. Typically, load changes occur
slowly with respect to the IC's 800kHz switching frequency.
But some modern digital loads can exhibit nearly
instantaneous load changes and the following section
shows how to calculate the worst-case voltage swings in
response to very fast load steps.
The output voltage transient undershoot and overshoot each
have two components : the voltage steps caused by the
output capacitor's ESR, and the voltage sag and soar due
to the finite output capacitance and the inductor current
slew rate. Use the following formulas to check if the ESR
is low enough (typically not a problem with ceramic
capacitors) and the output capacitance is large enough to
prevent excessive sag and soar on very fast load step
edges, with the chosen inductor value.
The amplitude of the ESR step up or down is a function of
the load step and the ESR of the output capacitor :
VESR_STEP = IOUT  RESR
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
the input-to-output voltage differential, and the maximum
duty cycle. The maximum duty cycle during a fast transient
is a function of the on-time and the minimum off-time since
the ACOTTM control scheme will ramp the current using
on-times spaced apart with minimum off-times, which is
as fast as allowed. Calculate the approximate on-time
(neglecting parasitic) and maximum duty cycle for a given
input and output voltage as :
VOUT
tON
tON =
and DMAX =
VIN  fSW
tON  tOFF(MIN)
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RT6217F
The actual on-time will be slightly longer as the IC
compensates for voltage drops in the circuit, but we can
neglect both of these since the on-time increase
compensates for the voltage losses. Calculate the output
voltage sag as :
L  (IOUT )2
VSAG =
2  COUT   VIN(MIN)  DMAX  VOUT 
The amplitude of the capacitive soar is a function of the
load step, the output capacitor value, the inductor value
and the output voltage :
L  (IOUT )2
VSOAR =
2  COUT  VOUT
Feed-forward Capacitor (Cff)
The RT6217F is optimized for ceramic output capacitors
and for low duty cycle applications. However for high-output
voltages, with high feedback attenuation, the circuit’s
response becomes over-damped and transient response
can be slowed. In high-output voltage circuits (VOUT > 2.5V)
transient response is improved by adding a small
“feedforward” capacitor (Cff) across the upper FB divider
resistor (Figure 1), to increase the circuit's Q and reduce
damping to speed up the transient response without
affecting the steady-state stability of the circuit. Choose
a suitable capacitor value that following below step.

Get the BW the quickest method to do transient
response form no load to full load. Confirm the damping
frequency. The damping frequency is BW.

Cff can be calculated base on below equation :
Cff 
1
2  3.1412  R1 BW  0.8
Enable Operation (EN)
There is an internal 1MEG resister from EN to GND. For
automatic start-up the high-voltage EN pin can be
connected to VIN, through a 100kΩ resistor. Its large
hysteresis band makes EN useful for simple delay and
timing circuits. EN can be externally pulled to VIN by
adding a resistor-capacitor delay (REN and CEN in Figure
2). Calculate the delay time using EN's internal threshold
where switching operation begins.
An external MOSFET can be added to implement digital
control of EN when no system voltage above 2V is available
(Figure 3). In this case, a 100kΩ pull-up resistor, REN, is
connected between VIN and the EN pin. MOSFET Q1 will
be under logic control to pull down the EN pin. To prevent
enabling circuit when VIN is smaller than the VOUT target
value or some other desired voltage level, a resistive voltage
divider can be placed between the input voltage and ground
and connected to EN to create an additional input under
voltage lockout threshold (Figure 4).
EN
VIN
REN
EN
RT6217F
CEN
GND
Figure 2. External Timing Control
VIN
REN
100k
Q1
Enable
BW
EN
RT6217F
GND
Figure 3. Digital Enable Control Circuit
VOUT
R1
Cff
FB
RT6217F
R2
GND
VIN
REN1
REN2
EN
RT6217F
GND
Figure 4. Resistor Divider for Lockout Threshold Setting
Figure 1. Cff Capacitor Setting
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November 2015
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RT6217F
Output Voltage Setting
Set the desired output voltage using a resistive divider
from the output to ground with the midpoint connected to
FB. The output voltage is set according to the following
equation :
VOUT  0.791V  (1 + R1 )
R2
VOUT
resistance between BOOT and the external bootstrap
capacitor. This will slow the high-side switch turn-on and
VSW's rise. To remove the resistor from the capacitor
charging path (avoiding poor enhancement due to
undercharging the BOOT capacitor), use the external diode
shown in Figure 6 to charge the BOOT capacitor and place
the resistance between BOOT and the capacitor/diode
connection.
5V
R1
FB
RT6217F
R2
GND
BOOT
0.1µF
RT6217F
SW
Figure 5. Output Voltage Setting
Place the FB resistors within 5mm of the FB pin. To
minimize power consumption without excessive noise
pick-up, considering typical application, fix R2 = 20kΩ
and calculate R1 as follows :
R1 
R2  (VOUT  VREF )
VREF
For output voltage accuracy, use divider resistors with 1%
or better tolerance.
External BOOT Bootstrap Diode
When the input voltage is lower than 5.5V it is
recommended to add an external bootstrap diode between
VIN and the BOOT pin to improve enhancement of the
internal MOSFET switch and improve efficiency. The
bootstrap diode can be a low cost one such as 1N4148 or
BAT54.
External BOOT Capacitor Series Resistance
The internal power MOSFET switch gate driver is
optimized to turn the switch on fast enough for low power
loss and good efficiency, but also slow enough to reduce
EMI. Switch turn-on is when most EMI occurs since VSW
rises rapidly. During switch turn-off, SW is discharged
relatively slowly by the inductor current during the dead
time between high-side and low-side switch on-times. In
some cases it is desirable to reduce EMI further, at the
expense of some additional power dissipation. The switch
turn-on can be slowed by placing a small (<47Ω)
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Figure 6. External Bootstrap Diode
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
TSOT-23-8 (FC) package, the thermal resistance, θJA, is
70°C/W on a standard four-layer thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by the following formula :
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.428W for
TSOT-23-8 (FC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 7 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
is a registered trademark of Richtek Technology Corporation.
DS6217F-00
November 2015
RT6217F
Maximum Power Dissipation (W)1
2.0
Four-Layer PCB
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 7. Derating Curve of Maximum Power Dissipation
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6217F-00
November 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT6217F
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min.
Max.
Min.
Max.
A
0.700
1.000
0.028
0.039
A1
0.000
0.100
0.000
0.004
B
1.397
1.803
0.055
0.071
b
0.220
0.380
0.009
0.015
C
2.591
3.000
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.585
0.715
0.023
0.028
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
TSOT-23-8 (FC) Surface Mount Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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14
DS6217F-00
November 2015