VSMY3850 Datasheet

VSMY3850
www.vishay.com
Vishay Semiconductors
High Speed Infrared Emitting Diode, 850 nm,
Surface Emitter Technology
FEATURES
• Package type: surface mount
• Package form: PLCC-2
• Dimensions (L x W x H in mm): 3.5 x 2.8 x 1.75
• Peak wavelength: λp = 850 nm
• High reliability
• High radiant power
• High radiant intensity
• Angle of half intensity: ϕ = ± 60°
948553
• Suitable for high pulse current operation
• Floor life: 168 h, MSL 3, acc. J-STD-020
• Lead (Pb)-free reflow soldering
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
RELEASED FOR APPLICATIONS
As part of the SurfLightTM portfolio, the VSMY3850 is an
infrared, 850 nm emitting diode based on surface emitter
technology with high radiant intensity, high optical power
and high speed, molded in a PLCC-2 package for surface
mounting (SMD).
Infrared radiation source for operation with CMOS cameras
(illumination)
• High speed IR data transmission
• IR touch panels
• 3D TV
• Light curtain
PRODUCT SUMMARY
COMPONENT
Ie (mW/sr)
ϕ (deg)
λP (nm)
tr (ns)
17
± 60
850
10
VSMY3850
Note
• Test conditions see table “Basic Characteristics”
ORDERING INFORMATION
ORDERING CODE
PACKAGING
REMARKS
PACKAGE FORM
VSMY3850-GS08
Tape and reel
MOQ: 7500 pcs, 1500 pcs/reel
PLCC-2
VSMY3850-GS18
Tape and reel
MOQ: 8000 pcs, 8000 pcs/reel
PLCC-2
Note
• MOQ: minimum order quantity
Rev. 1.5, 24-Sep-13
Document Number: 83399
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VSMY3850
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
VALUE
UNIT
VR
5
V
Reverse voltage
Forward current
Pulse peak forward current
IF
100
mA
tp/T = 0.5, tp = 100 μs
IFM
200
mA
tp = 100 μs
IFSM
1
A
PV
200
mW
Surge forward current
Power dissipation
Junction temperature
Operating temperature range
Tj
100
°C
Tamb
-40 to +85
°C
Storage temperature range
Soldering temperature
Thermal resistance junction/ambient
Tstg
-40 to +100
°C
acc. figure 7, J-STD-020
Tsd
260
°C
J-STD-051, soldered on PCB
RthJA
250
K/W
120
IF - Forward Current (mA)
PV - Power Dissipation (mW)
250
200
150
100
50
100
80
60
40
20
RthJA = 250 K/W
RthJA = 250 K/W
0
0
0
22541
20
40
60
80
100
0
Tamb - Ambient Temperature (°C)
20
Fig. 1 - Power Dissipation Limit vs. Ambient Temperature
40
60
80
100
Tamb - Ambient Temperature (°C)
22542
Fig. 2 - Forward Current Limit vs. Ambient Temperature
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
Forward voltage
Temperature coefficient of VF
TEST CONDITION
SYMBOL
IF = 100 mA, tp = 20 ms
VF
Radiant intensity
Radiant power
Temperature coefficient of φe
TYP.
MAX.
UNIT
1.6
2.0
V
IF = 1 A, tp = 100 μs
VF
2.9
V
IF = 1 mA
TKVF
-1.45
mV/K
IF = 10 mA
TKVF
-1.2
mV/K
IR
not designed for reverse operation
μA
VR = 0 V, f = 1 MHz, E = 0
Cj
125
IF = 100 mA, tp = 20 ms
Ie
Reverse current
Junction capacitance
MIN.
12
17
pF
25
mW/sr
IF = 1 A, tp = 100 μs
Ie
150
mW/sr
IF = 100 mA, tp = 20 ms
φe
55
mW
IF = 100 mA
TKφe
-0.35
%/K
ϕ
± 60
Angle of half intensity
deg
Peak wavelength
IF = 100 mA
λp
Spectral bandwidth
IF = 30 mA
Δλ
30
nm
Temperature coefficient of λp
IF = 100 mA
TKλp
0.25
nm/K
Rise time
IF = 100 mA
tr
10
ns
Fall time
IF = 100 mA
tf
10
ns
d
0.44
mm
Virtual source diameter
Rev. 1.5, 24-Sep-13
840
850
870
nm
Document Number: 83399
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VSMY3850
www.vishay.com
Vishay Semiconductors
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
1
10
Φe, rel - Relative Radiant Power
1
0.1
0.01
IF = 30 mA
0.75
0.5
0.25
0.001
0
0.5
1
1.5
2
2.5
VF - Forward Voltage (V)
21892
0
650
3
750
Fig. 3 - Forward Current vs. Forward Voltage
0°
Ie, rel - Relative Radiant Intensity
100
10
1
21893
0.01
0.1
20°
40°
1.0
0.9
50°
0.8
60°
70°
0.7
1
IF - Forward Pulse Current (A)
Fig. 4 - Radiant Intensity vs. Forward Current
Rev. 1.5, 24-Sep-13
10°
30°
tp = 100 µs
0.1
0.001
950
Fig. 5 - Relative Radiant Power vs. Wavelength
1000
Ie - Radiant Intensity (mW/sr)
850
λ - Wavelength (nm)
21776-1
ϕ - Angular Displacement
IF - Forward Current (A)
tp = 100 µs
80°
0.6
0.4
0.2
0
948013-1
Fig. 6 - Relative Radiant Intensity vs. Angular Displacement
Document Number: 83399
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VSMY3850
www.vishay.com
Vishay Semiconductors
PACKAGE DIMENSIONS in millimeters
0.9
1.75±0.1
3.5±0.2
0.8
A
C
Technical drawings
according to DIN
specifications
2.2
2.8±0.15
Pin identification
Dimensions in mm
Ø2.4
Drawing-No.: 6.541-5067.02-4
Issue: 5; 23.09.13
+0.15
3
Mounting Pad Layout
Area covered
with solderresist
4
2.6 (2.8)
1.2
1.6 (1.9)
4
Dimensions: Reflow and vapor phase (wave soldering)
DRYPACK
SOLDER PROFILE
300
Temperature (°C)
max. 260 °C
245 °C
255 °C
240 °C
217 °C
250
FLOOR LIFE
200
Floor life (time between soldering and removing from MBB)
must not exceed the time indicated on MBB label:
Floor life: 168 h
Conditions: Tamb < 30 °C, RH < 60 %
Moisture sensitivity level 3, acc. to J-STD-020.
max. 30 s
150
max. 100 s
max. 120 s
100
max. ramp up 3 °C/s max. ramp down 6 °C/s
50
0
0
19841
50
Devices are packed in moisture barrier bags (MBB) to
prevent the products from moisture absorption during
transportation and storage. Each bag contains a desiccant.
100
150
200
250
300
Time (s)
DRYING
In case of moisture absorption devices should be baked
before soldering. Conditions see J-STD-020 or label.
Devices taped on reel dry using recommended conditions
192 h at 40 °C (+ 5 °C), RH < 5 %.
Fig. 7 - Lead (Pb)-free Reflow Solder Profile acc. J-STD-020
Rev. 1.5, 24-Sep-13
Document Number: 83399
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VSMY3850
www.vishay.com
Vishay Semiconductors
TAPE AND REEL
PLCC-2 components are packed in antistatic blister tape
(DIN IEC (CO) 564) for automatic component insertion.
Cavities of blister tape are covered with adhesive tape.
The tape leader is at least 160 mm and is followed by a
carrier tape leader with at least 40 empty compartments.
The tape leader may include the carrier tape as long as the
cover tape is not connected to the carrier tape. The least
component is followed by a carrier tape trailer with a least
75 empty compartments and sealed with cover tape.
Adhesive tape
10.0
9.0
120°
Blister tape
4.5
3.5
2.5
1.5
Component cavity
Identification
Label:
Vishay
type
group
tape code
production
code
quantity
94 8670
Fig. 8 - Blister Tape
2.2
2.0
3.5
3.1
63.5
60.5
14.4 max.
180
178
94 8665
Fig. 11 - Dimensions of Reel-GS08
5.75
5.25
3.6
3.4
4.0
3.6
8.3
7.7
1.85
1.65
1.6
1.4
4.1
3.9
4.1
3.9
13.00
12.75
10.4
8.4
120°
0.25
2.05
1.95
4.5
3.5
94 8668
2.5
1.5
Fig. 9 - Tape Dimensions in mm for PLCC-2
MISSING DEVICES
A maximum of 0.5 % of the total number of components per
reel may be missing, exclusively missing components at the
beginning and at the end of the reel. A maximum of three
consecutive components may be missing, provided this gap
is followed by six consecutive components.
Identification
Label:
Vishay
type
group
tape code
production
code
quantity
13.00
12.75
62.5
60.0
321
329
14.4 max.
18857
Fig. 12 - Dimensions of Reel-GS18
De-reeling direction
94 8158
COVER TAPE REMOVAL FORCE
> 160 mm
Tape leader
40 empty
compartments
min. 75 empty
compartments
Carrier leader
Carrier trailer
The removal force lies between 0.1 N and 1.0 N at a removal
speed of 5 mm/s. In order to prevent components from
popping out of the blisters, the cover tape must be pulled off
at an angle of 180° with regard to the feed direction.
Fig. 10 - Beginning and End of Reel
Rev. 1.5, 24-Sep-13
Document Number: 83399
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
www.vishay.com
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definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000