UNISONIC TECHNOLOGIES CO., LTD UC3869B Preliminary CMOS IC HIGH VOLTAGE GREEN MODE PWM CONTROLLER DESCRIPTION The UTC UC3869B is a highly integrated current mode PWM control IC with high voltage start up, optimized for high performance, low standby power consumption and cost effective offline flyback converter applications. PWM switching frequency at normal operation is internally fixed and is trimmed to a tight range. At no load condition, the IC operates in power-saving mode for lower standby power, decreasing frequency for Higher conversion efficiency at light load condition. The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch, which offering minimal external component count in the design. The UTC UC3869B offers complete protection coverage including Cycle-by-Cycle current limiting (OCP), VDD under voltage lockout (UVLO), over load protection (OLP), over temperature protection (OTP), and over voltage protection (OVP). Excellent EMI performance is achieved with UTC proprietary frequency hopping technique (ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than 20kHz during operation. The tone energy at below 22KHZ is minimized to avoid audio noise during operation. DIP-8 SOP-8 FEATURES * High voltage startup * Power on soft start reducing MOSFET Vds stress * Efficiency and minimum standby power * Frequency shuffling for EMI * Audio noise free operation * Fixed 65KHZ switching frequency * Comprehensive protection coverage VDD Under Voltage Lockout with Hysteresis (UVLO) Cycle-by-cycle over current protection (OCP) Overload Protection (OLP) External programmable Over Temperature Protection (OTP) VDD Over voltage Protection(OVP) www.unisonic.com.tw Copyright © 2015 Unisonic Technologies Co., Ltd 1 of 8 QW-R103-110.b UC3869B Preliminary ORDERING INFORMATION Ordering Number Lead Free Halogen Free UC3869BL-D08-T UC3869BG-D08-T UC3869BG-S08-R CMOS IC Package Packing DIP-8 SOP-8 Tube Tape Reel MARKING DIP-8 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw SOP-8 2 of 8 QW-R103-110.b UC3869B Preliminary PIN CONFIGURATION PIN DESCRIPTION PIN NO. 1 PIN NAME RT 2 FB 3 4 5 6 7 8 CS GND GATE VDD NC HV CMOS IC DESCRIPTION Connected through a NTC resistor to ground for over temperature shutdown control Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and the current-sense signal at CS pin Current sense input Ground Totem-pole gate driver output for power Mosfet Power Supply Connected to the line input or bulk capacitor via resistors for startup BLOCK DIAGRAM HV HV Start Driver Internal supply GATE Soft Start EN Green Mode OCP UVLO VDD OSC Logic EN R Q S LEB Burst Mode S - R + Q Delay - Vth_OLP 2R + OLP Comparator RT CS PWM Comparator OVP Clamp Slope Compensation FB R Delay Vth_OTP GND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 8 QW-R103-110.b UC3869B Preliminary CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT VDD DC Supply Voltage 30 V High-Voltage Pin, HV -0.3~500 V VDD Zener Clamp Voltage (Note 1) VDD_Clamp+0.1 V VDD DC Clamp Current 10 mA FB Input Voltage -0.3~7 V CS Input Voltage -0.3~7 V RT Input Voltage -0.3~7 V Operating Junction Temperature TJ -40~150 °C Storage Temperature TSTG -55~160 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITION PARAMETER VDD Supply Voltage Operating Ambient Temperature SYMBOL VDD TA RATINGS 10 ~ 24 -20~85 UNIT V °C ELECTRICAL CHARACTERISTICS (TA = 25°C, VDD=15V, unless otherwise noted) PARAMETER Supply Current from HV Pin HV Pin Leakage Current After Startup Supply Voltage (VDD) VDD Start up Current Operation Current Start Threshold Voltage Min. Operating Voltage VCC Zener Clamp Voltage Over Voltage Protection Voltage Feedback Input Section(FB Pin) VFB Open Loop Voltage PWM Input Gain ∆VFB / ∆VCS Max Duty Cycle Burst-Mode Out FB Voltage Burst-Mode Enter FB Voltage FB Pin Short Circuit Current Power Limiting FB Threshold Voltage Power Limiting Debounce Time OTP Threshold SYMBOL IHV leakage Istartup I_VDD_Operation VTHD(ON) VDD(MIN) VDD_clamp OVP(ON) TEST CONDITIONS VDD=2V, HV=100V TYP 0.25 MAX UNIT mA 10 μA 2 15 μA 18 6.5 28 0.8 20 8 30 1.8 22 9.5 32 mA V V V 25 27 29 V VDD=15V, HV=500V VDD=UVLO(OFF)-1V, Measure Leakage Current into VDD VFB=3V IVDD=20mA FB=4V Ramp up VDD Until Gate Clock is Off VFB_Open AVCS Maximum Duty VFB=3.5V, VSENSE=0 Cycle VFB(OUT) VSENSE =0 VFB(IN) VSENSE =0 Short FB Pin to GND IFB_Short and Measure Current VTH_PL TD_PL T(THR) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 60 5.4 3 V V/V 78 % 1.8 1.6 V V 240 μA 4.2 V 88 140 120 mS °C 4 of 8 QW-R103-110.b UC3869B Preliminary CMOS IC ELECTRICAL CHARACTERISTICS (Cont.) PARAMETER Current Sense Input(CS Pin) Soft Start Time Leading Edge Blanking Time Peak Current Flat Threshold Voltage Peak Current Valley Threshold Voltage Oscillator Normal Oscillation Frequency Frequency Jittering Frequency Temperature Stability Frequency Voltage Stability Burst Mode Switch Frequency Gate driver Output Low Level Output High Level Output Rising Time 1V~10V Output Falling Time 10V~1V Over temperature protection Output Current of RT Pin Threshold Voltage for OTP SYMBOL TEST CONDITIONS TYP MAX UNIT SST T_blanking 5 350 ms ns VCS-F 0.92 V VCS-V FOSC △f_OSC △f_Temp △f_VDD VFB=4.0V, Duty=0% 0.5 0.58 0.66 V VDD=15V, FB=3V 60 65 ±4 70 KHZ % % % KHZ T=-40~85°C F_Burst VOL VOH T_r T_f 10 10 20 VDD=15V, IO=20mA VDD=15V, IO=20mA CL=1000pF CL=1000pF IRT VTH_OTP UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 0.8 V V nS nS 107 1.05 μA V 11 100 60 93 0.95 100 1 5 of 8 QW-R103-110.b UC3869B Preliminary CMOS IC OPERATION DESCRIPTION The UTC UC3869B devices integrate many useful designs into one controller for low-power switch-mode power supplies. The following descriptions highlight some of the features of the UTC UC3800 series. Internal High Voltage Startup and Under Voltage Lockout (UVLO) UTC UC3869B integrated HV start circuit, and provide about 0.25mA current to charge VDD pin during power on state from HV pin. When VDD cap voltage is higher than UVLO(OFF), the charge current is switched off. At this moment, the VDD capacitor provides current to UTC UC3869B until the auxiliary winding of the main transformer starts to provide the operation current. Operating Current The typical operating current of UTC UC3869B is 0.8mA. Good efficiency is achieved with this low operating current together with the ‘Extended burst mode’ control features. Soft Start UTC UC3869B features an internal 5ms soft start to soften the electrical stress occurring in the power supply during startup. It is activated during the power on sequence. As soon as VDD reaches UVLO (OFF), the CS peak voltage is gradually increased from 0V to the maximum level. Every restart up begins with a soft start. Frequency shuffling for EMI improvement The frequency shuffling (switching frequency modulation) is implemented in UTC UC3869B. The oscillation frequency is modulated so that the tone energy is spread out. The spread spectrum minimizes the conduction band EMI and therefore eases the system design. Power-Saving Mode Operation The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load conditions. The 22KHz minimum frequency control also eliminates the audio noise at any loading conditions. At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the energy. The UTC UC3869B enter burst mode at standby condition to minimize the switching loss and reduces the standby power consumption. Power supplies using the UTC UC3869B can easily meet even the strictest regulations regarding standby power consumption. Oscillator Operation The switching frequency is internally fixed at 65KHZ. No external frequency setting components are required for PCB design simplification. Current Sensing and Leading Edge Blanking Cycle-by-Cycle current limiting is offered in UTC UC3869B current mode PWM control. The switching current is detected by a sense resistor connected to the CS pin. An internal leading edge blanking circuit chops off the sensed voltage spikes due to snubber diode reverse recovery and surge gate current of power MOSFET at initial internal power MOSFET on state. The current limiting comparator is disabled and cannot turn off the internal power MOSFET during the blanking period. The PWM duty cycle is determined by the current sense input voltage and the FB input voltage. Internal Synchronized Slope Compensation Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM generation. This greatly improves the close loop stability at CCM and eliminates the sub-harmonic oscillation and thus reduces the output ripple voltage. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 8 QW-R103-110.b UC3869B Preliminary CMOS IC OPERATION DESCRIPTION (Cont.) Gate Output The UTC UC3869B output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control. The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 16V clamp is added for MOSFET gate protection at higher than expected VDD input. Protection Controls The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes,the driver works as follows. OVP The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed Fig.3. Fig.3 OVP case Fig.4 OLP case OLP OLP will shut down driver when VFB> VOLP for continual a blanking time. The OLP event as followed Fig.4. OTP OTP will shut down driver when junction temperature TRT<VTH_OTP UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 8 QW-R103-110.b UC3869B Preliminary CMOS IC TYPICAL APPLICATION CIRCUIT AC IN EMI Filter DC Out UTC UC3869 RT NCT HV FB NC CS VDD GND GATE UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 8 QW-R103-110.b