Datasheet

UNISONIC TECHNOLOGIES CO., LTD
U8C3525
Preliminary
LINEAR INTEGRATED CIRCUIT
8 BIT SERIAL-IN
PARALLEL-OUT VALVE
DRIVER

DESCRIPTION
The U8C3525 is an 8-Bit Serial-In Parallel-Out driver with
Error Detection to the solenoid valve drive. The device
incorporates shift registers, data latches, and constant current
circuitry on the silicon CMOS chip. The maximum output current
value of one channel is Approximately limited to 250mA by
Built-in constant current source.
The U8C3525 has two power supplies, VDD provides power to
Internal control and communication modules. The range of VDD is
5V to 18V. PVDD is used to absorb the inductive coil
reverse-phase current and the range of PVDD is 5V to 35V.
Its built-in open/short detection circuits help users detect Load
state of the detection channels. System retrieve the error
messages to indicate which channel has failure by serial output
data.

SOP-16
FEATURES
*VDD range: VDD 5V to18V
PVDD 5V to 35V
*Maximum clock frequency: 1MHz
*current limit of Each channel:250mA
*Built-in open/short detection
*Short protect
*Detecting response
*Internal reverse diode of PVDD to Absorb reverse current from
coil

ORDERING INFORMATION
Ordering Number
U8C3525G-S16-R
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Copyright © 2016 Unisonic Technologies Co., Ltd
Package
SOP-16
Packing
Tape Reel
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U8C3525
Preliminary

MARKING

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
1
2
3
PIN NAME
GND
SDI
SDO
4
OE
5
LATCH
6
SCLK
7
VDD
8
PVDD
9-16
Drian0 ~ Drain7
LINEAR INTEGRATED CIRCUIT
DESCRIPTION
Ground terminal
Serial data input terminal.
Serial data output terminal.
Output enable terminal:
‘L’ for all outputs are turned off, ‘H’ for all outputs are active.
Input terminal of data strobe. Data on shift register goes through when ‘H’.
Otherwise, data is latched.
Synchronous clock input terminal for serial data transfer. Data is sampled at the
rising edge of SCLK.
Supply voltage terminal.
Power Supply voltage terminal. To absorb the inductive load reverse current of
Driver-side
Sink constant-current outputs (open-drain).
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U8C3525

Preliminary
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
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U8C3525

Preliminary
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
Voltage On Terminals
VDD
-0.5 ~ 18
V
Voltage On Terminals
VIN
-0.5 ~ VCC+0.5
V
Power Dissipation (Temperature=25°)
PD
1
W
Operational Temperature Range
TJ
-30 ~ +70
°C
Storage Temperature Range
TSTG
-40 ~ +150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

RECOMMENDED OPERATING CONDITIONS
PARAMETER
Power Supply
Power Supply
Input Digital Clock Frequency
SCLK Pulse Width
LATCH Pulse Width
OE Pulse Width
OE to SCLK Rise

SYMBOL
VDD
PVDD
fSCLK
TSCLK
TLATCH
TOE
TOE-SCLK
MIN
5
5
TYP
12
MAX
18
35
1
UNIT
V
V
MHz
ns
ns
us
us
450
450
2
2
TIMING SEQUENCE PARAMETER (TA =25°C, unless otherwise specified)
PARAMETER
Supply Current
Supply Current
Output Voltage High (SDO)
Input High Voltage
Input Low Voltage
Limiting Current
Output Voltage of Each Channel
Maximum Power Voltage Supply
SYMBOL
ION
IOFF
VOH
VIH
VIL
ILIMIT
VDS_ON
VDS-OFF
TEST CONDITIONS
PVDD=24V, Channel On
PVDD=24V, Channel Off
3
TYP
2.3
1.9
VDD
MAX
18
0.8
250
Channel On, IOUT=150mA
Channel Off
UNISONIC TECHNOLOGIES CO., LTD
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MIN
1
35
UNIT
mA
mA
V
V
V
mA/ch
V
V
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U8C3525
Preliminary

TYPICAL APPLICATION CIRCUIT

TIMING DIAGRAM
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www.unisonic.com.tw
LINEAR INTEGRATED CIRCUIT
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U8C3525

Preliminary
LINEAR INTEGRATED CIRCUIT
CIRCUIT DESCRIPTION
The U8C3525 is an 8-Bit Serial-In Parallel-Out driver for Solenoid valve. The state of outputs Drain0 ~ Drain7 are
controlled by the latch data Q20~Q27 and OE signal. When OE is high, if a channel corresponding data latch is 1,
then the channel output is turned on, the switch from the output terminal to ground in the ON state.
U8C3525’s constant current technology make The maximum output current limited to around 250mA,which can
effectively prevent the chip or peripheral devices from damaging caused by load short. If a channel corresponding
data latch is 0, the output channel is switched off, in a high impedance state. When OE is low, no matter what the
value of the latch data, the output channels are turned off. It can withstand high voltage above 35V when the outputs
are turned off.

OPEN/SHORT DETECTION
The result of open/short detection of U8C3525 could be retrieved from serial-out (DAO) data. Once the load of a
channel in Open state or short state, the chip can be detected in time and quickly Shutdown the load shorted
channel which the chip from can overheating and external load. The test results stored to the shift register when OE
Falling edge .It can be removed from SDO end of the serial at SCLK action reading back to the controller.
The controller will read back the data before sending out now Control data for comparison, if exactly the same, it
means the load in good condition, no open short circuit, if a bit of data sent out is 1, 0 read back ,it indicates that the
corresponding channel bit data load short circuit occurs, if a bit of data to send out is 0, 1 read back, the table Shows
the bit data corresponding to the channel occurred Open load.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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