IRFP32N50K, SiHFP32N50K Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Low Gate Charge Qg Results in Simple Drive Requirement 500 RDS(on) (Ω) VGS = 10 V 0.135 Qg (Max.) (nC) 190 Qgs (nC) 59 Qgd (nC) • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness RoHS* COMPLIANT • Fully Characterized Capacitance and Avalanche Voltage and Current 84 Configuration Available Single • Low RDS(on) D • Compliant to RoHS Directive 2002/95/EC TO-247AC APPLICATIONS G • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply S D • High Speed Power Switching S G • Hard Switching and High Frequency Circuits N-Channel MOSFET ORDERING INFORMATION Package TO-247AC IRFP32N50KPbF SiHFP32N50K-E3 IRFP32N50K SiHFP32N50K Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID IDM Linear Derating Factor Single Pulse Avalanche Energyb UNIT V 32 20 A 130 3.7 W/°C mJ EAS 450 Repetitive Avalanche Currenta IAR 32 A Repetitive Avalanche Energya EAR 46 mJ Maximum Power Dissipation TC = 25 °C Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw PD 460 W dV/dt 13 V/ns TJ, Tstg - 55 to + 150 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. Starting TJ = 25 °C, L = 0.87 mH, Rg = 25 Ω, IAS = 32 A. c. ISD ≤ 32 A, dI/dt ≤ 197 A/μs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 www.vishay.com 1 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP32N50K, SiHFP32N50K Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 40 Case-to-Sink, Flat, Greased Surface RthCS 0.24 - Maximum Junction-to-Case (Drain) RthJC - 0.26 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.54 - V/°C VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) gfs VGS = ± 30 V - - ± 100 VDS = 500 V, VGS = 0 V - - 50 VDS = 400 V, VGS = 0 V, TJ = 150 °C - - 250 ID = 32 Ab VGS = 10 V VDS = 50 V, ID = 32 A μA - 0.135 0.16 Ω 14 - - S - 5280 - Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Effective Output Capacitance Coss VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 0 V Coss eff. Total Gate Charge Qg Gate-Source Charge Qgs - 550 - - 45 - VDS = 1.0 V, f = 1.0 MHz - 5630 - VDS = 400 V, f = 1.0 MHz - 155 - - 265 - - - 190 - - 59 VDS = 0 V to 400 VGS = 10 V Vc ID = 32 A, VDS = 400 Vb pF nC Gate-Drain Charge Qgd - - 84 Turn-On Delay Time td(on) - 28 - - 120 - - 48 - - 54 - - - 32 - - 130 - - 1.5 - 530 800 ns - 9.0 13.5 μC - 30 - A Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 250 V, ID = 32 A, Rg = 4.3 Ω, VGS = 10 Vb tf ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Body Diode Reverse Recovery Current IRRM Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 32 A, VGS = 0 Vb TJ = 25 °C, IF = 32 A, dI/dt = 100 A/μsb V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. Pulse width ≤ 400 μs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS. www.vishay.com 2 Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP32N50K, SiHFP32N50K Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Top 100 Bottom 1000 VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 1000 10 1 5.0 V 0.1 100 TJ = 150 °C 10 TJ = 25 °C 1 20 μs PULSE WIDTH TJ = 25 °C 0.1 1 10 4 100 VDS, Drain-to-Source Voltage (V) RDS(on), Drain-to-Source On Resistance (Normalized) VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V Bottom 5.0 V ID, Drain-to-Source Current (A) 5.0 V 1 20 μs PULSE WIDTH TJ = 150 °C 0.1 0.1 1 10 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 9 11 12 Fig. 3 - Typical Transfer Characteristics Top 10 8 7 5 VGS, Gate-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics 100 VDS = 50 V 20 μs PULSE WIDTH 0.1 0.01 100 3.0 ID = 32 A 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 VGS = 10 V 60 80 100 120 140 160 TJ, Junction Temperature Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP32N50K, SiHFP32N50K Vishay Siliconix 100 000 10 000 C, Capacitance (pF) 1000 f = 1 MHz SHORTED ISD, Reverse Drain Current (A) VGS = 0 V, Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + Cgd Ciss 1000 Coss 100 100 TJ = 150 °C 10 TJ = 25 °C 1 Crss 10 1 10 0.1 0.2 1000 100 VDS, Drain-to-Source Voltage (V) OPERATING IN THIS AREA LIMITED BY RDS(on) VDS = 400 V VDS = 250 V VDS = 100 V ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) Fig. 7 - Typical Source-Drain Diode Forward Voltage 1000 ID = 32 A 16 1.6 VSD, Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 20 VGS = 0 V 1.3 0.9 0.6 12 8 100 10 μs 100 μs 10 4 1 ms 0 0 40 80 120 QG, Total Gate Charge (nC) 160 200 Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 1 10 TC = 25 °C TJ = 150 °C Single Pulse 10 ms 100 1000 10000 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP32N50K, SiHFP32N50K Vishay Siliconix RD VDS 35 VGS 25 ID, Drain Current (A) D.U.T. RG 30 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 20 Fig. 10a - Switching Time Test Circuit 15 10 VDS 90 % 5 0 50 25 75 125 100 TC, Case Temperature (°C) 150 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 1 D = 0.50 0.1 0.20 0.10 0.05 0.01 0.02 0.01 0.001 0.00001 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t1/ t2 2. Peak TJ = PDM x ZthJC + TC 0.0001 0.001 0.01 0.1 1 t , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 www.vishay.com 5 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP32N50K, SiHFP32N50K Vishay Siliconix VDS 15 V Driver L VDS tp D.U.T RG + A - VDD IAS 20 V tp IAS 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms 800 EAS, Single Pulse Avalanche Energy (mJ) TOP BOTTOM 640 ID 7A 10 A 16 A 480 320 160 0 25 50 75 100 150 125 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP32N50K, SiHFP32N50K Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91221. Document Number: 91221 S11-0448-Rev. C, 14-Mar-11 www.vishay.com 7 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-247AC (High Voltage) A A 4 E B 3 R/2 E/2 7 ØP Ø k M DBM A2 S (Datum B) ØP1 A D2 Q 4 4 2xR (2) D1 D 1 2 4 D 3 Thermal pad 5 L1 C L A See view B 2 x b2 3xb 0.10 M C A M 4 E1 0.01 M D B M View A - A C 2x e A1 b4 Planting Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain D DE (b1, b3, b5) Base metal E C (c) C c1 (b, b2, b4) (4) Section C - C, D - D, E - E View B MILLIMETERS DIM. MIN. MAX. A 4.58 5.31 A1 2.21 2.59 A2 1.17 2.49 b 0.99 1.40 b1 0.99 1.35 b2 1.53 2.39 b3 1.65 2.37 b4 2.42 3.43 b5 2.59 3.38 c 0.38 0.86 c1 0.38 0.76 D 19.71 20.82 D1 13.08 ECN: X13-0103-Rev. D, 01-Jul-13 DWG: 5971 INCHES MIN. MAX. 0.180 0.209 0.087 0.102 0.046 0.098 0.039 0.055 0.039 0.053 0.060 0.094 0.065 0.093 0.095 0.135 0.102 0.133 0.015 0.034 0.015 0.030 0.776 0.820 0.515 - DIM. D2 E E1 e Øk L L1 N ØP Ø P1 Q R S MILLIMETERS MIN. MAX. 0.51 1.30 15.29 15.87 13.72 5.46 BSC 0.254 14.20 16.25 3.71 4.29 7.62 BSC 3.51 3.66 7.39 5.31 5.69 4.52 5.49 5.51 BSC INCHES MIN. MAX. 0.020 0.051 0.602 0.625 0.540 0.215 BSC 0.010 0.559 0.640 0.146 0.169 0.300 BSC 0.138 0.144 0.291 0.209 0.224 0.178 0.216 0.217 BSC Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions D1 and E1. 5. Lead finish uncontrolled in L1. 6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154"). 7. Outline conforms to JEDEC outline TO-247 with exception of dimension c. 8. Xian and Mingxin actually photo. Revision: 01-Jul-13 Document Number: 91360 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000