ACT522 Datasheet

ACT522
Rev 1, 26-Feb-16
ActiveQRTM Quasi-Resonant PWM Controller
exceeds the latest ES2.0 efficiency standard with
good margin.
FEATURES
• DCM and Quasi-Resonant Operation
ACT522 integrates comprehensive protection. In
case of over temperature, over voltage, short
winding, short current sense resistor, open loop an
d overload conditions, it would enter into auto
restart mode including Cycle-by-Cycle current
limiting.
• QC2.0 Output Current Foldback Control at
5V, 9V and 12V
• High VDD Sustain Voltage for QC2.0 Wide
Output Range Operation
• Adjustable up to 90kHz Switching Frequency
ACT522 is to achieve no overshoot and very short
rise time even with big capacitive load with the builtin fast and soft start process.
• Integrated Patented Line Compensation
• Built-in Soft-Start Circuit
• Line Under-Voltage, Thermal, Output Over-
In low line full load condition, ACT522 is able to be
designed to work in first valley turn on DCM mode
to meet different types of applications. QuasiResonant (QR) operation mode can effectively
improve efficiency during DCM operation, and
reduce the EMI noise and further reduce the
components in input filter.
voltage, Output Short Protections
•
•
•
•
Current Sense Resistor Short Protection
Transformer Short Winding Protection
30mW Standby Power
Complies with Global Energy Efficiency and
CEC Average Efficiency Standards
ACT522 uses an opto-coupler feedback
architecture to provide accurate constant voltage
even at low loads, constant current (CV/CC)
regulation. Integrated line and primary inductance
compensation circuitry provides accurate constant
current operation despite wide variations in line
voltage and primary inductance.
• Sop-8 Packages
APPLICATIONS
• AC/DC Adaptors/Chargers for Cell Phones,
Cordless Phone, PDAs, E-books
ACT522 is idea for QC2.0 12V/1.25A;9V/1.67A;
5V/2A application.
• Adaptors for Portable Media Player, DSCs,
Set-top boxes, DVD players, records
Figure 1:
• Linear Adapter Replacements
Simplified Application Circuit
GENERAL DESCRIPTION
The ACT522 is a high performance peak current
mode PWM controller. ACT522 applies ActiveQRTM
and frequency foldback technique to reduce EMI
and improve efficiency. ACT522’s maximum design
switching frequency is set at 100kHz. Very low
standby power, good dynamic response and
accurate voltage regulation is achieved with an
opto-coupler and the secondary side control circuit.
The idle mode operation enables low standby
power of 30mW with small output voltage ripple. By
applying frequency foldback and
ActiveQRTM
technology, ACT522 increases the average system
efficiency compared to conventional solutions and
Innovative PowerTM
-1-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
ORDERING INFORMATION
PART NUMBER
TEMPERATURE RANGE
PACKAGE
PINS
PACKING
METHOD
ACT522SH-T
-40°C to 85°C
SOP-8
8
TUBE & REEL
TOP MARK
ACT522SH
PIN CONFIGURATION
SOP-8
ACT522SH
PIN DESCRIPTIONS
PIN
NAME
1
EN
2
GATE
Gate Drive. Gate driver for the external MOSFET transistor.
3
GND
Ground.
4
CS
Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak
current limit for the primary switch.
5
FB
Feedback Pin. Connect this pin to optocouplers’s collector for output regulation.
6
VDET
7
NC
8
VDD
Innovative PowerTM
DESCRIPTION
Connect this to the gate of the N-depletion FET.
Valley Detector Pin. Connect this pin to a resistor divider network from the auxiliary winding to
detect zero-crossing points for valley turn on operation.
Not Connect.
Power Supply. This pin provides bias power for the IC during startup and steady state operation.
-2-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
ABSOLUTE MAXIMUM RATINGSc
PARAMETER
VALUE
UNIT
FB, CS, VDET to GND
-0.3 to + 6
V
VDD, GATE to GND
-0.3 to + 45
V
0.625
W
100
mA
-40 to 150
˚C
160
˚C/W
-55 to 150
˚C
300
˚C
Maximum Power Dissipation (SOP-8)
Maximum Continuous VDD Current
Operating Junction Temperature
Junction to Ambient Thermal Resistance (θJA)
Storage Temperature
Lead Temperature (Soldering, 10 sec)
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods.
ELECTRICAL CHARACTERISTICS
(VDD = 32V, LM = 0.47mH, RCS = 0.91Ω, VOUT = 12V, NP = 40, NS =6, NA =15, TA = 25°C, unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Supply
VDD Turn-On Voltage
VDDON
VDD Rising from 0V
16
18
20
V
VDD Turn-Off Voltage
VDDOFF
VDD Falling after Turn-on
6.5
7.0
7.5
V
VDD Over Voltage Protection
VDDOVP
VDD Rising from 0V
43
44
45
V
10
µA
Start Up Supply Current
IDD Supply Current
IDDST
IDD
VDD=16V, before VDD Turn-on
(with N-depletion FET)
VDD = 18V, after VDD Turn-on ,FB
floating
0.5
0.8
mA
0.3
mA
IDD Supply Current at Standby
IDDSTBY
FB = 1.9V
0.2
IDD Supply Current at Fault
IDDFAULT
Fault mode, FB Floating
250
µA
Feedback
FB Pull up Resistor
RFB
15
kΩ
CS to FB Gain
ACS
2
V/V
VFB at Max Peak Current
VFBPEAK
3 + VBE
V
FB Threshold to Stop Switching
VFBBM1
1.9
V
FB Threshold to Start Switching
VFBBM2
1.95
V
Output Overload Threshold
VFBOLP
3.75
V
TOVBLANK
400
ms
OverLoad/Over Voltage Blanking
Time
Innovative PowerTM
-3-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
ELECTRICAL CHARACTERISTICS CONT’D
(VDD = = 32V, LM = 0.47mH, RCS = 0.91Ω, VOUT = 12V, NP = 40, NS =6, NA =15, TA = 25°C, unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCSLIM
0.936
0.955
0.974
V
TCSBLANK
240
300
360
ns
Current Limit
CS Current Limit Threshold
Leading Edge Blanking Time
GATE DRIVE
Gate High Level current source
IOG_ON
VGATE = 5V
23
Gate Rise Time
TRISE
VDD = 10V, CL = 1nF
250
350
ns
Gate Falling Time
TFALL
VDD = 10V, CL = 1nF
50
100
ns
Gate High Level ON-Resistance
RONHI
ISOURCE = 30mA
20
Ω
Gate Voltage
VGATE
VDD = 10V, CL = 1nF
11
V
Max Gate Voltage
VG.MAX
VDD = 45V, Switching
14
V
GATE = 25V, before VDD
turn-on
1
µA
Gate Leakage Current
mA
Oscillator
Maximum Switching Frequency
fMAX
VDET = 2.2V
Switching Frequency Foldback
fMIN
FB = 2.3V+VBE
65
90
kHz
fMAX/3
kHz
75
%
Maximum Duty Cycle
DMAX
Frequency Transform Point1
fSW1
1.2<VDET ≤ 2V
90
kHz
Frequency Transform Point2
fSW2
VDET ≤ 1.2V
75
kHz
100
mV
2.5
µs
1
µA
CS Short Waiting Time
2.5
µs
CS Short Detection Threshold
0.1
CS Open Threshold Voltage
2.5
V
Abnormal OCP Blanking Time
150
ns
Valley Detection
ZCD Threshold Voltage
VDETTH
No valley detected, force
turn-on main switch
Valley Detection Time Window
VDET Leakage Current
Protection
0.15
V
Line UVLO
IVDETUVLO
60
µA
Line OVP
IVDETOVP
2.4
mA
VDET Over Voltage Protection
VDETVOOVP
2.75
V
VDET Vo Short Threshold
VDETVOshort
0.45
V
Innovative PowerTM
-4-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
FUNCTIONAL BLOCK DIAGRAM
Innovative PowerTM
-5-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
FUNCTIONAL DESCRIPTION
ACT522 is a high performance peak current mode
low-voltage PWM controller IC. The controller
includes the most advance features that are
required in the adaptor applications up to 30 Watt.
Unique fast startup, frequency foldback, QR
switching technique, accurate peak current line
compensation, idle mode, short winding protection,
OCP, OTP, OVP and UVLO are included in the
controller.
set by the internal current limiting circuit, the
ACT522 enters current limit condition and causes
the secondary output voltage to drop. As the output
voltage decreases, so does the flyback voltage in a
proportional manner. An internal current shaping
circuitry adjusts the switching frequency based on
the flyback voltage so that the transferred power
remains proportional to the output voltage, resulting
in a constant secondary side output current profile.
The energy transferred to the output during each
switching cycle is ½(LP × ILIM^2) × η, where LP is
the transformer primary inductance, ILIM is the
primary peak current, and η is the conversion
efficiency. From this formula, the constant output
current can be derived:
Startup
VDD is the power supply terminal for the ACT522.
During startup, the N-depletion FET will be turned
ON. Once VDD reaches VDDON voltage, the
ACT522 will start switching and the N-depletion
FET is turned OFF. To startup with a big capacitive
load, a fast startup sequence is implemented in
ACT522. To eliminate the initial current stress on
the MOSFET, a soft startup sequence is
implemented in ACT522.
During startup period, the IC begins to operate with
minimum Ippk to minimize the switching stresses
for the main switch, output diode and transformers.
And then, the IC operates at maximum power
output to achieve fast rise time. After this, VOUT
reaches about 90% VOUT , the IC operates with a
‘soft-landing’ mode(decrease Ippk) to avoid output
overshoot.
IOUTCC =
In constant voltage operation, the ACT522
regulates its output voltage through secondary side
control circuit . The output voltage information is
sensed at FB pin through OPTO coupling. The error
signal at FB pin is amplified through TL431 and
OPTO circuit. When the secondary output voltage is
above regulation, the error amplifier output voltage
decreases to reduce the switch current. When the
secondary output voltage is below regulation, the
error amplifier output voltage increases to ramp up
the switch current to bring the secondary output
back to regulation. The output regulation voltage is
determined by the following relationship:
_ TL 431
× (1 +
R F1
)
RF 2
(2)
where fSW is the switching frequency and VOUTCV is
the nominal secondary output voltage. The constant
current operation typically extends down to lower
than 75% of nominal output voltage regulation.
When VDET detect VOUT is lower than 75% of
nominal output voltage regulation, the switching
frequency will jump to 90KHz in order to increase
output current, and then will drop vs output voltage
base on equation (2) for constant current operation.
And then when VDET detect VOUT is lower than
44% of nominal output voltage regulation, the
switching frequency will jump to 75KHz in order to
increase output current, and then will drop vs output
voltage base on equation (2) for constant current
operation.
There is an external resistor, Rline, connected in
series between CS pin and RCS. This resistor is
used to compensate for the line voltage.
Constant Voltage (CV) Mode Operation
VOUTCV = VREF
1
V
η × fSW
)
× Lp × ( CS )2 × (
RCS
VOUTCV
2
No Load Idle Mode
In no load standby mode, the feedback voltage falls
below VFBBM2 and reaches VFBBM1, ACT522 stop
switching. After it stops, as a result of a feedback
reaction, the feedback voltage increases. When the
feedback voltage reaches VFBBM2, ACT522 start
switching again. Feedback voltage drops again and
output voltage starts to bounds back and forward
with very small output ripple. ACT522 leaves idle
mode when load is added strong enough to pull
feedback voltage exceed VFBBM2.
(1)
where RF1 (R15) and RF2 (R16) are top and bottom
feedback resistor of the TL431.
Staged Constant Current (CC) Mode
Operation
When the secondary output current reaches a level
Innovative PowerTM
-6-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
FUNCTIONAL DESCRIPTION CONT’D
Figure 2:
Idle Mode
Figure 3:
Valley Switching
V
Vo 12V
Io
2A
Vdrain_gnd
0A
Vfb
DC voltage
Vfb_olp
Vfb_fl
Vfbbm2
Vfbbm1
Ip Ilim
Ip_FL
Possible Valley turn on
Ton
t
t
T
Primary Inductor Current Limit
Compensation
Protection Features
The ACT522 provides full protection functions. The
following table summarizes all protection functions.
The ACT522 integrates a primary inductor peak
current limit compensation circuit to achieve
constant current over wide line and wide
inductance.
Frequency Foldback
When the load drops to 75% of full load level,
ACT522 starts to reduce the switching frequency,
which is proportional to the load current ,to improve
the efficiency of the converter.
PROTECTION
FUNCTIONS
FAILURE
CONDITION
PROTECTION
MODE
VDD Over Voltage
VDD > 44V
(4 duty cycle)
Auto Restart
VVDET Over Voltage/No Voltage
VVD > 2.75V or
No switching
for 4 cycles
Auto Restart
Short Winding/
Short Diode
ACT522’s load adaptive switching frequency
enables applications to meet all latest green energy
standards. The actual minimum average switching
frequency is programmable with output
capacitance, feedback circuit and dummy load
(while still meeting standby power).
Valley Switching
ACT522 employed valley switching from no load to
heavy load to reduce switching loss and EMI. In
discontinuous mode operation, the resonant voltage
between inductance and parasitic capacitance on
MOSFET source pin is coupled by auxiliary winding
and reflected on VDET pin through feedback
network R5, R6. Internally, the VDET pin is
connected to an zero-crossing detector to generate
the switch turn on signal when the conditions are
meet.
VCS > 2.5V
Auto Restart
Over Load/Open
Loop ( No CC)
IPK = ILIMIT or
VFB = 4V for
400ms
Auto Restart
Output Short
Circuit
VDET < 0.45V
Auto Restart
VDD Under Voltage
VDD < 7V
Auto Restart
Line Brown Out
IVDETUVLO
< 60µA
Auto Restart
Auto-Restart Operation
ACT522 will enter into auto-restart mode when a
fault is identified. There is a startup phase in the
auto-restart mode. After this startup phase the
conditions are checked whether the failure is still
present. Normal operation proceeds once the failure
mode is removed. Otherwise, new startup phase will
be initiated again.
To reduce the power loss during fault mode, the
startup delay control is implemented. The startup
delay time increases over lines.
Innovative PowerTM
-7-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
TYPICAL APPLICATION
conduction time, CIN is empirically selected to two
12µF electrolytic capacitors.
Design Example
The design example below gives the procedure for
rapid charger flyback converter using ACT522.
Refer to application circuit Figure 4, the design for
an adapter application starts with the following
specification:
Input Voltage Range
The maximum duty cycle is set to be 48% at low line
voltage 90VAC and the circuit efficiency is estimated
to be 85%. Then the maximum average input current
is:
V OUT × I OUT
I IN _ MAX =
V INDC _ MIN × η
(5)
12 × 1 . 25
=
= 221 mA
80 × 0 . 85
The maximum input primary peak current:
90VAC - 265VAC, 50/60Hz
15W
Output Power, PO
Output Voltage, VOUTCV
12/9/5V
Full Load Current, IOUTFL
1.25/1.67/2.1A
System Efficiency CV, η
0.85
I PPK =
The operation for the circuit shown in Figure 4 is as
follows: the rectifier bridge D1−D4 and the capacitor
C1/C2 convert the AC line voltage to DC bus
voltage. This voltage supplies the primary winding
of the transformer T1 and the startup circuit of Q2
and C4 to VDD pin of ACT522. The primary power
current path is formed by the transformer’s primary
winding, Q1, and the current sense resistor R9. The
resistors R3, R2, diode D5 and capacitor C3 create
a snubber clamping network that protects Q1 from
damage due to high voltage spike during Q1’s turn
off. The network consisting of capacitor C4, diode
D6 and resistor R4 provides a VDD supply voltage
for ACT522 from the auxiliary winding of the
transformer. The resistor R4 is optional, which
filters out spikes and noise to makes VDD more
stable. C4 is the decoupling capacitor of the supply
voltage and energy storage component for startup.
During power startup, the current charges C4
through startup mosfet Q2 from the rectified bus
voltage. The diode D8 and the capacitor C5/L2/C6
rectify filter the output voltage. The resistor divider
consists of R15 and R16 programs the output
voltage.
Since a bridge rectifier and bulk input
capacitors are used, the resulting minimum and
maximum DC input voltages can be calculated:
Lp =
= 2 × 90 2 V IN ( MAX
=
) DC
1
- 3.5 ms )
2 × 47
≈80V
0.85 × 24 μF
=
2 × V IN ( MAX
) AC
2 × ( 265 V AC ) = 375 V
_ MIN
D max
I LIM × fs
(7)
The maximum primary turns on time:
TON _ MAX = L p
=
I LIM
VINDC _ MIN
(8)
0 . 47 mH × 921 mA
= 5 . 41 μ s
80
The ringing periods from primary inductance with
mosfet Drain-Source capacitor:
TRINGING_ MAX = 2π Lp _ MAXCDS _ MAX
(9)
= 2 × 3.14 × 0.47mH × (1 + 7%) ×100PF = 1.41μs
Design only an half ringing cycle at maximum load in
minimum low line, so secondly reset time:
TRST = TSW - TON _ MAX - 0.5TRINGING_ MAX
= 1 / 90kHz- 5.41μs - 0.5 ×1.41μs = 5 μs
(10)
Base on conservation of energy and transformer
transform identity, the primary to secondary turns
ratio NP/NS:
V IN _ MIN
NP
T ON
=
×
NS
T RST
V OUT + V D
(3)
=
(11)
5 . 41
80
×
= 7
5
12 + 0 . 35
The auxiliary to secondary turns ratio NA/NS:
(4)
NA
V + VD '
31 + 0 . 45
= DD
=
= 2 . 55
N S VOUT + VD 12 + 0 . 35
Where ŋ is the estimated circuit efficiency, fL is the
line frequency, tC is the estimated rectifier
Innovative PowerTM
V INDC
80 × 0 . 48
=
≈ 0 . 47 mH
921 mA × 90 k
1
- tC )
2 fL
η × CIN
2 × 15 × (
(6)
The primary inductance of the transformer:
2 POUT (
2
VINDC _ MIN = 2VINAC
_ MIN
2 × LI N
2 × 181
=
= 921 mA
D MAX
0 .5
-8-
(12)
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
TYPICAL APPLICATION CONT’D
Two 330µF electrolytic capacitors are used to keep
the ripple small.
An EI16+ core is selected for the transformer. From
the manufacture’s catalogue recommendation, the
gapped core with an effective inductance ALE of
0.294 µH/T2 is selected. The turn of the primary
winding is:
LP
=
ALE
NP =
0 . 47 mH
= 40 T
0 . 294 μ H / T 2
PCB Layout Guideline
Good PCB layout is critical to have optimal
performance. Decoupling capacitor (C4) and
feedback resistor (R5/R6) should be placed close to
VDD and FB pin respectively. There are two main
power path loops. One is formed by C1/C2, primary
winding, mosfet transistor and current sense
resistor (R9). The other is secondary winding,
rectifier D8 and output capacitors (C5/C6). Keep
these loop areas as small as possible. Connecting
high current ground returns, the input capacitor
ground lead, and the ACT522 GND pin to a single
point (star ground configuration).
(13)
The turns of secondary and auxiliary winding can be
derived accordingly:
1
N
N S = s × N p = × 40 ≈ 6 T
(14)
Np
7
NA =
NA
× Ns = 2.55 × 6 ≈ 15T
NS
(15)
Determining the value of the current sense resistor
(R9) uses the peak current in the design. Since the
ACT522 internal current limit is set to 0.96V, the
design of the current sense resistor is given by:
V CS
R CS =
=
2 × I OUT _ MAX × V OUT
L P × FSW × η system
(16)
0 . 96
≈ 0 . 91 Ω
2 × 1 . 45 × 12
0 . 47 mH × 90 kHz × 0 . 85
The voltage feedback resistors are selected
according to the Ioccmax and Vo. The design Io_cc
max is given by:
fs =
Np
Ns
×
Rfb1 × Rfb 2
VO + VD
×
Rfb1 + Rfb 2 L × Vcs × K
p
f _ sw
Rcs
(17)
The design Vo is given by:
Vo = (1 +
N
R fb1
) × s × VFB − VD
Na
R fb 2
(18)
Where k is IC constant and K=17120, then we can
get the value:
Rfb1 = 115 K , Rfb 2 = 9.09K
(19)
When selecting the output capacitor, a low ESR
electrolytic capacitor is recommended to minimize
ripple from the current ripple. The approximate
equation for the output capacitance value is given
by:
COUT =
IOUT
2 .4
=
= 640 μF
fsw × V RIPPLE 75 k × 50 mV
Innovative PowerTM
(20)
-9-
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
Figure 4:
Universal VAC Input, 12/9/5V 1.25/1.67/2.1A rapid Charger
Figure 5:
Output CCCV curve
V-I Characteristic vs. VIN (25˚C)
14
Output Voltage (V)
12
10
8
6
4
2
0
0
600
1200
1800
2400
Output Current (mA)
Innovative PowerTM
- 10 -
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
Table 1:
ACT522 5V12W Bill of Materials
ITEM REFERENCE
DESCRIPTION
QTY
MANUFACTURER
1
U1
IC, ACT522SH,SOP-8
1
Active-Semi.
2
U2
OPTO,EL3H7D,CTR:300-600%,4PIN SMD
1
EVERLIGHT
3
U3
TL431A, Ref=2.5V,1%,SOT23-3
1
TI
4
U4
IC, ACT4613SH201-T,SOP-8
1
Active-Semi.
5
C1,2
Capacitor, Electrolytic,12uF/400V, 8x14mm
2
RUBYCON
6
C11,C8
Capacitor, Ceramic, 1000pF/500V, 0805,SMD
2
POE
7
C4
Capacitor, Ceramic,33uF/50V, 1206
1
POE
8
C5,C6
Capacitor, Solid, 330uF/16V, 8x12mm
2
KSC
9
C9,10
Capacitor, Ceramic, 0.1uF/50V, 0805,SMD
2
POE
10
C7
Capacitor, Ceramic, 100pF/25V, 0805,SMD
1
POE
11
CY1
Safety Y1,Capacitor,1000pF/400V,Dip
1
UXT
12
BD1
BP06,1000V/1.0A,SDIP
1
PANJIT
13
D5,D6
Fast Recovery Rectifier, RS1M,1000V/1.0A, RMA
2
PANJIT
14
D8
Diode, Schottky, 100V/15A, TO-247AB
1
Diodes
15
LF1
CM Inductor, 27mH, EE8.3,D=0.2mm,90T
1
APY(安品源科技)
16
Q1
N-Mosfet Transistor, 4N60,TO-220
1
AUK
17
Q2
N-Mosfet, Depletion mode,CSF501D,20mA/600V,SOT23
1
HuiJing
18
PCB1
PCB, L*W*T=39x39x1.0mm,FR-4,Rev:A
1
Jintong
19
F1
Fuse,2A/250V
1
TY-OHM
20
R1,4
Chip Resistor, 22 ohm, 0805, 5%
2
TY-OHM
21
R2,23
Chip Resistor, 100 ohm, 0805, 5%
2
TY-OHM
22
R3,3A,7
Carbon Resistor, 510K ohm, 1206, 5%
3
TY-OHM
23
R5
Chip Resistor, 115K ohm, 0805,1%
1
TY-OHM
24
R6
Chip Resistor, 9.09K ohm, 0805, 1%
1
TY-OHM
25
R8
Chip Resistor, 3K ohm, 0805, 5%
1
TY-OHM
26
R9,R9a
Chip Resistor, 1.82 ohm,1206 , 1%
2
TY-OHM
27
R11
Chip Resistor, 510 ohm, 0805, 5%
1
TY-OHM
28
R12
Chip Resistor, 1.1k ohm, 0805,5%
1
TY-OHM
29
R14,26
Chip Resistor, 3.3k ohm, 0805, 5%
2
TY-OHM
30
R15
Chip Resistor, 10.5K ohm, 0805, 1%
1
TY-OHM
31
R16
Chip Resistor, 10.2K ohm, 0805, 1%
1
TY-OHM
32
R17
Chip Resistor, 6.49K ohm, 0805, 1%
1
TY-OHM
33
R18
Chip Resistor, 8.66K ohm, 0805, 1%
1
TY-OHM
34
R24
Chip Resistor, 20k ohm, 0805, 5%
1
TY-OHM
35
T1
Transformer, Lp=0.47mH, EI16+
1
APY(安品源科技)
36
NR1
Thermal resistor, SC053
1
TY-OHM
37
VR1
10D471
1
TY-OHM
38
USB1
Small standard USB connector.
1
TY-OHM
39
R19,20
NC
Innovative PowerTM
- 11 -
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
TYPICAL PERFORMANCE CHARACTERISTICS
VDD ON/OFF Voltage vs. Temperature
Startup Supply Current vs. Temperature
VDD ON/OFF (V)
VDD ON
16
Startup Supply Current (µA)
18
14
12
10
VDD OFF
8
6
-40
0
40
120
5
4
3
-40
0
40
80
120
Temperature (°C)
Supply Current at Operation/Fault Mode
vs. Temperature
Maximum/Minimum Switching Frequency vs.
Temperature
Operation Mode
1
0.6
Fault Mode
0.2
-40
0
40
80
120
Temperature (°C)
100
ACT522-004
ACT522-003
Maximum/Minimum Switching Frequency
(KHz)
Temperature (°C)
1.4
Supply Current (mA)
80
ACT522-002
ACT522-001
20
Fmax
80
60
Fmin
40
20
0
-40
0
40
80
120
Temperature (°C)
VCS_LIM Voltage vs. Temperature
ACT522-004
VCS_LIM Voltage (V)
1.2
1
0.8
0.6
-40
0
40
80
120
Temperature (°C)
Innovative PowerTM
- 12 -
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
ACT522
Rev 1, 26-Feb-16
PACKAGE OUTLINE
SOP-8 PACKAGE OUTLINE AND DIMENSIONS
Note: Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per end. Dimension E1 does not include flash or protrusion.
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
[email protected] or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Innovative PowerTM
- 13 -
www.active-semi.com
Copyright © 2016 Active-Semi, Inc.
Similar pages