ACT410US-T - Active-Semi

ACT410
Rev 3, 27-Feb-14
ActivePSRTM Quasi-Resonant PWM Controller
and overload conditions, it would enter auto restart
mode including cycle-by-cycle current limiting.
FEATURES
• Patented Primary Side Regulation
ACT410 is to achieve no overshoot and very short
rise time even with big capacitive load (4000µF)
with the built-in fast and soft start process, .
Technology
• Quasi-Resonant Operation
• Adjustable up to 120kHz Switching
The Quasi-Resonant (QR) operation mode can
effectively improve efficiency, reduce the EMI noise
and further reduce the components in input filter.
Frequency
•
•
•
•
+/-5% Output Voltage Regulation
Accurate OCP/OLP Protection
ACT410 is idea for application up to 36 Watt.
Integrated Output Cord Compensation
Figure 1:
Integrated Line and Primary Inductance
Compensation
Simplified Application Circuit
• Built-in Soft-Start Circuit
• Line Under-Voltage, Thermal, Output Overvoltage, Output Short Protections
•
•
•
•
Current Sense Resistor Short Protection
Transformer Short Winding Protection
Less than 100mW Standby Power
Complies with Global Energy Efficiency and
CEC Average Efficiency Standards
• Tiny SOT23-6 Package
APPLICATIONS
• AC/DC Adaptors/Chargers for Smart Phones,
iPADs, ADSL, PDAs, E-books
• Adaptors for Portable Media Player, DSCs,
and Other
GENERAL DESCRIPTION
The ACT410 is a high performance peak current
mode PWM controller which applies ActivePSRTM
and ActiveQRTM technology. ACT410 achieves
accurate voltage regulation without the need of an
opto-coupler or reference device.
The ACT410 is designed to achieve less than
100mW Standby Power. By applying frequency fold
back and
ActiveQRTM technology, ACT410
exceeds the latest ES2.0 efficiency standard.
ACT410 integrates comprehensive protection. In
case of over temperature, over voltage, short
winding, short current sense resistor, open loop
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ActivePSRTM is a trademark of Active-Semi.
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Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
ORDERING INFORMATION
PART NUMBER
ACT410US-T
TEMPERATURE
PACKAGE
RANGE
-40°C to 85°C
SOT23-6
PINS
PACKING
METHOD
6
TUBE & REEL
OPTION (DC
TOP MARK
CORD %)
FRYH
6
PIN CONFIGURATION
SOT23-6
ACT410US
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
CS
2
GND
Ground.
3
GATE
Gate Drive. Gate driver for the external MOSFET transistor.
4
VDD
5
FB
6
COMP
Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak
current limit for the primary switch.
Power Supply. This pin provides bias power for the IC during startup and steady state operation.
Feedback Pin. Connect this pin to a resistor divider network from the auxiliary winding.
Compensation Pin.
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ACT410
Rev 3, 27-Feb-14
ABSOLUTE MAXIMUM RATINGSc
PARAMETER
VALUE
UNIT
FB, CS, COMP to GND
-0.3 to + 6
V
VDD, GATE to GND
-0.3 to + 22
V
0.45
W
-40 to 150
˚C
220
˚C/W
Operating Junction Temperature
-40 to 150
˚C
Storage Temperature
-55 to 150
˚C
300
˚C
Maximum Power Dissipation (SOT23-6)
Operating Junction Temperature
Junction to Ambient Thermal Resistance (θJA)
Lead Temperature (Soldering, 10 sec)
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods.
ELECTRICAL CHARACTERISTICS
VDD = 15V, LM = 0.37mH, RCS = 1Ω, VOUT = 5V, NP = 76, NS = 7, NA = 20, TA = 25°C, unless otherwise specified,5V2A application.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
11.11
12.35
13.58
V
6.1
6.8
7.5
V
18.45
20.5
22.55
V
5
10
µA
1
mA
Supply
VDD Turn-On Voltage
VDDON
VDD Rising from 0V
VDD Turn-Off Voltage
VDDOFF
VDD Falling after Turn-on
VDD Over Voltage Protection
VDDOVP
VDD Rising from 0V
Start Up Supply Current
IDDST
VDD = 11V, before VDD Turn-on
IDD Supply Current
IDD
VDD = 12V, after VDD Turn-on (no
switching)
0.55
IDD Supply Current at Fault Mode
IDD
VDD = 12V, after VDD Turn-on,
fault = 1
0.25
mA
Feedback
Effective FB Reference Voltage
VFBREF
FB Sampling Blanking Time
TFB_BLK
Time needed for FB Sampling
(After blanking)
FB Leakage Current
TFB_SAMP
IBVFB
2.23
2.25
2.28
V
Light load
0.38
0.45
0.52
µs
Heavy Load
1.1
1.3
1.5
µs
FB sampling
0.5
0.65
0.75
µs
CC and Knee point detecting
0.22
0.25
0.29
µs
1
µA
1.01
V
VFB = 3V
Current Limit
CS Current Limit Threshold
VCSLIM
CS Minimum Current Limits
Threshold
VCSMIN
0.99
300
mV
60
ns
Light Load
150
ns
Heavy Load
636
ns
CS to GATE Propagation Delay
Leading Edge Blanking Time
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ACT410
Rev 3, 27-Feb-14
ELECTRICAL CHARACTERISTICS CONT’D
VDD = 15V, LM = 0.37mH, RCS = 1Ω, VOUT = 5V, NP = 76, NS = 7, NA = 20, TA = 25°C, unless otherwise specified,5V2A application.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RCORD
Output Cable Resistance
Compensation
DVCOMP
6
ACT410
%
GATE DRIVE
Gate Rise Time
TRISE
VDD = 10V, CL = 1nF
150
250
Gate Falling Time
TFALL
VDD = 10V, CL = 1nF
90
ns
Gate Low Level ON-Resistance
RONLO
ISINK = 30mA
10
Ω
Gate High Level ON-Resistance
RONHI
ISOURCE = 30mA
31
Ω
GATE = 18V, before VDD
turn-on
Gate Leakage Current
1
ns
µA
COMPENSATION
Inside Compensate Resistor
RCOMP
Output Sink Current
ICOMP_SINK
Output Source Current
ICOMP_SOUR
ACT410
0
kΩ
VFB = 3V, VCOMP = 2V
15
40
µA
VFB = 1.5V, VCOMP = 2V
15
40
µA
71
µA/V
CE
Transconductance of Error Amplifier
Gm
Maximum Output Voltage
VCOMPMAX
VFB = 1.5V
3.5
V
Minimum Output Voltage
VCOMPMIN
VFB = 3V
0.4
V
CS to COMP Gain
2
V/V
Pre-Amp Gain
1
V/V
COMP Leakage Current
COMP = 2.5V
1
µA
132
kHz
OSCILLATOR
Maximum Switching
fMAX
108
120
Maximum Duty Cycle
DMAX
65
75
%
1164
Hz
Minimum Switching Frequency
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Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
ELECTRICAL CHARACTERISTICS CONT’D
(VDD = 15V, LM = 0.37mH, RCS = 1Ω, VOUT = 5V, NP = 76, NS = 7, NA = 20, TA = 25°C, unless otherwise specified,5V2A application.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
2
2.25
3
µs
CS Short Detection Threshold
0.1
0.15
V
CS Open Threshold Voltage
1.75
V
Abnormal OCP Blanking Time
190
ns
Inductance Short CS Threshold Voltage
1.75
V
Thermal Shutdown Temperature
135
˚C
Thermal Hysteresis
20
˚C
0.2
mA
20
µA
2.4
mA
3
V
3.3
µs
Protection
CS Short Waiting Time
Line UVLO
IFBUVLO
Line UVLO Hysteresis
Line OVP
IFBOVP
VFB Over Voltage Protection
Valley Detection
Valley Detection Time Window
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VCOMP = 0.45V
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Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
FUNCTIONAL BLOCK DIAGRAM
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Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
FUNCTIONAL DESCRIPTION
ACT410 is a high performance peak current mode
low-voltage PWM controller IC. The controller
includes the most advance features that are
required in the adaptor applications up to 36 Watt.
Unique fast startup, frequency fold back, QR
switching technique, accurate OLP, low standby
mode operation, external compensation adjustment,
short winding protection, OCP, OTP, OVP and
UVLO are included in the controller.
transformer secondary and auxiliary turns, and VD
is the rectifier diode forward drop voltage at
approximately 0.1A bias.
Constant Current (CC) Mode Operation
When the secondary output current reaches a level
set by the internal current limiting circuit, the
ACT410 enters current limit condition and causes
the secondary output voltage to drop. As the output
voltage decreases, so does the flyback voltage in a
proportional manner. An internal current shaping
circuitry adjusts the switching frequency based on
the flyback voltage so that the transferred power
remains proportional to the output voltage, resulting
in a constant secondary side output current profile.
The energy transferred to the output during each
switching cycle is ½(LP × ILIM^2) × η, where LP is
the transformer primary inductance, ILIM is the
primary peak current, and η is the conversion
efficiency. From this formula, the constant output
current can be derived:
η × fSW
1
V
IOUTCC = × Lp × ( CS )2 × (
)
(2)
2
RCS
VOUTCV
Startup
Startup current of ACT410 is designed to be very
low so that VDD could be charged to VDDON
threshold level and device starts up quickly. A large
value startup resistor can therefore be used to
minimize the power loss yet reliable startup in
application. For a typical AC/DC adaptor with
universal input range design, two 1MΩ, 1/8 W
startup resistors could be used together with a VDD
capacitor(4.7uF) to provide a fast startup and yet
low power dissipation design solution.
During startup period, the IC begins to operate with
minimum Ippk to minimize the switching stresses
for the main switch, output diode and transformers.
And then, the IC operates at maximum power
output to achieve fast rise time. After this, VOUT
reaches about 90% VOUT , the IC operates with a
‘soft-landing’ mode (decrease Ippk) to avoid output
overshoot.
where fSW is the switching frequency and VOUTCV is
the nominal secondary output voltage. The constant
current operation typically extends down to lower
than 40% of nominal output voltage regulation.
Standby (No Load) Mode
Constant Voltage (CV) Mode Operation
In no load standby mode, the ACT410 oscillator
frequency is further reduced to a minimum
frequency while the current pulse is reduced to a
minimum level to minimize standby power. The
actual minimum switching frequency is
programmable with an output preload resistor.
In constant voltage operation, the ACT410 senses
the output voltage at FB pin through a resistor
divider network R5 and R6 in Figure 2. The signal
at FB pin is pre-amplified against the internal
reference voltage, and the secondary side output
voltage is extracted based on Active-Semi's
proprietary filter architecture.
Loop Compensation
The ACT410 allows external loop compensation by
connecting a capacitor and a resistor to extend its
applications, especially with different VOUT in a wide
output power range.
This error signal is then amplified by the internal
error amplifier. When the secondary output voltage
is above regulation, the error amplifier output
voltage decreases to reduce the switch current.
When the secondary output voltage is below
regulation, the error amplifier output voltage
increases to ramp up the switch current to bring the
secondary output back to regulation. The output
regulation voltage is determined by the following
relationship:
VOUTCV = 2 . 20 V × ( 1 +
R FB 1
N
) × S - VD
R FB 2
NA
Primary Inductance Compensation
The ACT410 integrates a built-in primary
inductance compensation circuit to maintain
constant OLP despite variations in transformer
manufacturing. The compensated ranges is +/-7%.
(1)
where RFB1 (R5) and RFB2 (R6) are top and bottom
feedback resistor, NS and NA are numbers of
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Primary Inductor Current Limit
Compensation
The ACT410 integrates a primary inductor peak
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Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
FUNCTIONAL DESCRIPTION CONT’D
current limit compensation circuit to achieve
constant OLP over wide line and wide load range.
Protection Features
The ACT410 provides full protection functions. The
following table summarizes all protection functions.
Output Cable Resistance Compensation
The ACT410 provides internal programmable
output cable resistance compensation during
constant voltage regulation, monotonically adding
an output voltage correction up to predetermined
percentage at full power.
The feature allows better output voltage accuracy
by compensating for the output voltage drop due to
the output cable resistance.
Frequency Fold-back
PROTECTION
FUNCTIONS
FAILURE
CONDITION
PROTECTION
MODE
VDD Over Voltage
VDD > 20.5V
(4 duty cycle)
Auto Restart
VFB Over Voltage
VFB > 3V
(4 duty cycle)
Auto Restart
Over Temperature
T > 135˚C
Auto Restart
VCS > 1.75V
Auto Restart
Over Load
IPK = ILIMIT
Auto Restart
Output Short
Circuit
VFB < 0.56V
Auto Restart
Open Loop
No switching for
4 cycle
Auto Restart
VCC Under
Voltage
VCC < 6.8V
Auto Restart
Short Winding/
Short Diode
When the load drops to 75% of full load level,
ACT410 starts to decrease the switching frequency,
which is proportional to the load current ,to improve
the efficiency of the converter as show in Functional
Block Diagram.
This enables the application to meet all latest green
energy standards. The actual minimum switching
frequency is programmable with a small dummy
load (while still meeting standby power).
Auto-Restart Operation
Valley Switching
ACT410 will enter auto-restart mode when a fault is
identified. There is a startup phase in the autorestart mode. After this startup phase the conditions
are checked whether the failure is still present.
Normal operation proceeds once the failure mode is
removed. Otherwise, new startup phase will be
initiated again.
ACT410 employed valley switching from medium
load to heavy load to reduce switching loss and
EMI. After the switch is turned off, the ringing
voltage from the auxiliary winding is applied to the
VFB pin through feedback network R5, R6.
Internally, the VFB pin is connected to an zerocrossing detector to generate the switch turn on
signal when the conditions are met. In light load, the
frequency fold back scheme starts to take control to
determine the switch turn on signal, so thus the
switching frequency.
To reduce the power loss during fault mode, the
startup delay control is implemented. The startup
delay time increases over lines.
Over Load Protection (OLP)
Figure 1:
When the secondary output current reaches a level
set by the internal current limiting circuit, the
ACT410 enters current limit condition and causes
the secondary output voltage to drop, the IC enters
fault mode and enter auto restart mode.
Valley Switching at heavy load
Vdrain_gnd Mosfet
ACT410 is able to achieve very accurate OLP
(constant IOUT) independent of input lines and
primary inductor values.
DC voltage
Short Circuit Protection
Possible Valley turn on
Ton
When the secondary side output is short circuited,
the ACT410 enters hiccup mode operation. This
hiccup behavior continues until the short circuit is
removed.
t
T
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Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
TYPICAL APPLICATION CONT’D
FB Over Voltage Protection
The ACT410 includes output over-voltage
protection circuitry, which shuts down the IC when
the output voltage is 40% above the normal
regulation voltage 4 consecutive switching cycles.
The ACT410 enters hiccup mode when an output
over voltage fault is detected.
VDD Over Voltage Protection
ACT410 can monitor the converter output voltage.
The voltage generated by the auxiliary winding
tracks converter’s output voltage through VDD,
which is in proportion to the turn ratio (VOUT+VDIODE)
хNA/NS. When the VOUT is abnormally higher than
design value for four consecutive cycles, IC will
enter the restart process. A counter is used to
reduce sensitivity to noise and prevent the auto
start unnecessary.
Open Loop Protection
ACT410 is able to protect itself from damage when
the control loop is open. The typical open loop
condition includes either VFB floating or RFB5
open.
Over Temperature Shutdown
The thermal shutdown circuitry detects the ACT410
die temperature. The threshold is set at typical
135˚C. When the die temperature rises above this
threshold (135˚C) the ACT410 is disabled and
remains disabled until the die temperature falls
below 115˚C, at which point the ACT410 is reenabled.
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ACT410
Rev 3, 27-Feb-14
TYPICAL APPLICATION CONT’D
Design Example
The design example below gives the procedure for
a DCM fly back converter using an ACT410. Refer
to Application Circuit Figure 2, the design for an
adapter application starts with the following
specification:
Input Voltage Range
90VAC - 265VAC, 50/60Hz
Output Voltage, VOUTCV
I IN
5V
Full Load Current, IOUTFL
2A
CC Current, IOUTMAX
=
2-2.6A
System Efficiency CV, η
Since a bridge rectifier and bulk input capacitors are
used, the resulting minimum and maximum DC
input voltages can be calculated:
1
- tC )
2 fL
η × C IN
=
2 × 85
VIN ( MAX
=
) DC
=
2V
(3)
1
- 3 . 5 ms )
2 × 47
≈100 V
0 . 75 × 2 × 10 μ F
2 × 10 . 5 × (
2
-
=
2 × VIN ( MAX
) AC
2 × ( 265 V AC ) = 375 V
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=
V OUT × I OUT _ CC
V INDC _ MIN × η
12 × 2 . 3
100 × 0 . 75
(5)
= 153 mA
I LIM =
2 × LI N
2 × 153
=
= 874 mA
D MAX
0 . 35
(6)
The primary inductance of the transformer:
Lp =
V INDC _ MIN D max
I LIM × fs
(7)
100 × 0 . 35
=
= 0 . 37 mH
874 mA × 110 k
The maximum primary turns on time:
TON
_ MAX
= Lp
I LIM
V INDC _ MIN
(8)
0 . 37 mH × 874 mA
=
= 3 . 23 μ s
100
The ringing periods from primary inductance with
mosfet Drain-Source capacitor:
TRINGING _ MAX = 2π Lp _ MAXCDS _ MAX
= 2 × 3.14 × 0.37 mH × (1 + 7%) ×100PF = 1.25 μs
(9)
Design only an half ringing cycle at maximum load
in minimum low line, so secondly reset time:
TRST = TSW - TON _ MAX - 0.5TRINGING_ MAX
= 1 / 110kHz - 3.23μs - 0.5 ×1.25μs = 5.24μs
(10)
Base on conservation of energy and transformer
transform identity, the primary to secondary turns
ratio NP/NS:
V IN _ MIN
NP
T
= ON ×
NS
T RST VOUT + V D
2 POUT (
2
INAC _ MIN
_ MAX
The maximum input primary peak current:
0.75
The operation for the circuit shown in Figure 1 is as
follows: the rectifier bridge BD1 and the capacitor
C1/C2 convert the AC line voltage to DC. This
voltage supplies the primary winding of the
transformer T1 and the startup resistor R7/R8 to
VDD pin of ACT410 and C4. The primary power
current path is formed by the transformer’s primary
winding, the mosfet, and the current sense resistor
R9. The resistors R3, R2, diode D2 and capacitor
C3 create a snubber clamping network that protects
Q1 from voltage spike from the transformer primary
winding leakage inductance. The network
consisting of capacitor C4, diode D3 and resistor
R4 provides a VDD supply voltage for ACT410 from
the auxiliary winding of the transformer. The resistor
R4 is optional, which filters out spikes and noise to
makes VDD more stable. C4 is the decoupling
capacitor of the supply voltage and energy storage
component for startup. During power startup, the
current charges C4 through startup resistor R7/R8
from the rectified high voltage. The diode D4 and
the capacitor C7/L2/C6 rectify filter the output
voltage. The resistor divider consists of R5 and R6
programs the output voltage.
_ MIN
The maximum duty cycle is set to be 35% at low
line voltage 85VAC and the circuit efficiency is
estimated to be 75%. Then the maximum average
input current is:
10W
Output Power, PO
V INDC
Where ŋ is the estimated circuit efficiency, fL is the
line frequency, tC is the estimated rectifier
conduction time, CIN is empirically selected to be
2х10µF electrolytic capacitors.
(11)
3 . 23
100
=
×
= 11 . 31
5 . 24 5 + 0 . 45
The auxiliary to secondary turns ratio NA/NS:
(4)
- 10 -
+ VD'
NA
V
12 + 0 . 45
= DD
=
= 2 . 28
NS
V OUT + V D
5 + 0 . 45
(12)
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ACT410
Rev 3, 27-Feb-14
TYPICAL APPLICATION CONT’D
An EFD15 core is selected for the transformer.
From
the
manufacture’s
catalogue
recommendation, the gapped core with an effective
inductance ALE of 64 nH/T2 is selected. The turn of
the primary winding is:
LP
0.37 mH
=
= 76T
ALE
64nH / T 2
NP =
(13)
The turns of secondary and auxiliary winding can
be derived accordingly:
NS =
Ns
1
× Np =
× 76 ≈ 7T
Np
11.32
(14)
NA =
NA
× Ns = 2.28 × 7 ≈ 20T
NS
(15)
Determining the value of the current sense resistor
(R9) uses the peak current in the design. Since the
ACT410 internal current limit is set to 1V, the
design of the current sense resistor is given by:
RCS =
=
VCS
2 × IOUT _ OCP ×VOUT
LP × FSW ×ηsystem
1
≈ 1.07.Ω
2 × 2.6 × 5
0.37 mH ×100kHz × 0.75
Two 820µF electrolytic capacitors are used to keep
the ripple small.
PCB Layout Guideline
Good PCB layout is critical to have optimal
performance. Decoupling capacitor (C4) and
feedback resistor (R5/R6) should be placed close to
VDD and FB pin respectively. There are two main
power path loops. One is formed by C1/C2, primary
winding, Mosfet transistor and current sense
resistor (R9). The other is secondary winding,
rectifier D4 and output capacitors (C7/C6). Keep
these loop areas as small as possible. Connecting
high current ground returns, the input capacitor
ground lead, and the ACT410 GND pin to a single
point (star ground configuration).
(16)
Where Fsw is the frequency at 4.75V CC mode.
The voltage feedback resistors are selected
according to the Ioccmax and Vo. The design
Io_cc max is given by:
fs =
Np
Ns
×
R fb 1 × R fb 2
VO + VD
×
R fb 1 + R fb 2 L × V cs × K
p
f _ sw
R cs
(17)
The design Vo is given by:
Vo = (1 +
R fb1
N
) × s × VFB − VD
R fb 2
Na
(18)
Where k is IC constant and K=0.000075, then we
can get the value:
Rfb1 = 68K ,Rfb2 = 11.5K
(19)
When selecting the output capacitor, a low ESR
electrolytic capacitor is recommended to minimize
ripple from the current ripple. The approximate
equation for the output capacitance value is given
by:
COUT =
IOUT
2
=
= 364μF
fsw ×VRIPPLE 110k × 50mV
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(20)
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ACT410
Rev 3, 27-Feb-14
Figure 2:
ACT410, Universal VAC Input, 5V/2A Output Charger
ACT410 Bill of Materials
Table 1:
ITEM
REFERENCE
1
U1
QTY
MANUFACTURER
IC, ACT410,SOT23-6
2
DESCRIPTION
1
Active-Semi.
C1,C2
Capacitor, Electrolytic, 10µF/400V, 10x15mm
2
KSC
3
C3
Capacitor, Ceramic, 1000pF/500V, 0805,SMD
1
POE
4
C4
Capacitor, Electrolytic,10µF/35V,5x11mm
1
KSC
5
C6,C7
Capacitor, Electrolytic, 820µF/6.3V, 6.3 × 16mm
2
KSC
6
C8
Capacitor, Ceramic, 0.1µF/25V, 0805,SMD
1
POE
7
C9
Capacitor, Ceramic, 1000pF/100V, 0805,SMD
1
POE
8
C10
Capacitor, Ceramic, 200pF/50V, 0805,SMD
1
POE
9
CY1
Safety Y1,Capacitor,1000pF/400V,Dip
1
UXT
10
BD1
Bridge Rectifier,D1010S,1000V/1.0A,SDIP
1
PANJIT
PANJIT
11
D2,D3
Fast Recovery Rectifier, RS1M,1000V/1.0A, RMA
2
12
D4
Diode, Schottky, 45V/10A, S10U45S, SMD
1
Vishay
13
D5
Diode, 1N4148 SMD
1
PANJIT
14
L1
Axial Inductor, 1.5mH, 5*7,Dip
1
SoKa
15
L2
Axial Inductor, 0.55*5T, 5*7,Dip
1
SoKa
16
Q1
Mosfet Transistor, 2N60,TO-251
1
Infineon
17
PCB1
PCB, L*W*T=40x28x1.6mm,Cem-1,Rev:A
1
Jintong
18
FR1
Fuse,1A/250V
1
TY-OHM
19
R2
Carbon Resistor, 200KΩ, 1206, 5%
1
TY-OHM
20
R3
Chip Resistor, 100Ω, 0805, 5%
1
TY-OHM
21
R1
Chip Resistor, 51Ω, 0805, 5%
1
TY-OHM
22
R4,R13
Chip Resistor, 22Ω, 0805, 5%
2
TY-OHM
23
R5
Chip Resistor, 68KΩ, 0805,1%
1
TY-OHM
24
R6
Chip Resistor, 11.5KΩ, 0805, 1%
1
TY-OHM
TY-OHM
25
R7
Chip Resistor, 1MΩ, 0805 , 5%
1
26
R8
Chip Resistor, 1MΩ, 0805 , 5%
1
TY-OHM
27
R9
Chip Resistor, 1.1Ω, 1206,1%
1
TY-OHM
28
R10,R15
Chip Resistor, 240Ω, 0805 , 5%
2
TY-OHM
29
R11,R12
Chip Resistor, 3KΩ, 0805 , 5%
2
TY-OHM
30
R14
Chip Resistor, 100KΩ, 0805, 5%
1
TY-OHM
31
T1
Transformer, Lp=0.37mH, EFD15
1
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
- 12 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
TYPICAL PERFORMANCE CHARACTERISTICS
Startup Supply Current vs. Temperature
VDD ON/OFF Voltage vs. Temperature
10.5
9.5
8.5
VDDOFF
7.5
6.5
0
40
80
5
4
-40
0
40
80
120
Temperature (°C)
Temperature (°C)
Supply Current at Operation/Fault Mode
vs. Temperature
Maximum/Minimum Switching Frequency vs.
Temperature
0.5
0.4
Fault Mode
0.3
0.2
-40
0
40
80
150
FMAX
100
50
FMIN
0
-40
120
0
40
80
120
Temperature (°C)
Temperature (°C)
VCS Voltage vs. Temperature
VFB Threshold Voltage vs. Temperature
1.5
VFB Threshold Voltage (V)
VCS_Open
VCS Voltage
1
0.5
VCS_Short
2.5
ACT410-006
ACT410-005
2
VREF
2
1.5
0
-40
ACT410-004
ACT410-003
Operation Mode
Supply Current (mA)
6
120
0.6
VCS Voltage (V)
7
3
-40
Maximum Switching Frequency (KHz)
VDDON and VDDOFF (V)
11.5
Startup Supply Current (µA)
VDDON
12.5
ACT410-002
8
ACT410-001
13.5
0
40
80
120
-40
Temperature (°C)
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
0
40
80
120
Temperature (°C)
- 13 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
TYPICAL PERFORMANCE CHARACTERISTICS
VCOMP Voltage vs. Temperature
VDDON and VDDOFF (V)
ACT410-007
VMAX
4
3
2
1
VMIN
0
-40
0
40
80
120
Temperature (°C)
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
- 14 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.
ACT410
Rev 3, 27-Feb-14
PACKAGE OUTLINE
SOT23-6 PACKAGE OUTLINE AND DIMENSIONS
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
[email protected] or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
- 15 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.