For Video Equipment MN88831 PCM Audio Decoder LSI for Satellite Broadcasting Tuners (Includes Built-In Digital Filter and D/A Converter) Pin Assignment PO0/MTO PI2 PI1 DVDD BSTIN BSTRM SYNCF DCDI ECDO P2M NAMODE BPO The MN88831 greatly streamlines set design by incorporating a satellite broadcasting PCM audio decoder, a switched capacitor D/A converter, and analog post filter to a single chip. Built-in tertiary ∆-∑ noise shaping D/A converter Reduced jitter noise through use of switched capacitor configuration Built-in analog post filter Built-in digital de-emphasis circuit Choice of microcomputer interfaces with selector pin: 3-wired serial interface or I2 C interface 36 35 34 33 32 31 30 29 28 27 26 25 Features Built-in digital filter using 8-fold oversampling PO1 PO2 PO3 PO4 PC DVSS IVI IVO XI XO IIN OIN 37 38 39 40 41 42 43 44 45 46 47 48 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 Overview • Pay-per-view flag detection • Error frequency detection • Detection of control code bit-7 DVDD PO5 PO6/LIBP IFSEL TES0 TES1 CHV CWO/IFMOD CS/SA CCK/SCL CTLI/SDA DVSS Muting function supporting following settings Built-in general-purpose microcomputer I/O port Bit stream input pin supporting 0.4 VP-P input Applications Satellite broadcasting tuners (BS, CS) (TOP VIEW) QFP048-P-1212A NTI NLOCK NRES DVSS AVDDR VREF OUTR AVSSR BIAS AVSSL OUTL AVDDL NRES BSTIN BSTRM NLOCK 22 32 31 23 (DE) SW1 Differential decoder serialization 1T Frame synchronization detection Timing generator Duplex error detection and correction SW2 30 43 SYNCF IVI 44 ECDO IVO Clock generator VCO Descramble control code integration and detection De-interleaving A mode data expansion Incompatible data range detection Data interpolation Muting 24 28 MTI 25 Range bit detection and correction. Pay-per-view flag detection BPO 29 (MTO) (LIBP) Microcomputer interface: Serial or I2C bus (D/A converter block) Timing generator for D/A converter block Analog post filter Switched capacitor D/A converter ∆–Σ noise shaper Digital filter Digital de-emphasis VREF ECDI BIAS Data output control Digital audio interface MN88831 For Video Equipment Block Diagram 16 19 18 14 3 36 34,35 8 11 10 9 4 26 27 7 41 46 45 47 48 OUTR OUTL PO6/LIBP PO1 to PO5 PO0/MTO PI1,PI2 CWO/IFMOD CTLI/SDA CCK/SCL CS/SA IFSEL NAMODE P2M CHV PC XO XI IIN QIN For Video Equipment MN88831 Absolute Maximum Ratings Parameter Power supply voltage Symbol VDD Ratings Unit V – 0.3 to 7.0 Input voltage VI – 0.3 to VDD +0.3 V Output voltage VO – 0.3 to VDD +0.3 V Output current IO 25 mA Power dissipation PD 480 mW Operating temperature Topr –20 to +70 ˚C Storage temperature Tstg –55 to +125 ˚C Notes: 1. The above ratings represent the maximum values that may be applied without damaging the chip, not the limits for guaranteed operation. 2. If the chip is to be used in the presence of strong electric fields—under a CRT tube, for example—apply shielding to the package surface to ensure proper operation. 3. The power dissipation is for an ambient temperature (Ta) of 70˚C. 4. The voltages applied to the pins CCK/SCL, CTLI/SDA, CWO/IFMOD, PO0/MTO, PO1–PO5, and PO6/LIBP must be within the range between –0.3V and 5.5V when the power is off. Operating Conditions Parameter Power supply voltage for DV SS=AV SS=0V Symbol DVDD (*1) Test Conditions min 4.5 typ 5.0 max 5.5 Unit V AVDD (*2) 4.5 5.0 5.5 V digital circuits Power supply voltage for analog circuits XI clock frequency fXI CHV="H" (256fs mode) 12.288 XI clock frequency fXI CHV="L" (384fs mode) XI clock input amplitude — C cut input 0.8 BSTIN input amplitude — C cut input 0.35 Ambient temperature during Ta MHz 18.432 –20 MHz 3.0 0.5 VP-P VP-P +70 ˚C operation Notes: 1. *1 & *2: For the logic portions of the microcomputer interface, DVDD min = 4.0V. AV DD covers both AVDDL and AVDDR . AV SS covers both AVSSL and AVSSR . Analog characteristics are only guaranteed for DV DD = AVDD = 5.0V. 2. Always use low-impedance external connections for VDD and VSS . Always connect the two through a bypass capacitor of at least 0.01 µF to ensure proper operation. 3. Keep the NRES pin (pin No. 22) at "L" level to prevent operation error of the CTLI/SDA pin in the I2C interface at voltages lower than the guaranteed operating power supply voltage. MN88831 For Video Equipment Electrical Characteristics (1) DC characteristics AV DD=DV DD=4.5 to 5.5V, AVSS=DV SS=0V, Ta= –20 to +70˚C Parameter Symbol IDD1 Power supply current IDD2 Test Conditions No load, VDD=5.5V min 384fs No load, VDD=5.5V 256fs typ max Unit 56 80 mA 56 80 mA Digital input pins 1 (*1) "H" level input voltage VIH1 0.7 × DVDD DVDD V "L" level input voltage VIL1 DVSS 0.3 × DVDD V "H" level input voltage VIH2 0.8 × DVDD DVDD V "L" level input voltage VIL2 DVSS 0.2 × DVDD V Digital input pins 2 (*2) Digital output pins 1 (*3) "H" level output voltage VOH1 IOH1= –1mA "L" level output voltage VOL1 IOL1=+1mA DVDD – 0.8 0.5 V V VOL2 IOL2=+1mA 0.5 V ±10 µA 0.5 V ±50 µA Digital output pins 2 (*4) "L" level output voltage High-impedance output leakage current I LO VO=High-impedance state VI=0V to DV DD Digital output pins 3 (*5) "L" level output voltage High-impedance output leakage current VOL3 ILO2 IOL3=+1mA VI=0V to DV DD VNRES=0V to 0.5V Analog output pins VREF pin output pin VREF 0.45 × AVDD V BIAS pin output pin VBIAS 0.5 × AVDD V VTI 0.5 × DVDD ± 0.75 V IVI-IVO inverter Inverter input threshold voltage Notes: *1: IFSEL, TES0, TES1, CHV, MTI, ECDI, PI1, PI2, IIN, QIN, CWO/IFMOD (C3, C4 only), IVI (C5 only) *2: CS/SA, CCK/SCL, NRES, CTLI/SDA (C6, C7 only) *3: NLOCK, BPO, NAMODE, P2M, ECDO, SYNCF, BSTRM, PC *4: PO0/MTO, PO1 to PO6, CWO/IFMOD, PC (C12 only) *5: CTLI/SDA For Video Equipment MN88831 Application Circuit Example MN88831’s built-in final differential addition filter Switched capacitor block output OUTL– approx. 100Ω OUTL+ PI BIAS MI OUT OUTL 680Ω 33µF 4700pF BIAS Reference voltage + 22µF Bias voltage for operational amplifier VREF + 22µF Structure of Analog Post Filter and Sample Analog Connections 18kΩ MN88831 For Video Equipment Package Dimensions (Unit: mm) QFP048-P-1212A 14.2±0.4 12.0±0.3 36 25 24 48 13 2.0±0.2 0.1±0.1 0.1 SEATING PLANE 14.2±0.4 (1.1) +0.10 0.8 (1.6) 12 0.3±0.1 0.15 -0.05 1 2.4Max. 12.0±0.3 (1.6) 37 0 to 10° (0.55)