ESD7484 D

ESD7484
4-Line Ultra-Large
Bandwidth ESD Protection
Functional Description
The ESD7484 chip is a monolithic, application specific discrete
device dedicated to ESD protection of the HDMI connection. It also
offers the same high level of protection for IEEE 1394a and IEEE
1394b/c, USB2.0, Ethernet links, and video lines.
Its ultra high cutoff frequency (5.3 GHz) secures a high level of
signal integrity. The device topology provides this integrity without
compromising the complete protection of ICs against the most
stringent ESD strikes.
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MARKING
DIAGRAM
WLCSP10
CASE 567DE
Features
•
•
•
•
•
•
Wideband Performance
Flow−Through Layout
Low Profile with Small Footprint: 1.6 mm x 1.1 mm Package
0.4 mm Pitch WLCSP Package
IEC61000−4−2 Level 4 (At External Pins)
♦ ± 15 kV (Air Discharge)
♦ ± 15 kV (Contact Discharge)
These Devices are Pb−Free, Halogen Free and are RoHS II
Compliant
84
Y
W
G
84
YW
G
= Specific Device Code
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Applications
• Mobile Phones and Communications Systems
• HDMI Ports at 1.65 Gb/s and up to 3.2 Gb/s
• Video Out Protection
3
A
DOUT_1+
B
C
2
1
DIN_1+
GND
DIN_1−
DOUT_1−
External
(Connector)
Internal
(ASIC)
D
DOUT_2+
GND
E
F
DIN_2+
DOUT_2−
DIN_2−
Figure 1. Pin Configuration (Bump View)
© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 0
1
Publication Order Number:
ESD7484/D
ESD7484
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VPP
ESD IEC61000−4−2, level 4 – air discharge (external pins)
ESD IEC61000−4−2, level 4 – contact discharge (external pins)
PPP
Value
Unit
±15
±15
kV
Peak Pulse Power Dissipation (8/20 ms)
70
W
TJ
Maximum Junction Temperature
125
°C
Tstg
Storage Temperature Range
−55 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (Note 1)
Symbol
Test Condition
Max
Unit
9
V
3
100
nA
Vline = 0 V, Vosc = 30 mV, F = 1 MHz, Capacitor between I/O and GND
1.6
1.75
pF
Vline = 0 V, Vosc = 30 mV, F = 1 MHz, Capacitor between I/O
0.8
VBR
Breakdown Voltage (Ir = 1 mA)
IRM
Leakage Current @ Vrm (Vrm = 3 V per line)
Cline
DCI/O−I/O
Min
Typ
6
Vline = 0 V, Vosc = 30 mV, F = 1 MHz, Capacitance Variation between I/O
1. All parameters specified at TA = 25°C unless otherwise noted.
2. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W.
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2
0.006
pF
ESD7484
TYPICAL CHARACTERISTICS
Figure 2. HDMI1.4 Test Conditions
3.4 Gb/s Datarate;
Clears HDMI Source Mask
Figure 3. S21 Plot
Figure 4. Crosstalk Measurements
Figure 5. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 6. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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3
ESD7484
IEC61000−4−2 Waveform
IEC61000−4−2 Spec.
Ipeak
Level
Test
Voltage
(kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 7. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 8. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
% OF PEAK PULSE CURRENT
100
PEAK VALUE IRSM @ 8 ms
tr
90
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
0
20
40
t, TIME (ms)
60
Figure 9. 8 x 20 ms Pulse Waveform
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4
80
ESD7484
Figure 10. Positive TLP I−V Curve
Figure 11. Negative TLP I−V Curve
Transmission Line Pulse (TLP) Measurement
L
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 12. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 13 where an 8 kV IEC61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels. A typical TLP I−V
curve for the ESD7383 is shown in Figures 10 and 11.
50 W Coax
Cable
S Attenuator
÷
50 W Coax
Cable
10 MW
IM
VM
DUT
VC
Oscilloscope
Figure 12. Simplified Schematic of a Typical TLP
System
Figure 13. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP Waveforms
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5
ESD7484
TYPICAL APPLICATION SCHEMATIC
ESD7484
ESD7484
HDMI Type C
Connector
Data2 Shield 1
Data2 + 2
A3 A1 C3 C1 B2
A3 A1 C3 C1 B2
D3 D1 F3 F1 E2
D3 D1 F3 F1 E2
Data2 +
Data2 −
Data2 − 3
Data1 Shield 4
Data1 + 5
Data1 +
Data1 − 6
Data1 −
Data0 Shield 7
Data0 + 8
Data0 +
Data0 − 9
Data0 −
CLK Shield 10
CLK + 11
CLK +
CLK − 12
CLK −
DDC GROUND 13
CEC
CEC
14
SCL
15
SCL
SDA
16
SDA
+5 Power
Reserved 17
HPD
+5 Power 18
HPD
A1
19
C3
HPD
5V
B3
SDA
A3
SCL
A2
CEC
1.75KW
C1
5V
1.75KW
100KW
B1
VDD_CEC
27KW
B2, C2
ESD5384
Figure 14. Typical Application Schematic
ORDERING INFORMATION
Part Number
ESD7484
Chip Size (mm)
Pocket Size (mm)
B0 X A0 X K0
1.6 x 1.1 x 0.615
1.80 x 1.27 x 0.73
P0
P1
4 mm 4 mm
Package
Shipping†
WLCSP10
(Pb−Free)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
ESD7484
PACKAGE DIMENSIONS
WLCSP10, 1.60x1.10
CASE 567DE−01
ISSUE O
D
PIN A1
REFERENCE
2X
0.05 C
2X
0.05 C
A
È
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
eD
eE
TOP VIEW
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
NOTE 3
A1
SIDE VIEW
C
0.40
PITCH
SEATING
PLANE
eD/2
b
eE
0.05 C A B
0.03 C
0.20
PITCH
PACKAGE
OUTLINE
eD
10X
MILLIMETERS
MIN
MAX
0.57
0.63
0.17
0.24
0.41 REF
0.24
0.29
1.60 BSC
1.10 BSC
0.400 BSC
0.347 BSC
0.35
PITCH
1
A1
2
3
10X
0.25
DIMENSIONS: MILLIMETERS
AB C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
D E F
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Email: [email protected]
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Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ESD7484/D
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