INTERSIL ACS151K

ACS151MS
Radiation Hardened 8-Input Multiplexer
November 1997
Features
Description
• QML Qualified Per MIL-PRF-38535 Requirements
The Radiation Hardened ACS151MS is an 8-Channel Multiplexer having three binary control inputs and an active low
enable input. The three binary input signals select the input
from 1 of 8 channels.
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
Complementary data outputs are provided for ease of system
design. If the enable input is high, the input signals are disregarded, the Y output is set high and the Y output is set low. All
inputs and outputs are buffered and are designed for balanced
propagation delay and transition times.
• Input Logic Levels . . .VIL = (0.3)(VCC), VIH = (0.7)(VCC)
The ACS151MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±8mA
• Quiescent Supply Current. . . . . . . . . . . . . . . . . . .400µA
• Propagation Delay
- Enable to Output . . . . . . . . . . . . . . . . . . . . . . . . . 12ns
- Input or Address to Output . . . . . . . . . . . . . . . . . 20ns
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Applications
• Sensor Input Selection
Detailed Electrical Specifications for the ACS151 are
contained in SMD 5962-97640. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm
• Data Routing
• High Frequency Switching
Ordering Information
SMD PART NUMBER
TEMP. RANGE (oC)
INTERSIL PART NUMBER
5962F9764001VEC
ACS151DMSR-02
N/A
ACS151D/Sample-02
PACKAGE
CASE OUTLINE
-55 to 125
16 Ld SBDIP
CDIP2-T16
25
16 Ld SBDIP
CDIP2-T16
5962F9764001VXC
ACS151KMSR-02
-55 to 125
16 Ld Flatpack
CDFP4-F16
N/A
ACS151K/Sample-02
25
16 Ld Flatpack
CDFP4-F16
N/A
ACS151HMSR-02
25
Die
N/A
Pinouts
ACS151 (SBDIP)
TOP VIEW
ACS151 (FLATPACK)
TOP VIEW
I3 1
16 VCC
I3
1
16
VCC
I2 2
15 I4
I2
2
15
I4
I1 3
14 I5
I1
3
14
I5
I0 4
13 I6
I0
4
13
I6
Y 5
12 I7
Y
5
12
I7
11 S0
Y
6
11
S0
E
7
10
S1
GND
8
9
S2
Y 6
E 7
10 S1
GND 8
9 S2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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File Number
4430
ACS151MS
Die Characteristics
Unbiased Insulator
DIE DIMENSIONS:
BACKSIDE FINISH:
Size: 2390µm x 2390µm (94mils x 94mils)
Thickness: 525µm ±25µm (20.6mils ±1mil)
Bond Pad: 110µm x 110µm (4.3mils x 4.3 mils)
Sapphire
PASSIVATION:
METALLIZATION:
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm
Type: Al
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
SPECIAL INSTRUCTIONS
Bond VCC First
SUBSTRATE:
ADDITIONAL INFORMATION:
Silicon on Sapphire (SOS)
Worst Case Density: <2.0 x 105 A/cm2
Transistor Count: 166
SUBSTRATE POTENTIAL:
Metallization Mask Layout
ACS151MS
I2
I3
VCC
I4
I1
I5
I0
I6
Y
I7
Y
S0
E
GND
S2
S1
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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