Reference Board for CIPOS™ IGCM06B60xA (preliminary)

C o ntrol In t eg ra t ed P Owe r
Sys te m (C IPOS™)
Reference Board for IGCM06B60xA
AN-CIPOS mini-2-Reference Board-2
Authors: JunHo Song, JunBae Lee and DaeWoong Chung
Application Note,. Preliminary
For Power Management Application
1
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
Table of contents
1
Introduction............................................................................................................................................... 3
2
Schematic.................................................................................................................................................. 4
3
External Connection ................................................................................................................................ 5
3.1
Signal Connector (J1, 2.5mm pitch connector) .......................................................................................... 5
3.2
Power Connector ........................................................................................................................................ 5
4
Key Parameters Design Guide ................................................................................................................ 6
4.1
Circuit of Input Signals (LIN, HIN) .............................................................................................................. 6
4.2
Bootstrap Capacitor .................................................................................................................................... 6
4.3
Internal Bootstrap Functionality Characteristics ......................................................................................... 7
4.4
Over Current Protection ............................................................................................................................. 8
4.4.1
Shunt Resistor Selection ............................................................................................................................ 8
4.4.2
Delay Time ................................................................................................................................................. 9
4.5
Temperature Monitor and Protection ....................................................................................................... 10
5
Part list .................................................................................................................................................... 11
6
PCB Design Guide .................................................................................................................................. 12
6.1
Layout of Reference Board ...................................................................................................................... 12
7
Reference ................................................................................................................................................ 13
Application Note,. Preliminary
2
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
1
Introduction
This reference board is composed of the IGCM06B60xA, its minimum peripheral components and single shunt
resistor. It is designed for customers to evaluate the performance of CIPOSTM with simple connection of the
control signals and power wires. Figure 1 shows the external view of reference board.
This application note also describes how to design the key parameters and PCB layout.
Figure 1. Reference board for IGCM06B60xA
CIPOSTM mini Reference Board
Power
Connector
CIPOSTM
VS2
Power
Connectors
/
LO3
HO3
17
13
LO2
VS3
16
14
LO1
3~
15
VSS
12
18
11
Power
Connector
HO2
19
10
Thermistor
(IGCM06B60GA)
VS1
20
9
LIN3
HO1
21
8
LIN2
VB1
22
7
LIN1
VB2
23
6
HIN3
24
5
HIN2
VB3
25
4
HIN1
26
3
ITRIP
27
2
VFO
28
1
AC
VDD
Filters & Itrip, Fo & temperature
monitor circuits
Signal connector to controller
SMPS
Controller
Figure 2. Application example
Application Note,. Preliminary
3
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
2
Schematic
Figure 3 shows a circuitry of the reference board for IGCM06B60xA.
The reference board consists of interface circuit, bootstrap circuit, snubber capacitor, short-circuit protection,
fault output circuit and single shunt resistor.
CIPOSTM mini
NR (24)
(1) VS(U)
R
R (23)
(2) VB(U)
D1
C10
C7
R7
D2
R1 ~ R6
(1) UH
(2) VH
(3) WH
(4) UL
(5) VL
(6) WL
RBS1
C11
C8
VS1
S
S (22)
HO2
VB2
R8
RBS2
VS2
P
P (21)
(5) VS(W)
(6) VB(W)
D3
C12
C9
(7) /Fo
(7) HIN(U)
(8) HIN(V)
Vctr
(9) HIN(W)
(10) LIN(U)
Vctr
(11) LIN(V)
C13
VDD
R12
C14
(12) LIN(W)
R11
C19
(12) GND
(13) VDD
C16
VDD
(14) VFO
C18
(15) ITRIP
(16) VSS
C15
HO3
U
U (20)
RBS3
(8) Vsh
(10) Vctr
VB3
VS3
R9
C1 ~ C6
(11) VDD
HO1
(3) VS(V)
(4) VB(V)
J1
VB1
C17
C20
HIN1
V
V (19)
HIN3
LIN1
LIN2
LO2
W
W (18)
LIN3
VDD
VFO
ITRIP
VSS
Thermistor
(IGCM06B60GA)
R10
LO1
HIN2
LO3
N (17)
R13
N
Figure 3. Circuit of the reference board
Note: Vctr denotes the controller supply voltage such as 5V or 3.3V.
It is optional to use external bootstrap circuit together with internal one as shown in dot line, in case that
smaller bootstrap resistor is necessary.
Application Note,. Preliminary
4
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
3
External Connection
3.1
Signal Connector (J1, 2.5mm pitch connector)
3.2
Pin
Name
Description
1
HIN(U)
High side control signal input of U phase
2
HIN(V)
High side control signal input of V phase
3
HIN(W)
Low side control signal input of W phase
4
LIN(U)
Low side control signal input of U phase
5
LIN(V)
Low side control signal input of V phase
6
LIN(W)
Low side control signal input of W phase
7
/Fo
Fault output signal / Temperature monitor (IGCM06B60GA)
8
Vsh
Shunt voltage sensing signal
9
Vctr
External control voltage (5V or 3.3V)
10
VDD
External 15V supply voltage
11
GND
Ground
Power Connector
Pin
Description
U
Output terminal of U phase
V
Output terminal of V phase
W
Output terminal of W phase
P
Positive terminal of DC link voltage
N
Negative terminal of DC link voltage
R
Single phase diode bridge rectifier R input
S
Single phase diode bridge rectifier S input
Application Note,. Preliminary
5
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
4
Key Parameters Design Guide
4.1
Circuit of Input Signals (LIN, HIN)
The input signals can be either TTL- or CMOS-compatible. The logic levels can go down to 3.3V. The maximum
input voltage of the pins is internally clamped to 10.5V. However, the recommended voltage range of input
voltage is up to 5V. The control pins LIN and HIN are active high.
They have an internal pull-down structure with a pull-down resistor value of nominal 5kΩ. The input noise filter
inside CIPOSTM suppresses short pulse and prevents the driven IGBT from unintentional operation. The input
noise filter time (tFLIN) is typically 270ns. This means that an input signal must stay on more than 270ns so that
the input signal can be processed correctly. CIPOSTM can be connected directly to controller without external
input RC filter thanks to the internal pull down resistor and input noise filter as shown in Figure 4.
Controller
(MCU or DSP)
HINx
LINx
5kΩ
Vz=10.5V
Input
Noise
Filter
tFILIN=270ns
Figure 4. Filter of input signals and pull-down circuit
4.2
Bootstrap Capacitor
Bootstrapping is a common method of pumping charges from a low potential to a higher one. With this technique
a supply voltage for the floating high side sections of the gate drive can be easily established according to Figure
5. It is only the effective circuit shown for one of the three half bridges. The bootstrap functionality is composed
internally to limit current. Please refer to the datasheet and application note for bootstrapping method in detail.
P
VDD
CDD
VB
HO
Gate
VS
Drive
IC
LO
VBS
CBS
VSS
Figure 5. Bootstrap circuit for the supply of a high side gate drive
Application Note,. Preliminary
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Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
A low leakage current of the high side section is very important in order to keep the bootstrap capacitors small.
The CBS discharges mainly by the following mechanisms:
- Quiescent current to the high side circuit in the IC
- Gate charge for turning high side IGBT on
- Level-shift charge required by level shifters in the IC
- Leakage current in the bootstrap diode
- CBS capacitor leakage current (ignored for non-electrolytic capacitor)
- Bootstrap diode reverse recovery charge
The calculation of the bootstrap capacitor results in
C BS =
I leak × t P
ΔVBS
with Ileak being the maximum discharge current of CBS, tP the maximum on pulse width of high side IGBT and ∆
VBS the voltage drop at the bootstrap capacitor within a switching period.
Practically, the recommended leakage current is 1mA of Ileak for CIPOSTM.
Figure 6 shows the curve corresponding to above equation for a continuous sinusoidal modulation, if the voltage
ripple ∆ VBS is 0.1V. The recommended bootstrap capacitance for a continuous sinusoidal modulation method is
therefore in the range up to 4.7µF for most switching frequencies. In other PWM method case like a
discontinuous sinusoidal modulation, tP must be set the longest period of the low side IGBT off.
5
CBS [uF]
4
3
2
1
0
0
5
10
15
20
fPWM [kHz]
Figure 6. Size of the bootstrap capacitor as a function of the switching frequency fPWM
4.3
Internal Bootstrap Functionality Characteristics
CIPOSTM includes three bootstrap functionalities in internal drive IC, which consist of three diodes and three
resistors, as shown in Figure 5. Typical value of internal bootstrap resistor is 40Ω. For more information, please
refer to the below table. It’s noted that RBS2 and RBS3 have same value to RBS1.
Description
Condition
Repetitive peak
reverse voltage
Bootstrap resistance of
U-phase
VS2 or VS3=300V, TJ = 25°C
VS2 and VS3=0V, TJ = 25°C
VS2 or VS3=300V, TJ = 125°C
VS2 and VS3=0V, TJ = 125°C
Reverse recovery
Forward voltage drop
Symbol
Min.
VRRM
600
Typ.
Max.
Unit
V
RBS1
35
40
50
65
Ω
IF = 0.6A, di/d t= 80A/µs
trr_BS
50
ns
IF = 20mA, VS2 and VS3 = 0V
VF_BS
2.6
V
Application Note,. Preliminary
7
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
4.4
Over Current Protection
The OC (Over Current) protection level is decided by ITRIP positive going threshold voltage VIT,TH+ in CIPOSTM
and shunt resistance. When ITRIP voltage exceeds VIT,TH+, CIPOSTM turns off 6 IGBTs and fault-output is
activated during fault-output duration time, typically 65us.
SC
OC
Low Side IGBT
Collector Current
RC circuit time
constant delay
Sensing Voltage
of the shunt resistor
SC Reference Voltage
tITRIP
tITRIP
CIPOSTM
All IGBTs
don’t operate
Fault Output Signal
Typ. 65ms
All IGBTs
operate normally
All IGBTs
don’t operate
Typ. 65ms
Figure 7. Timing chart of OC protection
4.4.1
Shunt Resistor Selection
The value of shunt resistor is calculated by the following equation.
R SH =
VIT, TH +
I OC
Where VIT,TH+ is the ITRIP positive going threshold voltage of CIPOSTM and IOC is the current of SC detection
level. VIT,TH+ is 0.47Vtyp..
The maximum value of OC protection level should be set less than the repetitive peak collector current in the
datasheet considering the tolerance of shunt resistor.
For example, the maximum peak collector current of IGCM06B60xA is 12Apeak,
R SH(min) =
Application Note,. Preliminary
0.47
= 0.0392Ω
12
8
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
So the recommended value of shunt resistor is over 40mΩ for IGCM06B60xA.
For the power rating of the shunt resistor, the below lists should be considered.
- Maximum load current of inverter (Irms)
- Shunt resistor value at Tc = 25°C (RSH)
- Power derating ratio of shunt resistor at TSH = 100°C
- Safety margin
And the power rating is calculated by following equation.
PSH =
I rms 2 R SH × marigin
Derating ratio
For example, In case of IGCM06B60xA and RSH = 40mΩ
- Max. load current of inverter: 4Arms
- Power derating ratio of shunt resistor at TSH = 100°C : 80%
- Safety margin: 30%
4 2 × 0.04 × 1.3
= 1.0W
0.8
So the proper power rating of shunt resistor is over 1W.
Based on the previous equations, conditions and calculation method, minimum shunt resistance and resistor
power according to all kinds of IGCM06B60xA products are introduced as shown in below table. It’s noted that a
proper resistance and its power over than minimum values should be chosen considering over-current protection
level required in the application set.
PSH =
Product
Maximum Peak
Current
Minimum Shunt Resistance,
RSH
Minimum Shunt Resistor
Power, PSH
IGCM06B60xA
12
40mΩ
1W
4.4.2
Delay Time
The RC filter should be necessary in OC sensing circuit to prevent malfunction of OC protection from noise
interference. The RC time constant is determined by applying time of noise and the withstand time capability of
IGBT. When the current on shunt resistor exceeds OC protection level (IOC), this voltage is applied to the ITRIP
pin of CIPOSTM via the RC filter. The filter delay time (tFilter) that the input voltage of ITRIP pin rises to the ITRIP
positive threshold voltage is caused by RC filter time constant. In addition there is the shutdown propagation
delay of Itrip (tITRIP). Please refer to the below table.
Item
Shut down
propagation delay
(tITRIP)
IGCM06x60xA
Condition
Iout =4A, from VIT,TH+to 10% Iout
Min.
Typ.
Max.
Unit
-
1300
-
ns
Therefore, the total delay time from occurrence of OC to shutdown of the IGBT gate becomes
t total = t Filter + t ITRIP
Shut down propagation delay is in inverse proportion to the current range, therefore tITRIP is reduced at higher
current condition than condition of table 14. The total delay must be less than 5ms of short circuit withstand time
(tSC) in datasheet. Thus, RC time constant should be set in the range of 1~2µs. It is recommended that R10 of
1.8kΩ and C17 of 1nF.
Application Note,. Preliminary
9
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
4.5
Temperature Monitor and Protection
In case of IGCM06B60GA, built-in thermistor (85kΩ at 25°C) is connected between VFO and VSS. The typical
application circuit is like Figure 8 where the VFO pin is used for both thermistor temperature detection and fault
detection. The voltage of VFO pin decreases as the thermistor temperature increases due to external pull-up
resistor. It is noted that the voltage variation of VFO pin due to temperature variation should be always higher
than the fault detection level of micro controller. In this reference board, the pull-up resistor is set to 3.6kΩ so
that the VFO voltage becomes 2.95V and 1.95V respectively for 5V and 3.3V control voltage (Vctr) when the
temperature of thermistor is 100°C as shown in Figure 9.
CIPOSTM IGCM06B60GA
Vctr
Drive IC
R11=3.6kΩ
Micro Controller
VFO
Input to AD
Converter
VFO
Thermistor
VSS
Input to Fault
Detection
Figure 8. Temperature monitor with built in thermistor and pull up resistor
5.0
Vctr=5V
Vctr=3.3V
4.5
4.0
VFO [ V ]
3.5
3.0
2.5
OT set 100¡É : 2.95V at Vctr=5V
2.0
OT set 100¡É : 1.95V at Vctr=3.3V
1.5
1.0
0.5
0.0
0
10
20
30
40
50
60
70
80
90
o
100
Thermistor temperature [ C ]
110
120
Figure 9. Voltage of VFO according to the temperature
Application Note,. Preliminary
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Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
5
Part list
Symbol
Components
Note
R1 ~ R6
100Ω, 1/8W, 5%
R7 ~ R9
No Connection
R10
1.8kΩ, 1/8W, 1%
Series resistor for current sensing voltage
R11
3.6kΩ, 1/8W, 1%
Pull-up resistor for fault output voltage
R12
1kΩ, 1/8W, 5%
Series resistor for fault output voltage
R13
Content 4.4.1
C1 ~ C6
1nF, 25V
C7 ~ C9
0.1uF, 25V
Bypass capacitors for high side bias voltage
C10 ~ C12
22uF, 35V
Bootstrap capacitors
C13
100uF, 35V
Source capacitor for 5 or 3.3V supply voltage
C14
0.1uF, 35V
Bypass capacitor for 5 or 3.3V supply voltage
C15
220uF, 35V
Source capacitor for VDD supply voltage
C16
0.1uF, 35V
Bypass capacitor for VDD supply voltage
C17
1nF, 25V
Bypass capacitor for current sensing voltage
C18
1nF, 16V
Bypass capacitor for fault output voltage
C19
1nF, 16V
Bypass capacitor for fault output voltage
C20
0.1uF, 630V
D1 ~ D3
No Connection
Note 1
J1
SMW250-11P
Signal & Power supply connector
U, V, W, P, N R, S
Fasten Tap
Series resistors for input voltage
Note 1
Current sensing resistor
Bypass capacitors for input voltage
Snubber capacitor
Power terminals
Note 1: It is optional to use external bootstrap circuit together with internal one, in case that smaller
bootstrap resistor is necessary.
Application Note,. Preliminary
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Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
6
PCB Design Guide
In general, there are several issues to be considered when designing an inverter board as below lists.
- Low stray inductive connection
- Isolation distance
- Component placement
This chapter explains above considerations and method for the layout design.
6.1
Layout of Reference Board
Figure 10. Layout of reference board for IGCM06B60xA
Note.
2. The connection between emitters of CIPOSTM (N) and shunt resistor should be as short and as wide as
possible.
3. It is recommended that ground pin of micro-controller be directly connected to VSS pin. Signal ground and
power ground should be as short as possible and connected at only one point via the capacitor (C16).
4. All of the bypass capacitors should be placed as close to the pins of CIPOSTM as possible.
5. The capacitor (C17) for shunt voltage sensing should be placed as close to ITRIP and VSS pins as possible.
6. In order to detect sensing voltage of the shunt resistor exactly, both sensing and ground patterns should be
connected at pins of the shunt resistor and should not be overlapped with any patterns for load current as
shown in Figure 10.
7. The snubber capacitor (C19) should be placed as close to the terminals as possible.
8. The power patterns of U, V, W, P,N,R and S should be designed on both layer with via to cover the high
current and there should be kept the isolation distance among the power patterns over 2.54mm.
9. There are milling profiles in blue line to keep the isolation distance
10. All components except IGCM06B60xA are placed on the top layer.
Application Note,. Preliminary
12
Ver. 0.4, 2010-06-01
Control Integrated POwer System (CIPOS™)
Reference Board for CIPOS™ IGCM06B60xA
7
[1]
Reference
LS Power Semitech: CIPOSTM IGCM06B60HA; Preliminary Datasheet Ver. 0.2; LS Power Semitech,
2010
Revision History
Previous Version:
Ver. 0.3
Major changes since the last revision
Page or Reference
Description of change
Application Note,. Preliminary
13
Ver. 0.4, 2010-06-01
Trademarks of Infineon Technologies AG
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HybridPACK™, ISOFACE™, IsoPACK™, i-Wafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™,
POWERCODE™, PRIMARION™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™,
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