CD4532BMS CMOS 8-Bit Priority Encoder December 1992 Features Pinout • High Voltage Type (20V Rating) CD4532BMS TOP VIEW • Converts From 1 of 8 to Binary • Provides Cascading Feature to Handle Any Number of Inputs D4 1 16 VDD D5 2 15 E0 • Group Select Indicates One or More Priority Inputs D6 3 14 GS • Standardized Symmetrical Output Characteristics D7 4 13 D3 EI 5 12 D2 • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC Q2 6 11 D1 Q1 7 10 D0 • Noise Margin (Over Full Package/Temperature Range) - 0.5V at VDD = 5V - 1.5V at VDD = 10V - 1.5V at VDD = 15V VSS 8 9 Q0 • 100% Tested for Quiescent Current at 20V Functional Diagram • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” D7 Q2 PRIORITY SELECT Q1 ENCODER Q0 Applications • Priority Encoder D0 E0 • Binary or BCD Encoder (Keyboard Encoding) • Floating Point Arithmetic E1 GS Description CD4532BMS consists of combinational logic that encodes the highest priority input (D7 - D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input E1 is low. When E1 is high, the binary representation of the highestpriority input appears on output lines Q2 - Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (EO) is high when no priority inputs are present. If any one input is high, EO is low and all cascaded lower-order stages are disabled. The CD4532BMS is supplied in these 16-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4T H1E H6W CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 7-1227 File Number 3344 Specifications CD4532BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W Maximum Package Power Dissipation (PD) at +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K). . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 VDD = 18V Output Voltage Output Voltage VOL15 VOH15 VDD = 15V, No Load VDD = 15V, No Load (Note 3) LIMITS GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC - 10 µA 2 +125oC - 1000 µA 3 -55oC - 10 µA 1 +25oC -100 - nA 2 +125oC -1000 - nA 3 -55oC -100 - nA 1 +25oC - 100 nA 2 +125oC - 1000 nA 3 -55oC - 100 nA 1, 2, 3 +25oC, +125oC, -55oC - 50 mV 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA 1 +25oC 3.5 - mA 1 +25oC - -0.53 mA Output Current (Sink) Output Current (Source) IOL15 IOH5A VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA 1 +25oC - -3.5 mA 1 +25oC -2.8 -0.7 V VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V VDD = 2.8V, VIN = VDD or GND 7 +25oC VDD = 20V, VIN = VDD or GND 7 +25oC VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC Output Current (Source) N Threshold Voltage P Threshold Voltage Functional IOH15 VNTH VPTH F VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VOH > VOL < VDD/2 VDD/2 V Input Voltage Low (Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V Input Voltage High (Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V Input Voltage Low (Note 2) VIL VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 4 V Input Voltage High (Note 2) VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 11 - V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 7-1228 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. Specifications CD4532BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay E1 to E0 E1 to GS SYMBOL CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND TPHL1 TPLH1 9 10, 11 Propagation Delay E1 to QM DN to GS TPHL2 TPLH2 Propagation Delay DN to QM TPHL3 TPLH3 VDD = 5V, VIN = VDD or GND TTHL TTLH VDD = 5V, VIN = VDD or GND Transition Time GROUP A SUBGROUPS TEMPERATURE VDD = 5V, VIN = VDD or GND 9 +25oC +125oC, -55oC +25oC o o LIMITS MIN MAX UNITS - 220 ns - 297 ns - 340 ns 10, 11 +125 C, -55 C - 459 ns 9 +25oC - 440 ns - 594 ns - 200 ns - 270 ns 10, 11 9 10, 11 +125oC, -55oC +25oC +125oC, -55oC NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS NOTES VDD = 5V, VIN = VDD or GND VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND Output Voltage VOL VDD = 5V, No Load 1, 2 1, 2 1, 2 1, 2 TEMPERATURE -55oC, +25oC MIN MAX UNITS µA - 5 +125oC - 150 µA -55oC, +25oC - 10 µA +125oC - 300 µA - 10 µA +125oC - 600 µA +25oC, +125oC, - 50 mV -55oC, +25oC -55oC Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC 4.95 - V Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC 9.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA -55oC 0.64 - mA Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Input Voltage Low IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VIL VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V 1, 2 1, 2 1, 2 VDD = 5V, VOUT = 2.5V 1, 2 VDD = 10V, VOUT = 9.5V VDD =15V, VOUT = 13.5V VDD = 10V, VOH > 9V, VOL < 1V 1, 2 1, 2 1, 2 +125oC 0.9 - mA -55oC 1.6 - mA +125oC 2.4 - mA -55oC 4.2 - mA +125oC - -0.36 mA -55oC - -0.64 mA +125oC - -1.15 mA -55oC - -2.0 mA +125oC - -0.9 mA -55oC - -1.6 mA +125oC - -2.4 mA -55oC - -4.2 mA +25oC, +125oC, - 3 V -55oC 7-1229 Specifications CD4532BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Voltage High SYMBOL VIH CONDITIONS VDD = 10V, VOH > 9V, VOL < 1V NOTES TEMPERATURE MIN MAX UNITS 1, 2 +25oC, +125oC, +7 - V -55oC Propagation Delay E1 to E0 E1 to GS TPHL1 TPLH1 Propagation Delay E1 to QM DN to GS TPHL2 TPLH2 Propagation Delay DN to QM TPLH3 TPHL3 Transition Time Input Capacitance 1, 2, 3 +25oC - 110 ns VDD = 15V 1, 2, 3 +25o C - 85 ns VDD = 10V 1, 2, 3 +25oC - 170 ns VDD = 15V 1, 2, 3 +25oC - 125 ns VDD = 10V 1, 2, 3 +25oC - 220 ns 1, 2, 3 +25 oC - 160 ns VDD = 10V 1, 2, 3 +25oC - 100 ns VDD = 15V 1, 2, 3 +25oC - 80 ns - 7.5 pF VDD = 10V VDD = 15V TTHL TTLH CIN Any Input o 1, 2 +25 C NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 20V, VIN = VDD or GND NOTES TEMPERATURE MIN MAX UNITS 1, 4 +25oC - 25 µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V N Threshold Voltage Delta ∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC - ±1 V P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC - ±1 V 1 +25oC VOH > VDD/2 VOL < VDD/2 V 1, 2, 3, 4 +25oC - 1.35 x +25oC Limit ns Functional F VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 3. See Table 2 for +25oC limit. NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-2 IDD ± 1.0µA Output Current (Sink) IOL5 ± 20% x Pre-Test Reading IOH5A ± 20% x Pre-Test Reading Output Current (Source) 7-1230 Specifications CD4532BMS TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD GROUP A SUBGROUPS Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A 100% 5004 1, 7, 9, Deltas 100% 5004 1, 7, 9 100% 5004 1, 7, 9, Deltas CONFORMANCE GROUP PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test IDD, IOL5, IOH5A 100% 5004 2, 3, 8A, 8B, 10, 11 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample 5005 1, 7, 9 Sample 5005 1, 2, 3, 8A, 8B, 9 Group A Group B READ AND RECORD Group D Subgroups 1, 2, 3, 9, 10, 11 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS TEST READ AND RECORD MIL-STD-883 METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD 5005 1, 7, 9 Table 4 1, 9 Table 4 Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD Static Burn-In 1 (Note 1) 6, 7, 9, 14, 15 1 - 5, 8, 10 - 13 16 Static Burn-In 2 (Note 1) 6, 7, 9, 14, 15 8 1 - 5, 10 - 13, 16 Dynamic BurnIn (Note 1) - 8 5, 16 6, 7, 9, 14, 15 8 1 - 5, 10 - 13, 16 Irradiation (Note 2) 9V ± -0.5V 50kHz 6, 7, 9, 14, 15 1 - 4, 10 - 13 25kHz NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 1231 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 CD4532BMS Logic Diagram * * D1 VDD 11 16 D2 Q0 12 9 D3 * 13 D4 * Q1 1 7 D5 * 2 Q2 D6 * 6 3 D7 * 4 GS 14 D0 * E0 10 15 EI * VSS 5 8 VDD *ALL INPUTS PROTECTED BY CMOS PROTECTION NETWORK VSS FIGURE 1. CD4532BMS LOGIC DIAGRAM TRUTH TABLE INPUT OUTPUT E1 D7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0 E0 0 X X X X X X X X 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 X X X X X X X 1 1 1 1 0 1 0 1 X X X X X X 1 1 1 0 0 1 0 0 1 X X X X X 1 1 0 1 0 1 0 0 0 1 X X X X 1 1 0 0 0 1 0 0 0 0 1 X X X 1 0 1 1 0 1 0 0 0 0 0 1 X X 1 0 1 0 0 1 0 0 0 0 0 0 1 X 1 0 0 1 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 X = Don’t Care Logic 1 ≡ High Logic 0 ≡ Low 7-1232 CD4532BMS AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 20 15 10V 10 5 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -5V -10 -15 -20 -25 -15V -30 PROPAGATION DELAY TIME (tPHL, tPLH) (ns) PROPAGATION DELAY TIME (tPHL, tPLH) (ns) 100 12.5 15 17.5 0 0 -10 -15 FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 200 10 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15V 300 7.5 5V -10V 400 5 2.5 -5 500 2.5 5.0 GATE-TO-SOURCE VOLTAGE (VGS) = -5V AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF 0 10V 7.5 AMBIENT TEMPERATURE (TA) = +25oC FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 600 10.0 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 0 -5 -10V GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 0 AMBIENT TEMPERATURE (TA) = +25oC 15.0 0 FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 30 OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) Typical Performance Characteristics 20 AMBIENT TEMPERATURE (TA) = +25oC 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 50 15V 0 10 SUPPLY VOLTAGE (VDD) (V) FIGURE 6. TYPICAL PROPAGATION DELAY (DN TO QM ) vs SUPPLY VOLTAGE 20 30 40 50 60 70 80 LOAD CAPACITANCE (CL) (pF) 90 FIGURE 7. TYPICAL PROPAGATION DELAY (E1 TO GS, E1 TO EQ) vs LOAD CAPACITANCE 7-1233 100 CD4532BMS (Continued) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC TRANSITION TIME (tTHL, tTLH) (ns) PROPAGATION DELAY TIME (tPLH, tPHL) (ns) Typical Performance Characteristics 300 SUPPLY VOLTAGE (VDD) = 5V 250 200 10V 150 100 15V 50 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 15V 50 0 10 20 30 40 50 60 70 80 LOAD CAPACITANCE (CL) (pF) 90 0 0 100 FIGURE 8. TYPICAL PROPAGATION DELAY (DN TO QM) vs LOAD CAPACITANCE DYNAMIC POWER DISSIPATION (PD) (µW) 105 8 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 9. TYPICAL TRANSITION TIME vs LOAD CPACITANCE AMBIENT TEMPERATURE (TA) = +25oC 6 4 2 104 8 6 4 2 3 10 8 6 4 2 SUPPLY VOLTAGE (VDD) = 15V LOAD CAPACITANCE (CL) = 50pF 102 8 6 4 2 10V 50pF 10V 15pF 10 8 1 6 4 2 5V 50pF 2 4 68 2 4 6 8 2 2 4 6 8 10 102 FREQUENCY (f) (kHz) 1 103 4 6 8 104 FIGURE 10. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY Applications EI D8 5 EI 4 D7 3 2 1 13 12 11 10 D0 GS CD4532BMS D15 Q2 Q1 Q0 E0 14 6 7 9 Q3’ 15 CD4071BMS 1 2 D0 5 4 EI 3 D7 2 1 13 12 11 10 D0 GS CD4532BMS D7 Q2 Q1 Q0 E0 3 GS’ 4 Q2’ 14 5 6 6 7 8 9 10 Q1’ 12 13 11 Q0’ 9 15 E0’ FIGURE 11. 16-LEVEL PRIORITY ENCODER 7-1234 CD4532BMS Applications (Continued) 1/4 CD4071BMS D9 D8 Q3’ 1/6 CD4069BMS CD4532BMS EI D7 D7 GS Q2 Q2’ Q1 D0 D0 1/4 CD4071BMS Q1’ Q0’ Q0 FIGURE 12. 0-TO-9 KEYBOARD ENCODER TRUTH TABLE INPUT OUTPUT D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 GS Q3’ Q2’ Q1’ Q0’ 1 X X X X X X X X X 0 1 0 0 1 0 1 X X X X X X X X 0 1 0 0 0 0 0 1 X X X X X X X 1 0 1 1 1 0 0 0 1 X X X X X X 1 0 1 1 0 0 0 0 0 1 X X X X X 1 0 1 0 1 0 0 0 0 0 1 X X X X 1 0 1 0 0 0 0 0 0 0 0 1 X X X 1 0 0 1 1 0 0 0 0 0 0 0 1 X X 1 0 0 1 0 0 0 0 0 0 0 0 0 1 X 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 X = Don’t Care Logic 1 ≡ High Logic 0 ≡ Low Chip Dimensions and Pad Layout METALLIZATION: PASSIVATION: Thickness: 11kÅ − 14kÅ, AL. 10.4kÅ - 15.6kÅ, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). 7-1235