an1824

Application Note 1824
Author: Kiran Bernard
ISL70444SEHEVAL1Z Evaluation Board User’s Guide
Introduction
Power Supply Connections
The ISL70444SEHEVAL1Z evaluation platform is designed to
evaluate the ISL70444SEH. The ISL70444SEH contains four
high speed and low power op amps designed to take advantage
of its full dynamic input and output voltage range with rail-to-rail
operation. By offering low power, low offset voltage, and low
temperature drift coupled with its high bandwidth and
enhanced slew rates upwards of 50V/µs, these op amps make
it ideal for applications requiring both high DC accuracy and AC
performance. This amplifier is designed to operate over a
single supply range of 2.7V to 40V or a split supply voltage
range of ±1.35V to ±20V. The ISL70444SEH is manufactured
in Intersil’s PR40, silicon on insulator, BiCMOS process. This
process assures the device is immune to a single event
latch-up and provides excellent radiation tolerance. This
makes it the ideal choice for high reliability applications in
harsh radiation-prone environments.
J3
V-
C2
R44
R1
C26
1µF
0Ω
0Ω
1µF
D2
R37
0Ω
V+
V- AND V+
IC SUPPLY PINS
J1
D1
J4
VREF
GND
J2
R48
0Ω
V-
V+
C1
0.01µF
C4
0.1µF
C5
0.01µF
C3
0.1µF
FIGURE 1. POWER SUPPLY CIRCUIT
Reference Documents
Figure 1 demonstrates the power supply connections,
decoupling and protection circuitry. External power
connections are made through the V+, V-, VREF, and GND
banana jack connections on the evaluation board. De-coupling
capacitors C2 and C26 provide low-frequency power-supply
filtering, while additional capacitors (C1, C3, C4 and C5,
connected close to the part) filter out high frequency noise,
and are connected to their respective supplies through R37
and R48 resistors. These resistors are 0Ω but can be changed
by the user to provide additional power supply filtering, or to
reduce the supply voltage rate-of-rise time. Anti-reverse diodes
D1 and D2 protect the circuit in case of momentarily reversing
the power supplies accidentally to the evaluation board. The
VREF pin can be connected to ground to establish a ground
referenced input for split supply operation.
• ISL70444SEH Data Sheet FN8411
• ISL70444SEH SMD 5962-13214
• ISL70444SEH Radiation Test Report
Evaluation Board Key Features
• Single or dual supply operation: ±1.35V to ±20V or 2.7V to
40V
• Singled-ended or differential input operation with gain
(G = 10V/V)
• External VREF input
• Banana Jack connectors for power supply and VREF inputs
• BNC connectors for op amp input and output terminals
• Convenient PCB pads for op amp input/output impedance
loading
R39, R47, R49, R50
R14, R16,
R18, R40
IN-
10kΩ
R5, R7,
R9, R35
IN+
IN+
IN-A
IN-B
IN-C
IN-D
2
6
9
13
IN+A
IN+B
IN+C
IN+D
3
5
10
12
10kΩ
100kΩ
4
-
V+
0Ω
ISL70444SEH
+
11
V-
OUT_A
OUT_B
OUT_C
OUT_D
R32
100kΩ
VCM
OUT
1 R51 TO R54
7
8
14
R67 TO R70
OPEN
VREF
VREF
GND
R33
OPEN
FIGURE 2. BASIC DIFFERENTIAL AMPLIFIER CONFIGURATION
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
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Application Note 1824
Amplifier Configuration
10kΩ
100kΩ
DNP
0Ω
R20
R6
R11
C23
OPEN
R39
DNP
DNP
C6
OPEN
R14
(EQ. 1)
A voltage divider can be added to establish a power
supply-tracking common mode reference using the VREF input.
The inverting and non-inverting inputs have additional resistor
and capacitor placements for adding input attenuation or
feedback capacitors (Figure 3).
TO IN+A
R21
0Ω
DNP
R15
OPEN
FIGURE 3. INPUT STAGE
J13 OUT A
R67
0Ω
DNP
R63
0Ω
DNP
R51
OPEN DNP
R59
OUT_A
R55
Component pads are included to enable a variety of
user-selectable circuits to be added to the amplifier inputs, the
VREF input, outputs and the amplifier feedback loops.
R5
10kΩ
C7
C15
User-selectable Options
IN+A
OPEN
For a single-ended input with an inverting gain G = -10V/V, the
IN+ input is grounded and the signal is supplied to the IN- input.
VREF must be connected to a reference voltage between the
V+ and V- supply rails. For a non-inverting operation with
G = 11V/V, the negative input (IN-) is grounded and the signal is
supplied to the positive input (IN+). The non-inverting gain is
strongly dependent on any resistance from IN- to GND. For good
gain accuracy, a 0Ω resistor should be installed on the empty
R11 pad.
FROM OUT_A
TO IN-A
C14
V OUT = ( V IN+ – V IN- ) • ( R F ⁄ R IN ) + V REF
IN-A
R2
A simplified schematic of the evaluation board is shown in
Figure 2. The input stage with the components supplied is shown
in Figure 3. The circuit implements a Hi-Z differential input with
unbalanced common mode impedance. The differential
amplifier gain is expressed in Equation 1:
FIGURE 4. OUTPUT STAGE
The outputs (Figure 4) also have additional resistor and capacitor
placements for filtering and loading.
Note: Operational amplifiers are sensitive to output capacitance
and may oscillate. In the event of oscillation, reduce output
capacitance by using shorter cables, or add a resistor in series
with the output.
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Application Note 1824
TABLE 1. ISL70444SEHEVAL1Z COMPONENTS PARTS LIST
DEVICE #
DESCRIPTION
COMMENTS
C1, C5
CAP, SMD, 0805, 0.01µF, 50V, 10%, X7R, ROHS
Power Supply Decoupling
C2, C26
CAP, SMD, 1210, 1µF, 50V, 10%, X7R, ROHS
Power Supply Decoupling
C3, C4
CAP, SMD, 0805, 0.1µF, 25V, 10%, X7R, ROHS
Power Supply Decoupling
CAP, SMD, 0603, Open-Place Holder, ROHS
User Selectable Capacitors - Not Populated
D1, D2
40V Schottky Barrier Diode
Reverse Power Protection
J1 - J4
Johnson Components Standard Type Banana Jack, 108-0740-001
Power Supply and Reference Voltage Connector
J5 - J16
AMPHENOL BNC Connector, 31-5329-52RFX
Connections for Input and Output
Resistor, SMD, 0603, 100kΩ, 1%, ROHS
VREF Resistor Divider
R5, R7, R9, R14, R16, R18,
R35, R40
Resistor, SMD, 0603, 10kΩ, 1%, 1/16W, ROHS
Gain Setting Resistor
R39, R47, R49, R50
Resistor, SMD, 0603, 100kΩ, 1%, 1/16W, ROHS
Gain Setting Feedback Resistor
Resistor, SMD, 0603, DNP-Place Holder, ROHS
User Selectable Resistors - Not Populated
C6 - C25
R32
R2, R3, R4, R11, R12, R13,
R20, R21, R22, R23, R25,
R26, R28, R30, R31, R33,
R34, R38, R42, R43, R46,
R55, R56, R57, R58, R59,
R60, R61, R62, R62, R67,
R68, R69, R70
U1
ISL70444SEH, 40V Radiation Hardened, Low Noise Quad Operational
Amplifier
VIN: 25mVP-P
C1: 10mV/DIV
C2: 10mV/DIV
T: 1µs/DIV
CL = 20pF
VIN
VOUT
VIN
VIN: 10VP-P
C1: 5V/DIV
C2: 5V/DIV
T: 1µs/DIV
CL = 20pF
VOUT
FIGURE 5. SMALL SIGNAL STEP RESPONSE (±18V)
3
FIGURE 6. LARGE SIGNAL STEP RESPONSE (±18V)
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Application Note 1824
VIN: 25mVP-P
C1: 10mV/DIV
C2: 10mV/DIV
T: 1µs/DIV
CL = 20pF
VIN
VIN: 2.5VP-P
C1: 1.26V/DIV
C2: 1.26V/DIV
T: 1µs/DIV
CL = 20pF
VIN
VOUT
VOUT
FIGURE 7. SMALL SIGNAL STEP RESPONSE (±2.5V)
FIGURE 8. LARGE SIGNAL STEP RESPONSE (±2.5V)
10
10
12pF
0
GAIN (dB)
-20
-40
-10
27pF
68pF
ACL = 1
47pF
RL = 10kΩ
1k
-20
68pF
10k
100k
1M
FREQUENCY (Hz)
10M
ACL = 1
RL = 10kΩ
-40
VS = ±18V
-50
100
27pF
-30
47pF
VS = ±2.5V
-50
100
100M
FIGURE 9. (V S = ±18V) UNITY GAIN RESPONSE vs CL
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M FIGURE 10. (V S = ±2.5V) UNITY GAIN RESPONSE vs CL
10
0
12pF
27pF
-10
GAIN (dB)
GAIN (dB)
-10
-30
12pF
0
-20
68pF
-30
-40
-50
100
ACL = 1
RL = 10kΩ
VS = ±1.5V
1k
47pF
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 11. (V S = ±1.5V) UNITY GAIN RESPONSE vs CL
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Application Note 1824
ISL70444SEHEVAL1Z Layout
FIGURE 12. TOP VIEW
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Application Note 1824
ISL70444SEHEVAL1Z Layout (Continued)
FIGURE 13. TOP LAYER
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Application Note 1824
ISL70444SEHEVAL1Z Layout (Continued)
FIGURE 14. BOTTOM LAYER
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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C12
R46
0
OPEN
DNP
R42
R36
J11
DNP
IN-
10K
R38
DNP
IN-D
RREFA-
RINA2DNP
R31
D
C11
OPEN
RINA+
0
R19
IN+C
0
DNP
10K
IN1+
RGA+
RREFA+
RINA1+
R35
J12
10K
1
C13
OPEN
R45
RINA+
2
0
R41
IN+D
0
R43
R29
R9
DNP
RREFA+
R26
J10
RINA1+
R60
R61
C25
OUT
J16
OUT
DNP
R67
J15
RGA+
DNP
R69
R50
R54
R66
100K
0
0
R70
DNP
OPEN
C20
R40
8
0
R62
DNP
R23
OPEN
OUT 3
IN+C
IN-C
OUTC
R65
0
DNP
OUT 2
10
9
R53
R57
7
+IN3
-IN3
R49
100K
C19
-IN2
VM
OPEN
+IN2
6
IN
DNP
5
13
R58
11
RINAIN-C
C
IN1+
V-
ISL70444SEH
RREFAR25
0
DNP
C10
R13
DNP
R4
R10
RINA2-
V+
RGA+
RINA-
10K
IN-
12
4
IN+B
0
R18
J9
+IN4
OPEN
C21
R17
OPEN
+IN1
0
RINA+
C9
R34
10K
-IN1
3
C24
OUTD
IN-D
IN+D
OPEN
RREFA+
R27
R7
2
DNP
RINA1+
J8
DNP
IN1+
IN+B
IN-B
OUTB
14
OUT 4
-IN4
C18
B
IN
OUT 1
OPEN
VP
1
OPEN
DNP
DNP
OPEN
R22
0
DNP
C8
R12
R3
OUTA
IN-A
IN+A
R30
R8
DNP
J7
IN-
U1
IN-B
OUT
DNP
0
R68
OPEN
R64
0
DNP
100K
R52
DNP
C22
R39
DNP
OPEN
RREFA-
J14
VP
0.01UF
R47
RINA-
OUT
Application Note 1824
R16
DNP
R59
R55
DNP
C15
OPEN
C14
OPEN
J2
J1
0
R37
0
C23
R56
R21
0.1UF
C5
100K
10K
J13
OUT
VM
RGA+
0
C3
OUT
0.1UF C1
IN+A
0
OPEN
CLOSE TO PART
CLOSE TO PART
0.01UF
R15
2
1UF
D1
R63
0
DNP
RINA+
C7
0
R51
C17
0
0
D2
V+
C26
OPEN
1
10K
C4
R1
C16
IN1+
R24
1UF
RREF
R44
OPEN
J6
RREFA+
R5
DNP
8
RINA1+
100K
R32
A
R33
DNP
DNP
R28
2
OPEN
DNP
DNP
RINA2-
R11
R2
DNP
C6
1
0
C2
RREFAR20
R6
J5
V-
IN-A
R48
10K
IN-
REF1
RINA-
R14
J3
J4
ISL70444SEHEVAL1Z Schematic Diagram
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