IMAGE SENSOR NMOS linear image sensor S5930/S5931 series Built-in thermoelectric cooler ensures long exposure time and stable operation. NMOS linear image sensors are self-scanning photodiode arrays designed specifically as detectors for multichannel spectroscopy. The scanning circuit is made up of N-channel MOS transistors, operates at low power consumption and is easy to handle. Each photodiode has a large active area, high UV sensitivity yet very low noise. The built-in thermoelectric cooler (air cooled) allows a long exposure time achieving a high S/N even at low light levels. The cap uses a sapphire glass window hermetically welded for high reliability. Features Applications l Wide active area Pixel pitch: 50 µm (S5930 series) 25 µm (S5931 series) Pixel height: 2.5 mm l High UV sensitivity with good stability l Low dark current and high saturation charge allow a long integration time and a wide dynamic range at room temperature l Excellent output linearity and sensitivity spatial uniformity l Start pulse and clock pulses are CMOS logic compatible l Built-in air-cooled thermoelectric cooler (setting temperature: 0 ˚C) l Multichannel spectrophotometry l Image readout system ■ Selection guide Active area size [mm (H) × mm (V)] S5930-256S 256 12.8 × 2.5 50 × 2500 S5930-512S 512 25.6 × 2.5 S5931-512S 512 12.8 × 2.5 25 × 2500 S5931-1024S 1024 25.6 × 2.5 In addition to S5930/S5931 series, Hamamatsu provides S8382/S8383 series thermoelectrically cooled NMOS linear image sensors that offer higher sensitivity in the near IR range. Major characteristics of S8382/S8383 series are almost identical with S5930/S5931 series except that the peak sensitivity wavelength is 750 nm (see “■ Spectral response”) and the saturation charge is 90 mlx .s. Type No. Number of pixels Pixel size [µm (H) × µm (V)] 1 NMOS linear image sensor ■ Equivalent circuit st 1 Clock 2 ■ Active area structure Digital shift register (MOS shift register) End of scan 2.5 mm Start Clock S5930/S5931 series Active video Active photodiode Vss b Saturation control gate Saturation control drain 1.0 µm a Dummy video Oxidation silicon 1.0 µm N type silicon 400 µm Dummy diode KMPDC0020EA P type silicon S5930 series: a=50 µm, b=45 µm S5931 series: a=25 µm, b=20 µm KMPDA0132EA ■ Absolute maximum ratings Parameter Input pulse (φ1, φ2, φst) voltage Operating temperature * 1 Symbol Vφ Topr Condition Value 15 -40 to +65 -40 to +50 -40 to +85 Ambient temperature * 2 Chip temperature Unit V °C °C °C Storage temperature Tstg *1: No condensation *2: The chip temperature should be monitored based on the thermistor resistance in order to keep the chip temperature within the rated range. ■ Specifications (Ta=25 °C, unless otherwise noted) Parameter Symbol Pixel pitch Pixel height Spectral response range (10% of peak) Peak sensitivity wavelength Photodiode dark current *3 25 °C 0 °C Photodiode capacitance *3 Saturation exposure *3*4 Saturation output charge *3 Photo response non-uniformity *5 - Min. - S5930 series Typ. Max. 50 2.5 - λ λp ID Cph Esat Qsat PRNU 200 to 1000 - *3: Vb=2.0 V, Vφ=5.0 V *4: 2856 K, tungsten lamp *5: 50% of saturation, excluding the start pixel and last pixel 2 Min. - 600 0.2 0.006 20 180 50 - S5931 series Typ. Max. 25 2.5 200 to 1000 0.6 0.018 ±3 - 600 0.1 0.003 10 180 25 - Unit µm mm nm 0.3 0.009 ±3 nm pA pF mlx · s pC % S5930/S5931 series NMOS linear image sensor ■ Electrical characteristics (Ta=25 °C) Parameter Symbol Condition Min. 4.5 0 4.5 0 1.5 - Clock pulse (φ1, φ2) voltage High Vφ1, Vφ2 (H) Low Vφ1, Vφ2 (L) High Vφs (H) Start pulse (φst) voltage Low Vφs (L) Video bias voltage*6 Vb Saturation control gate voltage Vscg Saturation control drain voltage Vscd Clock pulse (φ1, φ2) trφ1, trφ2 rise/fall time*7 tfφ1, tfφ2 Clock pulse (φ1, φ2) pulse width tpwφ1, tpwφ2 Start pulse (φst) rise/fall time trφs, tfφs Start pulse (φst) pulse width tpwφs Start pulse (φst) and clock pulse tφov (φ2) overlap Clock pulse space*7 X1, X2 Data rate*8 f Video delay time Clock pulse (φ1, φ2) line capacitance Saturation control gate (Vscg) line capacitance Video line capacitance tvd 50 % of saturation *8*9 Cφ 5 V bias Cscg 5 V bias CV 2 V bias S5930 series Typ. Max. 5 10 0.4 10 Vφ1 0.4 Vφ - 3.0 Vφ - 2.5 0 Vb - Min. 4.5 0 4.5 0 1.5 - S5931 series Typ. Max. 5 10 0.4 10 Vφ1 0.4 Vφ - 3.0 Vφ - 2.5 0 Vb - Unit V V V V V V V - 20 - - 20 - ns 200 200 20 - - 200 200 20 - - ns ns ns 200 - - 200 - - ns 2000 - ns kHz ns trf - 20 0.1 120 (-256S) 2000 - trf - 20 0.1 150 (-512S) - 160 (-512S) - - 200 (-1024S) - ns - 36 (-256S) 67 (-512S) 20 (-256S) 35 (-512S) 11 (-256S) 20 (-512S) - - 50 (-512S) 100 (-1024S) 24 (-512S) 45 (-1024S) 16 (-512S) 30 (-1024S) - pF pF pF pF pF pF *6: Vφ is input pulse voltage. *7: trf is the clock pulse rise or fall time. A clock pulse space of “rise time/fall time - 20 ” ns (nanoseconds) or more should be input if the clock pulse rise or fall time is longer than 20 ns. *8: Vb=2.0 V, Vφ=5.0 V *9: Measured with C7883 driver circuit. ■ Dimensional outlines (unit: mm) S5930-512S, S5931-1024S 4.05 ± 0.4*2 12.8 0.25 0.8*1 5.0 40.64 ± 0.3 50.0 KMPDA0089JB 2.54 27.94 7.65 ± 0.5 0.46 *1: Thickness of sapphire glass *2: Distance from the surface of sapphire glass to the chip surface 5.0 ± 0.5 5.0 ± 0.5 27.94 7.65 ± 0.5 58.84 0.46 2.54 14.99 ± 0.25 4.0 12.0 2.5 14.99 ± 0.25 2.5 12.0 4.0 0.8*1 32.0 ± 0.3 5.0 4.05 ± 0.4*2 25.6 0.25 S5930-256S, S5931-512S *1: Thickness of sapphire glass *2: Distance from the surface of sapphire glass to the chip surface KMPDA0090JB 3 NMOS linear image sensor S5930/S5931 series ■ Pin connection NC 1 24 st NC 2 23 1 Vss 3 22 2 Vscg 4 21 NC Vsub 5 20 NC NC 6 19 TE-cooler + Thermistor 7 18 TE-cooler - Thermistor 8 17 End of scan NC 9 16 NC Vscd 10 15 Dummy video NC 11 14 Active video NC 12 13 Vss Vss, Vsub and NC should be grounded. Electricity flows between the 20th pin and package metal. KMPDC0115EA Terminal Input or output φ1, φ2 Input (CMOS logic compatible) φst Vss Vscg Input (CMOS logic compatible) Input Vscd Input Active video Output Dummy video Output Vsub - End of scan Output (CMOS logic compatible) NC TE-cooler Thermistor Input Output ■ Spectral response (typical example) Description Pulses for operating the MOS shift register. The video data rate is equal to the clock pulse frequency since the video output signal is obtained synchronously with the rise of φ2 pulse. Pulse for starting the MOS shift register operation. The time interval between start pulses is equal to the signal accumulation time. Connected to the anode of each photodiode. This should be grounded. Used for restricting blooming. This should be grounded. Used for restricting blooming. This should be biased at a voltage equal to the video bias voltage. Video output signal. Connects to photodiode cathodes when the address is on. A positive voltage should be applied to the video line in order to use photodiodes with a reverse voltage. When the amplitude of φ1 and φ2 is 5 V, a video bias voltage of 2 V is recommended. This has the same structure as the active video, but is not connected to photodiodes, so only spike noise is output. This should be biased at a voltage equal to the active video or left as an open-circuit when not needed. Connected to the silicon substrate. This should be grounded. This should be pulled up at 5 V by using a 10 kΩ resistor. This is a negative going pulse that appears synchronously with the φ2 timing right after the last photodiode is addressed. Should be grounded. For sensor chip cooling For temperature control ■ Output charge vs. exposure (Ta=25 ˚C) 0.5 102 (Typ. Vb=2 V, V =5 V, light source: 2856 K) IR high-sensitivity type S8382/S8383 series 10 Output charge (pC) Photo sensitivity (A/W) Saturation charge 1 0.4 0.3 0.2 S5930 series 100 S5931 series -1 10 Saturation exposure 10-2 0.1 S5930/S5931 series 0 200 400 600 800 Wavelength (nm) 4 1000 1200 KMPDB0163EA 10-3 -5 10 -4 10 -3 10 -2 10 Exposure (lx · s) -1 10 0 10 KMPDB0164EA NMOS linear image sensor S5930/S5931 series ■ Driver circuit S5930/S5931 series do not require any DC voltage supply for operation. However, the Vss, Vsub and all NC terminals must be grounded. A start pulse φst and 2-phase clock pulses φ1, φ2 are needed to drive the shift register. These start and clock pulses are positive going pulses and CMOS logic compatible. The 2-phase clock pulses φ1, φ2 can be either completely separated or complementary. However, both pulses must not be “High” at the same time. A clock pulse space (X1 and X2 in “■Timing chart for driver circuit”) of a “rise time/fall time - 20” ns or more should be input if the rise and fall times of φ1, φ2 are longer than 20 ns. The φ1 and φ2 clock pulses must be held at “High” at least 200 ns. Since the photodiode signal is obtained at the rise of each φ2 pulse, the clock pulse frequency will equal the video data rate. ■ Timing chart for driver circuit 1 2 V s (H) V s (L) V V V V ■ End of scan The end of scan (EOS) signal appears in synchronization with the φ2 timing right after the last photodiode is addressed, and the EOS terminal should be pulled up at 5 V using a 10 kΩ resistor. ■ Video bias voltage margin 10 tpw s tpw 1 1 (H) 1 (L) 2 (H) 2 (L) tpw 2 8 Video bias voltage (V) st The amplitude of start pulse φst is the same as the φ1 and φ2 pulses. The shift register starts the scanning at the “High” level of φst, so the start pulse interval determines the length of signal accumulation time. The φst pulse must be held “High” at least 200 ns and overlap with φ2 at least for 200 ns. To operate the shift register correctly, φ2 must change from the “High” level to the “Low” level only once during “High” level of φst. The timing chart for each pulse is shown in “■Timing chart for driver circuit”. tvd Active video output End of scan tr s st tf s tr 1 tf 1 . 6 d de en x Ma s bia m om c Re 4 Video bias range 2 1 X1 X2 tf 2 MIN. 2 0 t ov 4 5 6 7 8 9 10 tr 2 Clock pulse amplitude (V) ■ Signal readout circuit There are two methods for reading out the signal from an NMOS linear image sensor. One is a current detection method using the load resistance and the other is a current integration method using a charge amplifier. In either readout method, a positive bias must be applied to the video line because photodiode anodes of NMOS linear image sensors are set at 0 V (Vss). “■Video bias voltage margin” shows a typical video bias voltage margin. As the clock pulse amplitude is higher, the video bias voltage can be set larger so the saturation charge can be increased. The rise and fall times of the video output waveform can be shortened if the video bias voltage is reduced while the clock pulse amplitude is still higher. When the amplitude of φ1, φ2 and φst is 5 V, setting the video bias voltage at 2 V is recommended. To obtain good linearity, using the current integration method is advised. In this method, the integration capacitance is reset to the reference voltage level immediately before each photodiode is addressed and the signal charge is then stored as an integration capacitive charge when the address switch turns on. “■Readout circuit example” and “■Timing chart” show a typi- KMPDC0022EA KMPDB0043EA cal current integration circuit and its pulse timing chart. To ensure stable output, the rise of a reset pulse must be delayed at least 50 ns from the fall of φ2. 5 NMOS linear image sensor ■ Readout circuit example S5930/S5931 series ■ Timing chart +5 V 50 ns Min. 10 kΩ st st EOS 1 1 2 2 Dummy video st EOS Reset 1, Reset Open 2 10 pF Vscg Vss Vsub Active video – Vscd + KMPDC0024EA NC Op amp (JFET input) + +2 V KMPDC0023EA Output voltage Vout is expressed by the following equation. Output charge [C] Vout [V] = 10 × 10-12 [F] ■ Anti-blooming function If the incident light intensity is higher than the saturation charge level, even partially, a signal charge in excess of the saturation charge cannot accumulate in the photodiode. This excessive charge flows out into the video line degrading the signal purity. To avoid this problem and maintain the signal purity, applying the same voltage as the video bias voltage to the saturation control drain and grounding the saturation control gate are effective. If the incident light intensity is extremely high, a positive bias should be applied to the saturation control gate. The larger the voltage applied to the saturation control gate, the higher the function for suppressing the excessive saturation charge will be. However, this voltage also lowers the amount of saturation charge, so an optimum bias voltage should be selected. ■ Auxiliary functions (1) All reset In normal operation, the accumulated charge in each photodiode is reset when the signal is read out. Besides this method that uses the readout line, S5930/S5931 series can reset the photodiode charge by applying a pulse to the saturation control gate. The amplitude of this pulse should be equal to the φ1, φ2 and φst pulses and the pulse width should be longer than 5 µs. When the saturation control gate is set at the “High” level, all photodiodes are reset to the saturation control drain potential (equal to video bias). Conversely, when the saturation control gate is set at the “Low” level (0 V), the signal charge accumulates in each photodiode without being reset. (2) Dummy video S5930/S5931 series have a dummy video line to eliminate spike noise contained in the video output waveform. Video signal with lower spike noise can be obtained by differential amplification applied between the active video line and dummy video line outputs. When not needed, leave this unconnected. 6 NMOS linear image sensor S5930/S5931 series ■ Specifications of built-in TE-cooler (Typ.) Parameter Condition S5930-256S, S5931-512S S5930-512S, S5931-1024S Unit 1.0 Internal resistance Ta=25 °C 1.3 Ω Maximum current*10 2.8 Th=27 °C 2.9 A Maximum voltage*11 3.5 Th=27 °C 4.6 V Maximum heat absorption Tc=Th=27 °C 6.0 8.0 W Maximum temperature difference Th=27 °C 67 °C Maximum temperature of 85 °C heat radiating side *10: Electrical current required to generate the maximum difference between temperatures (temperature Th on the heat radiating side and temperature Tc on the cooling side) at both ends of the thermoelectric cooler while heat is completely insulated. Cooling efficiency will drop if operated at a current higher than this value. *11: Voltage required for maximum current flow *12: Heat absorption amount when operated at maximum current. This is defined under the condition that the difference between the temperature Th on the heat radiating side and the temperature Tc on the cooling side is 0 °C. S5930-512S, S5931-1024S S5930-256S, S5931-512S (Typ. Ta=25 ˚C) (Typ. Ta=25 ˚C) 5 30 20 3 10 2 0 -10 1 -10 -20 1.6 0 3 10 2 0 1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Voltage (V) 20 Chip temperature (˚C) Voltage (V) 4 4 0 30 Voltage vs. current Chip temperature vs. current Voltage vs. current Chip temperature vs. current 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Chip temperature (˚C) 5 -20 1.6 Current (A) Current (A) KMPDB0326EA KMPDB0327EA ■ Specifications of built-in temperature sensor A thermistor chip is built in the same package with a NMOS chip, and the chip temperature can be monitored with it, A relation between the thermistor resistance and absolute temperature is expressed by the following equation. 1 MΩ RT1 = RT2 × exp BT1/ T2 (1/T1 – 1/T2) The characteristics of the thermistor used are as follows. R298=10 kΩ B298/323=3450 K Resistance RT1: Resistance at absolute temperature T1 [K] RT2: Resistance at absolute temperature T2 [K] BT1/ T2: B constant [K] 100 kΩ 10 kΩ 220 240 260 280 300 Temperature (K) KMPDB0111EB 7 NMOS linear image sensor S5930/S5931 series ■ Precautions (1) Electrostatic countermeasures This device has a built-in protection circuit against static electrical charges. However, to prevent destroying the device with electrostatic charges, take countermeasures such as grounding yourself, the workbench and tools to prevent static discharges. Also protect this device from surge voltages which might be caused by peripheral equipment. (2) Light input window If dust or dirt gets on the light input window, it will show up as black blemishes on the image. When cleaning, avoid rubbing the window surface with dry cloth or dry cotton swab, since doing so may generate static electricity. Use soft cloth, paper or a cotton swab moistened with alcohol to wipe dust and dirt off the window surface. Then blow compressed air onto the window surface so that no spot or stain remains. (3) Soldering To prevent damaging the device during soldering, take precautions to prevent excessive soldering temperatures and times. Soldering should be performed within 5 seconds at a soldering temperature below 260 °C. (4) Precautions when mounting When installing the device into the socket on the printed circuit board, insert it in the correct orientation after checking the pin connections. Also take measures to protect this device from static electricity during this work. Never press on the surface of the device when inserting it into the circuit board, etc. Pressing on the sensor surface causes cracks and fractures in the window, possibly causing it to fall out and may lead to malfunctions. ・Insert the sensor into the socket while pressing on the sensor edges as shown in photo 1 or pressing on the screw hole sections as shown in photo 2. ・When securing the device by screws, place and secure it on a flat surface (flatness within 100 µm). ・Use a socket that matches the pin size and specifications. Photo 1 Photo 2 (5) Operating and storage environments Always observe the rated temperature range when handling the device. Operating or storing the device at an excessively high temperature and humidity may cause variations in performance characteristics and must be avoided. (6) UV exposure This device is designed to suppress performance deterioration due to UV exposure. Even so, avoid unnecessary UV exposure to the device. 8 NMOS linear image sensor S5930/S5931 series NMOS multichannel detector head C5964 series The C5964 series is a family of multichannel detectors developed for spectrophotometry in the UV to near infrared range (up to 1000 nm). The C5964 series device incorporates a thermoelectricallycooled NMOS linear image sensor (S5930/S5931/S8382/S8383 series), low noise driver/amplifier circuit and highly stable temperature control circuit. It also operates from simple external signal inputs. ■ Selection guide The C5964 series consists of the following models depending on the NMOS linear image sensor used. NMOS linear image sensor NMOS multichannel Pixel size Active area Type no. Number of pixels detector head [µm (H) × µm (V)] [mm (H) × mm (V)] C5964-0800 S5930-256S 256 12.8 × 2.5 50 × 2500 C5964-0900 S5930-512S 512 25.6 × 2.5 C5964-0910 S5931-512S 512 12.8 × 2.5 25 × 2500 C5964-1010 S5931-1024S 1024 25.6 × 2.5 C5964-0901 S8382-512S 512 50 × 2500 25.6 × 2.5 C5964-1011 S8383-1024S 1024 25 × 2500 25.6 × 2.5 Remark Standard type IR-enhanced type Multichannel detector head montroller C7557-01 The C7557-01 is specifically designed for basic control in multichannel photometry. When connected to a HAMAMATSU multichannel detector head and a personal computer, the C7557-01 allows easy control of the detector head and data acquisition by using dedicated software that comes with the unit. ■ Connection example Shutter * timing pulse AC cable (100 to 240 V; included with the C7557-01) Trig. POWER Dedicated cable (Included with the C7557-01) SIGNAL I/O USB cable (Included with the C7557-01) TE CONTROL I/O C5964 series Controller for multichannel detector head C7557-01 PC (Windows 2000/XP/Vista) (USB 2.0) * Shutter, etc. are not available. KACCC0070ED 9 NMOS linear image sensor S5930/S5931 series Information described in this material is current as of August, 2014. Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always contact us for the delivery specification sheet to check the latest specifications. Type numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or a suffix "(Z)" which means developmental specifications. The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use. Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission. www.hamamatsu.com HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184 U.S.A.: Hamamatsu Corporation: 360 Foothill Road, Bridgewater, N.J. 08807, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Torshamnsgatan 35 16440 Kista, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.r.l.: Strada della Moia, 1 int. 6, 20020 Arese (Milano), Italy, Telephone: (39) 02-93581733, Fax: (39) 02-93581741 China: Hamamatsu Photonics (China) Co., Ltd.: B1201, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 100020, China, Telephone: (86) 10-6586-6006, Fax: (86) 10-6586-2866 Cat. No. KMPD1018E05 Aug. 2014 DN 10