DATASHEET

HFA1112
®
Data Sheet
FN2992.8
July 27, 2005
850MHz, Low Distortion Programmable
Gain Buffer Amplifiers
The HFA1112 is a closed loop Buffer featuring user
programmable gain and ultra high speed performance.
Manufactured on Intersil’s proprietary complementary
bipolar UHF-1 process, these devices offer a wide -3dB
bandwidth of 850MHz, very fast slew rate, excellent gain
flatness, low distortion and high output current.
Features
• User Programmable for Closed-Loop Gains of +1, -1 or +2
without Use of External Resistors
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 850MHz
• Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 2400V/µs
• Fast Settling Time (0.1%). . . . . . . . . . . . . . . . . . . . . 11ns
• High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
A unique feature of the pinout allows the user to select a
voltage gain of +1, -1, or +2, without the use of any external
components. Gain selection is accomplished via
connections to the inputs, as described in the “Application
Information” section. The result is a more flexible product,
fewer part types in inventory, and more efficient use of board
space.
• Excellent Gain Accuracy . . . . . . . . . . . . . . . . . . . 0.99V/V
Compatibility with existing op amp pinouts provides flexibility
to upgrade low gain amplifiers, while decreasing component
count. Unlike most buffers, the standard pinout provides an
upgrade path should a higher closed loop gain be needed at
a future date.
• RF/IF Processors
This amplifier is available with programmable output limiting
as the HFA1113. For applications requiring a standard buffer
pinout, please refer to the HFA1110 data sheet.
• Line Driving
HFA1112 (PDIP, SOIC)
TOP VIEW
NC
300
1
• Standard Operational Amplifier Pinout
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Driving Flash A/D Converters
• High-Speed Communications
• Impedance Transformation
• Video Switching and Routing
• Radar Systems
• Medical Imaging Systems
8 NC
• Related Literature
- AN9507, Video Cable Drivers Save Board Space
7 V+
Related Literature
300
-IN
2
+IN
3
6 OUT
V-
4
5 NC
+
• Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . . <10ns
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Ordering Information
PART NUMBER
(BRAND)
Pin Descriptions
DESCRIPTION
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
HFA1112IP
-40 to 85
8 Ld PDIP
E8.3
HFA1112IB
(1112IB)
-40 to 85
8 Ld SOIC
M8.15
8 Ld SOIC Tape and Reel
M8.15
NAME
PIN NUMBER
NC
1, 5, 8
No Connection
-IN
2
Inverting Input
HFA1112IB96
(1112IB)
+IN
3
Non-Inverting Input
V-
4
Negative Supply
HFA1112IBZ
(1112IBZ) (Note)
OUT
6
Output
V+
7
Positive Supply
-40 to 85
8 Ld SOIC
(Pb-free)
M8.15
HFA1112IBZ96
(1112IBZ) (Note)
8 Ld SOIC Tape and Reel
(Pb-free)
M8.15
HFA11XXEVAL
High Speed Op Amp DIP Evaluation Board
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate termination finish,
which are RoHS compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HFA1112
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
Thermal Resistance (Typical, Note 1)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
θJA (oC/W)
θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
125
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
170
N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications VSUPPLY = ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP (oC)
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
Output Offset Voltage
25
-
8
25
mV
Full
-
-
35
mV
Output Offset Voltage Drift
Full
-
10
-
µV/oC
PSRR
25
39
45
-
dB
Full
35
-
-
dB
25
-
9
-
nV/√Hz
Input Noise Voltage (Note 3)
100kHz
Non-Inverting Input Noise Current (Note 3)
100kHz
Non-Inverting Input Bias Current
25
-
37
-
pA/√Hz
25
-
25
40
µA
Full
-
-
65
µA
25
25
50
-
kΩ
Inverting Input Resistance (Note 2)
25
240
300
360
Ω
Input Capacitance
25
-
2
-
pF
Input Common Mode Range
Full
±2.5
±2.8
-
V
Non-Inverting Input Resistance
TRANSFER CHARACTERISTICS
AV = +1, VIN = +2V
Gain
AV = +2, VIN = +1V
Gain
AV = +2, ±2V Full Scale
DC Non-Linearity (Note 3)
25
0.980
0.990
1.02
V/V
Full
0.975
-
1.025
V/V
25
1.96
1.98
2.04
V/V
Full
1.95
-
2.05
V/V
25
-
0.02
-
%
OUTPUT CHARACTERISTICS
25
±3.0
±3.3
-
V
Full
±2.5
±3.0
-
V
25, 85
50
60
-
mA
-40
35
50
-
mA
25
-
0.3
-
Ω
Supply Voltage Range
Full
±4.5
-
±5.5
V
Supply Current (Note 3)
25
-
21
26
mA
Full
-
-
33
mA
AV = -1
Output Voltage (Note 3)
RL = 50Ω
Output Current (Note 3)
DC, AV = +2
Closed Loop Output Impedance
POWER SUPPLY CHARACTERISTICS
AC CHARACTERISTICS
-3dB Bandwidth
(VOUT = 0.2VP-P, Notes 2, 3)
2
AV = -1
25
450
800
-
MHz
AV = +1
25
500
850
-
MHz
AV = +2
25
350
550
-
MHz
HFA1112
Electrical Specifications VSUPPLY = ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP (oC)
MIN
TYP
MAX
UNITS
Slew Rate
(VOUT = 5VP-P, Note 2)
AV = -1
25
1500
2400
-
V/µs
AV = +1
25
800
1500
-
V/µs
AV = +2
25
1100
1900
-
V/µs
Full Power Bandwidth
(VOUT = 5VP-P, Note 3)
AV = -1
25
-
300
-
MHz
AV = +1
25
-
150
-
MHz
AV = +2
25
-
220
-
MHz
AV = -1
25
-
±0.02
-
dB
AV = +1
25
-
±0.1
-
dB
Gain Flatness
(to 30MHz, Notes 2, 3)
Gain Flatness
(to 50MHz, Notes 2, 3)
Gain Flatness
(to 100MHz, Notes 2, 3)
Linear Phase Deviation
(to 100MHz, Note 3)
2nd Harmonic Distortion
(30MHz, VOUT = 2VP-P, Notes 2, 3)
AV = +2
25
-
±0.015
±0.04
dB
AV = -1
25
-
±0.05
-
dB
AV = +1
25
-
±0.2
-
dB
AV = +2
25
-
±0.036
±0.08
dB
AV = -1
25
-
±0.10
-
dB
AV = +2
25
-
±0.07
±0.22
dB
AV = -1
25
-
±0.13
-
Degrees
AV = +1
25
-
±0.83
-
Degrees
AV = +2
25
-
±0.05
-
Degrees
AV = -1
25
-
-52
-
dBc
AV = +1
25
-
-57
-
dBc
AV = +2
25
-
-52
-45
dBc
3rd Harmonic Distortion
(30MHz, VOUT = 2VP-P, Notes 2, 3)
AV = -1
25
-
-71
-
dBc
AV = +1
25
-
-73
-
dBc
AV = +2
25
-
-72
-65
dBc
2nd Harmonic Distortion
(50MHz, VOUT = 2VP-P, Notes 2, 3)
AV = -1
25
-
-47
-
dBc
AV = +1
25
-
-53
-
dBc
AV = +2
25
-
-47
-40
dBc
3rd Harmonic Distortion
(50MHz, VOUT = 2VP-P, Notes 2, 3)
AV = -1
25
-
-63
-
dBc
AV = +1
25
-
-68
-
dBc
AV = +2
25
-
-65
-55
dBc
2nd Harmonic Distortion
(100MHz, VOUT = 2VP-P, Notes 2, 3)
AV = -1
25
-
-41
-
dBc
AV = +1
25
-
-50
-
dBc
AV = +2
25
-
-42
-35
dBc
3rd Harmonic Distortion
(100MHz, VOUT = 2VP-P, Notes 2, 3)
AV = -1
25
-
-55
-
dBc
AV = +1
25
-
-49
-
dBc
AV = +2
25
-
-62
-45
dBc
3rd Order Intercept
(AV = +2, Note 3)
100MHz
25
-
28
-
dBm
300MHz
25
-
13
-
dBm
1dB Compression
(AV = +2, Note 3)
100MHz
25
-
19
-
dBm
300MHz
25
-
12
-
dBm
Reverse Isolation
(S12, Note 3)
40MHz
25
-
-70
-
dB
100MHz
25
-
-60
-
dB
600MHz
25
-
-32
-
dB
AV = -1
25
-
500
800
ps
AV = +1
25
-
480
750
ps
AV = +2
25
-
700
1000
ps
TRANSIENT CHARACTERISTICS
Rise Time
(VOUT = 0.5V Step, Note 2)
3
HFA1112
Electrical Specifications VSUPPLY = ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP (oC)
MIN
TYP
MAX
UNITS
Rise Time
(VOUT = 2V Step)
AV = -1
25
-
0.82
-
ns
AV = +1
25
-
1.06
-
ns
AV = +2
25
-
1.00
-
ns
Overshoot
(VOUT = 0.5V Step, Input tR/tF = 200ps,
Notes 2, 3, 4)
AV = -1
25
-
12
30
%
AV = +1
25
-
45
65
%
AV = +2
25
-
6
20
%
0.1% Settling Time (Note 3)
VOUT = 2V to 0V
25
-
11
-
ns
0.05% Settling Time
VOUT = 2V to 0V
25
-
15
-
ns
Overdrive Recovery Time
VIN = 5VP-P
25
-
8.5
-
ns
Differential Gain
AV = +1, 3.58MHz, RL = 150Ω
25
-
0.03
-
%
AV = +2, 3.58MHz, RL = 150Ω
25
-
0.02
-
%
AV = +1, 3.58MHz, RL = 150Ω
25
-
0.05
-
Degrees
AV = +2, 3.58MHz, RL = 150Ω
25
-
0.04
-
Degrees
Differential Phase
NOTES:
2. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
3. See Typical Performance Curves for more information.
4. Overshoot decreases as input transition times increase, especially for AV = +1. Please refer to Typical Performance Curves.
Application Information
Closed Loop Gain Selection
The HFA1112 features a novel design which allows the user
to select from three closed loop gains, without any external
components. The result is a more flexible product, fewer part
types in inventory, and more efficient use of board space.
This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1, while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN grounded.
The table below summarizes these connections:
For unity gain applications, care must also be taken to
minimize the capacitance to ground seen by the amplifier’s
inverting input. At higher frequencies this capacitance will
tend to short the -INPUT to GND, resulting in a closed loop
gain which increases with frequency. This will cause
excessive high frequency peaking and potentially other
problems as well.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
Driving Capacitive Loads
CONNECTIONS
GAIN
(ACL)
+INPUT (PIN 3)
-INPUT (PIN 2)
-1
GND
Input
+1
Input
NC (Floating)
+2
Input
GND
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
4
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (RS) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the RS and CL
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
RS and CL form a low pass network at the output, thus
limiting system bandwidth well below the amplifier
bandwidth of 850MHz. By decreasing RS as CLincreases
HFA1112
(as illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example, at AV = +1, RS = 50Ω, CL = 30pF, the overall
bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at AV = +1, RS = 5Ω, CL = 340pF.
Evaluation Board
The performance of the HFA1112 may be evaluated using
the HFA11XX Evaluation Board, slightly modified as follows:
1. Remove the 500Ω feedback resistor (R2), and leave the
connection open.
RS (Ω)
2. a. For AV = +1 evaluation, remove the 500Ω gain setting
resistor (R1), and leave pin 2 floating.
b. For AV = +2, replace the 500Ω gain setting resistor with
a 0Ω resistor to GND.
50
45
40
35
30
25
20
15
10
5
0
The layout and modified schematic of the board are shown in
Figure 2.
AV = +1
To order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.
AV = +2
0
40
80
120 160 200 240 280 320
LOAD CAPACITANCE (pF)
360 400
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
∞ (AV = +1)
or 0Ω (AV = +2)
10µF
VH
R1
1
8
50Ω
2
7
IN
TOP LAYOUT
VH
0.1µF
10µF
3
6
OUT
4
5
VL
-5V
GND
GND
0.1µF
1
+5V
50Ω
+IN
OUT V+
VL VGND
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
5
BOTTOM LAYOUT
HFA1112
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified
200
2.0
AV = +2
AV = +2
1.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
150
100
50
0
-50
-100
1.0
0.5
0
-0.5
-1.0
-150
-1.5
-200
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 3. SMALL SIGNAL PULSE RESPONSE
FIGURE 4. LARGE SIGNAL PULSE RESPONSE
200
1.5
100
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
150
2.0
AV = +1
50
0
-50
-100
AV = +1
1.0
0.5
0
-0.5
-1.0
-150
-1.5
-200
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 5. SMALL SIGNAL PULSE RESPONSE
FIGURE 6. LARGE SIGNAL PULSE RESPONSE
200
1.5
100
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
150
2.0
AV = -1
50
0
-50
-100
AV = -1
1.0
0.5
0
-0.5
-1.0
-1.5
-150
-2.0
-200
TIME (5ns/DIV.)
FIGURE 7. SMALL SIGNAL PULSE RESPONSE
6
TIME (5ns/DIV.)
FIGURE 8. LARGE SIGNAL PULSE RESPONSE
HFA1112
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
6
AV = +1
AV = +2, VOUT = 200mVP-P
0
GAIN
AV = -1
AV = +2
-6
0
PHASE
-9
-90
AV = +2
AV = -1
AV = +1
-180
-270
-360
1
10
100
GAIN
3
RL = 50Ω
RL = 100Ω
0
RL = 1kΩ
0
PHASE
0.3
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
6
AV = +1, VOUT = 200mVP-P
RL = 1kΩ
GAIN (dB)
3
-3
RL = 100Ω
-6
-90
RL = 100Ω
-180
RL = 50Ω
RL = 1kΩ
1
10
100
FREQUENCY (MHz)
-270
-360
1000
RL = 100Ω
RL = 50Ω
180
PHASE
90
0
RL = 50Ω
RL = 1kΩ
6
GAIN (dB)
6
GAIN
3
4.0VP-P
2.5VP-P
PHASE
0
2.5VP-P
1VP-P
10
100
FREQUENCY (MHz)
-180
-270
-360
1000
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES
7
-180
1000
AV = +1
0
GAIN
-3
VOUT = 4VP-P
VOUT = 2.5VP-P
-6
-90
4.0VP-P
10
100
FREQUENCY (MHz)
3
PHASE (DEGREES)
0
1
-90
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
1VP-P
AV = +2
9
1
RL = 100Ω
0.3
FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
GAIN (dB)
GAIN
-3
PHASE (DEGREES)
PHASE
0.3
0
-9
0
12
-360
1000
RL = 1kΩ
-6
RL = 50Ω
-9
0.3
AV = -1, VOUT = 200mVP-P
3
0
GAIN
-270
FIGURE 10. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
GAIN (dB)
6
-180
RL = 50Ω
RL = 1kΩ
1000
FIGURE 9. FREQUENCY RESPONSE
-90
RL = 100Ω
PHASE (DEGREES)
0.3
6
VOUT = 1VP-P
0
PHASE
-90
VOUT = 4VP-P
VOUT = 2.5VP-P
VOUT = 1VP-P
0.3
1
10
100
FREQUENCY (MHz)
-180
-270
-360
PHASE (DEGREES)
-3
GAIN (dB)
9
PHASE (DEGREES)
VOUT = 200mVP-P
3
NORMALIZED PHASE (DEGREES)
NORMALIZED GAIN (dB)
Typical Performance Curves
1000
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES
HFA1112
Typical Performance Curves
AV = -1
15
VOUT = 2.5VP-P
VOUT = 4VP-P
3
GAIN
0
VOUT = 1VP-P
-3
-6
180
90
VOUT = 4VP-P
0
VOUT = 2.5VP-P
-90
VOUT = 1VP-P
-180
1
10
100
FREQUENCY (MHz)
PHASE (DEGREES)
PHASE
0.3
VOUT = 5VP-P
12
NORMALIZED GAIN (dB)
GAIN (dB)
6
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
9
6
3
0
AV = -1
AV = +2
-3
-6
AV = +1
-9
-12
-15
0.3
1000
1
10
100
1000
FREQUENCY (MHz)
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES
FIGURE 16. FULL POWER BANDWIDTH
900
0.35
AV = +1
BANDWIDTH (MHz)
800
0.30
NORMALIZED GAIN (dB)
850
AV = -1
750
700
650
600
AV = +2
0.25
0.20
AV = -1
AV = +1
0.15
0.10
0.05
0
-0.05
550
AV = +2
-0.10
500
-0.15
-50
-25
0
25
50
75
100
125
1
10
100
FREQUENCY (MHz)
TEMPERATURE (oC)
FIGURE 17. -3dB BANDWIDTH vs TEMPERATURE
FIGURE 18. GAIN FLATNESS
4
AV = +2, VOUT = 2V
0.6
2
1
AV = -1
0
-1
AV = +2
-2
AV = +1
-3
SETTLING ERROR (%)
DEVIATION (DEGREES)
3
0.4
0.2
0.1
0
-0.1
-0.2
-0.4
-0.6
-4
-5
-6
0
15
30
45
60
75
90
105 120
135 150
FREQUENCY (MHz)
FIGURE 19. DEVIATION FROM LINEAR PHASE
8
-2
3
8
13
18
23
28
33
38
TIME (ns)
FIGURE 20. SETTLING RESPONSE
43
48
HFA1112
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
-24
235
-30
180
PHASE
-36
AV = +1
45
AV = +2
-24
-54
AV = +2
AV = -1
-66
-72
-78
AV = +2
20
40
60
-36
AV = +1
-42
AV = -1
-48
-54
-84
0
80
100
120 140
160
180
200
-60
100 190
280 370
FREQUENCY (MHz)
550 640
730
820
910 1000
FIGURE 22. HIGH FREQUENCY REVERSE ISOLATION (S12)
20
30
2 - TONE
18
16
INTERCEPT POINT (dBm)
OUTPUT POWER AT 1dB COMPRESSION (dBm)
460
FREQUENCY (MHz)
FIGURE 21. LOW FREQUENCY REVERSE ISOLATION (S12)
AV = -1
14
12
10
8
AV = +2
AV = +1
6
4
AV = -1
20
AV = +2
AV = +1
10
2
0
100
0
100
200
300
400
500
200
FIGURE 23. 1dB GAIN COMPRESSION vs FREQUENCY
-20
AV = +2
-30
-40
-40
DISTORTION (dBc)
-30
-50
100MHz
30MHz
50MHz
-70
-60
-70
-80
-90
-90
-100
-3
0
3
6
9
12
OUTPUT POWER (dBm)
FIGURE 25. 2nd HARMONIC DISTORTION vs POUT
9
15
AV = +2
-50
-80
-6
400
FIGURE 24. 3rd ORDER INTERMODULATION INTERCEPT vs
FREQUENCY
-20
-60
300
FREQUENCY (MHz)
FREQUENCY (MHz)
DISTORTION (dBc)
0
GAIN
-30
AV = +2
AV = -1
GAIN (dB)
GAIN (dB)
-48
-60
90
AV = -1
AV = +1
-42
PHASE (DEGREES)
Typical Performance Curves
-100
-6
30MHz
50MHz
100MHz
-3
0
3
6
9
12
15
OUTPUT POWER (dBm)
FIGURE 26. 3rd HARMONIC DISTORTION vs POUT
18
HFA1112
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
-20
-20
AV = +1
-30
-30
-40
-40
DISTORTION (dBc)
DISTORTION (dBc)
AV = +1
-50
-60
-70
100MHz
30MHz
50MHz
-50
-60
-70
100MHz
-80
-80
-90
-90
50MHz
-100
-100
-6
-3
0
3
6
9
12
-6
15
-3
0
3
6
9
12
15
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
FIGURE 27. 2nd HARMONIC DISTORTION vs POUT
FIGURE 28. 3rd HARMONIC DISTORTION vs POUT
-20
-20
AV = -1
AV = -1
-30
-30
-40
-40
DISTORTION (dBc)
DISTORTION (dBc)
30MHz
-50
-60
100MHz
-70
50MHz
30MHz
-50
-60
-70
-80
-80
-90
-90
50MHz
30MHz
100MHz
-100
-100
-6
-3
0
3
6
9
12
-6
15
-3
0
OUTPUT POWER (dBm)
3
6
9
12
15
OUTPUT POWER (dBm)
FIGURE 29. 2nd HARMONIC DISTORTION vs POUT
FIGURE 30. 3rd HARMONIC DISTORTION vs POUT
60
0.04
VOUT = 0.5V
AV = +1
OVERSHOOT (%)
PERCENT ERROR (%)
50
0.02
0
40
30
20
AV = -1
-0.02
10
AV = +2
-0.04
-3.0
-2.0
-1.0
0
1.0
2.0
INPUT VOLTAGE (V)
FIGURE 31. INTEGRAL LINEARITY ERROR
10
3.0
0
100
300
500
700
900
1100
INPUT RISE TIME (ps)
FIGURE 32. OVERSHOOT vs INPUT RISE TIME
1300
HFA1112
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
60
60
VOUT = 2V
VOUT = 1V
50
OVERSHOOT (%)
OVERSHOOT (%)
50
40
AV = +1
30
20
40
AV = +1
30
20
AV = +2
AV = -1
10
10
AV = -1
AV = +2
0
100
300
500
700
900
1100
0
100
1300
300
500
FIGURE 33. OVERSHOOT vs INPUT RISE TIME
1100
1300
FIGURE 34. OVERSHOOT vs INPUT RISE TIME
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
25
24
23
SUPPLY CURRENT (mA)
22
21
20
19
18
17
16
15
6
5
7
8
10
9
-50
-25
0
TOTAL SUPPLY VOLTAGE (V+ - V-, V)
FIGURE 35. SUPPLY CURRENT vs SUPPLY VOLTAGE
AV = -1
+VOUT (RL= 100Ω)
3.3
3.2
NOISE VOLTAGE (nV/√Hz)
+VOUT (RL= 50Ω)
3.4
|-VOUT| (RL= 100Ω)
3.1
3.0
2.9
2.8
50
75
100
125
FIGURE 36. SUPPLY CURRENT vs TEMPERATURE
3.6
3.5
25
TEMPERATURE (oC)
|-VOUT| (RL= 50Ω)
50
130
40
110
30
90
20
70
ENI
50
10
INI
2.7
2.6
0
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
125
FIGURE 37. OUTPUT VOLTAGE vs TEMPERATURE
11
0.1
1
10
30
100
FREQUENCY (kHz)
FIGURE 38. INPUT NOISE CHARACTERISTICS
NOISE CURRENT (pA/√Hz)
SUPPLY CURRENT (mA)
900
INPUT RISE TIME (ps)
INPUT RISE TIME (ps)
OUTPUT VOLTAGE (V)
700
HFA1112
Die Characteristics
DIE DIMENSIONS
PASSIVATION
63 mils x 44 mils x 19 mils
1600µm x 1130µm 483µm
Type: Nitride
Thickness: 4kÅ ±0.5kÅ
METALLIZATION
TRANSISTOR COUNT
Type: Metal 1: AlCu (2%)/TiW
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AlCu (2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
52
SUBSTRATE POTENTIAL (POWERED UP)
Floating (Recommend Connection to V-)
Metallization Mask Layouts
HFA1112
NC
+IN
V-
-IN
NC
NC
NC
V+
OUT
12
HFA1112
Dual-In-Line Plastic Packages (PDIP)
E8.3 (JEDEC MS-001-BA ISSUE D)
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AD
E
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8, 10
eA
C
0.008
0.014
0.204
C
D
0.355
0.400
9.01
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
eA
0.300 BSC
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
eB
-
L
0.115
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
13
5
D1
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS-3.
0.355
10.16
N
8
2.54 BSC
7.62 BSC
0.430
-
0.150
2.93
10.92
3.81
8
6
7
4
9
Rev. 0 12/93
HFA1112
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
INDEX
AREA
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B1
2
A
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
B S
MIN
MAX
MIN
MAX
NOTES
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
α
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
N
α
NOTES:
MILLIMETERS
8
0°
1.27
8
8°
0°
6
7
8°
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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14
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