LTC6252/LTC6253/LTC6254 720MHz, 3.5mA Power Efficient Rail-to-Rail I/O Op Amps DESCRIPTION FEATURES n n n n n n n n n n n n n n n n n n Gain Bandwidth Product: 720MHz –3dB Frequency (AV = 1): 400MHz Low Quiescent Current: 3.5mA Max High Slew Rate: 280V/µs Input Common Mode Range Includes Both Rails Output Swings Rail-to-Rail Low Broadband Voltage Noise: 2.75nV/√Hz Power-Down Mode: 42μA Fast Output Recovery Supply Voltage Range: 2.5V to 5.25V Input Offset Voltage: 350µV Max Large Output Current: 90mA CMRR: 105dB Open Loop Gain: 60V/mV Operating Temperature Range: –40°C to 125°C Single in 6-Pin TSOT-23 Dual in MS8, 2mm × 2mm DFN, 8-Pin TS0T-23, MS10 Quad in MS16 APPLICATIONS n n n n n Low Voltage, High Frequency Signal Processing Driving A/D Converters Rail-to-Rail Buffer Amplifiers Active Filters Battery Powered Equipment The LTC®6252/LTC6253/LTC6254 are single/dual/quad low power, high speed unity gain stable rail-to-rail input/output operational amplifiers. On only 3.5mA of supply current they feature a 720MHz gain-bandwidth product, 280V/µs slew rate and a low 2.75nV/√Hz of input-referred noise. The combination of high bandwidth, high slew rate, low power consumption and low broadband noise makes the LTC6252 family unique among rail-to-rail input/output op amps with similar supply currents. They are ideal for lower supply voltage high speed signal conditioning systems. The LTC6252 family maintains high efficiency performance from supply voltage levels of 2.5V to 5.25V and is fully specified at supplies of 2.7V and 5.0V. For applications that require power-down, the LTC6252 and the LTC6253 in MS10 offer a shutdown pin which disables the amplifier and reduces current consumption to 42µA. The LTC6252 family can be used as a plug-in replacement for many commercially available op amps to reduce power or to improve input/output range and performance. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 5V Single-Supply 16-Bit ADC Driver 5V 5V + 10µF ½ LTC6253 0.1µF 845Ω 10µF 0.1µF 1.8V TO 5V 0 4.7µF fS = 1Msps F1 = 20.111kHz F1 AMPLITUDE = –1.032dBFS SNR = 93.28dB THD = –100.50dB SINAD = 92.53dB SFDR = 104.7dB F2 = –106.39dBc F3 = –104.70dBc F4 = –114.13dBc F5 = –105.48dBc –20 – 143Ω 5V AVP 2.5k 249Ω 2.5k – 5V ½ LTC6253 + 100Ω DVP 3900pF 249Ω OVP IN+ LTC2393-16 100Ω IN– CNVST RESET REFIN REFOUT PD GND OGND VCM PARALLEL OR 16 BIT SERIAL INTERFACE SER/PAR BYTESWAP OB/2C CS RD BUSY 625234 TA01 ~2.08V 10µF 1µF SAMPLE CLOCK –40 AMPLITUDE (dBFS) VIN 27.4mV TO (3.5V + 27.4mV) LTC6253 Driving LTC2393-16 16-Bit ADC 5V Single-Supply Performance –60 –80 –100 –120 –140 –160 0 100 200 300 FREQUENCY (kHz) 400 500 624678 TA01b 625234fc 1 LTC6252/LTC6253/LTC6254 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V –).................................5.5V Input Current (+IN, –IN, SHDN) (Note 2)............... ±10mA Output Current (Note 3)...................................... ±100mA Operating Temperature Range (Note 4).. –40°C to 125°C Specified Temperature Range (Note 5)... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Junction Temperature............................................ 150°C Lead Temperature (Soldering, 10 sec) MSOP, TSOT Packages Only.............................. 300°C PIN CONFIGURATION TOP VIEW 6V V– 2 5 SHDN + – +IN 3 –IN A 2 – +IN A 3 4 –IN TJMAX = 150°C, qJA = 192°C/W (NOTE 9) + 9 V– 4 S6 PACKAGE 6-LEAD PLASTIC TSOT-23 TOP VIEW OUT A –IN A +IN A V– 7 OUT B + – OUT 1 8 V+ OUT A 1 + 6 –IN B 5 +IN B 1 2 3 4 – + + – TOP VIEW 8 7 6 5 V+ OUT B –IN B +IN B MS8 PACKAGE 8-LEAD PLASTIC MSOP DC PACKAGE 8-LEAD (2mm × 2mm) PLASTIC DFN TJMAX = 150°C, qJA = 163°C/W (NOTE 9) TJMAX = 125°C, qJA = 102°C/W (NOTE 9) EXPOSED PAD (PIN 9) IS V–, MUST BE SOLDERED TO PCB TOP VIEW + – – + 10 9 8 7 6 V+ OUT B –IN B +IN B SHDNB OUT A 1 –IN A 2 +IN A 3 V– 4 MS PACKAGE 10-LEAD PLASTIC MSOP – + + – 1 2 3 4 SHDNA 5 OUT A –IN A +IN A V– 8 V+ 7 OUT B 6 –IN B 5 +IN B OUT A –IN A +IN A V+ +IN B –IN B OUT B TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150°C, qJA = 195°C/W (NOTE 9) TJMAX = 150°C, qJA = 160°C/W (NOTE 9) 1 2 3 4 5 6 7 8 – + + – + – TOP VIEW TOP VIEW + – 16 15 14 13 12 11 10 9 OUT D –IN D +IN D V– +IN C –IN C OUT C MS PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 150°C, qJA = 125°C/W (NOTE 9) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6252CS6#TRMPBF LTC6252CS6#TRPBF LTFRW 6-Lead Plastic TSOT-23 0°C to 70°C LTC6252IS6#TRMPBF LTC6252IS6#TRPBF LTFRW 6-Lead Plastic TSOT-23 –40°C to 85°C LTC6252HS6#TRMPBF LTC6252HS6#TRPBF LTFRW 6-Lead Plastic TSOT-23 –40°C to 125°C LTC6253CDC#TRMPBF LTC6253CDC#TRPBF LFRZ 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C LTC6253IDC#TRMPBF LTC6253IDC#TRPBF LFRZ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C LTC6253CMS8#PBF LTC6253CMS8#TRPBF LTFRX 8-Lead Plastic MSOP 0°C to 70°C LTC6253IMS8#PBF LTC6253IMS8#TRPBF LTFRX 8-Lead Plastic MSOP –40°C to 85°C LTC6253HMS8#PBF LTC6253HMS8#TRPBF LTFRX 8-Lead Plastic MSOP –40°C to 125°C LTC6253CTS8#TRMPBF LTC6253CTS8#TRPBF LTFRY 8-Lead Plastic TSOT-23 0°C to 70°C LTC6253ITS8#TRMPBF LTC6253ITS8#TRPBF LTFRY 8-Lead Plastic TSOT-23 –40°C to 85°C LTC6253HTS8#TRMPBF LTC6253HTS8#TRPBF LTFRY 8-Lead Plastic TSOT-23 –40°C to 125°C 625234fc 2 LTC6252/LTC6253/LTC6254 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6253CMS#PBF LTC6253CMS#TRPBF LTFSB 10-Lead Plastic MSOP 0°C to 70°C LTC6253IMS#PBF LTC6253IMS#TRPBF LTFSB 10-Lead Plastic MSOP –40°C to 85°C LTC6254CMS#PBF LTC6254CMS#TRPBF 6254 16-Lead Plastic MSOP 0°C to 70°C LTC6254IMS#PBF LTC6254IMS#TRPBF 6254 16-Lead Plastic MSOP –40°C to 85°C LTC6254HMS#PBF LTC6254HMS#TRPBF 6254 16-Lead Plastic MSOP –40°C to 125°C TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS (VS = 5V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 5V, 0V; VSHDN = 2V; VCM = VOUT = 2.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage VCM = Half Supply MIN TYP MAX UNITS 50 l –350 –1000 350 1000 µV µV –2.2 –3.3 0.1 l 2.2 –3.3 mV mV –350 –550 50 l 350 550 µV µV –2.75 –4 0.1 l 2.75 4 mV mV VCM = V+ – 0.5V, NPN Mode DVOS Input Offset Voltage Match (Channel-to-Channel) (Note 8) VCM = Half Supply VCM = V+ – 0.5V, NPN Mode VOS TC Input Offset Voltage Drift IB Input Bias Current (Note 7) VCM = Half Supply Input Offset Current –0.75 –1.15 –0.1 0.75 1.15 µA µA 0.8 0.4 1.4 l 3.0 5.0 µA µA –0.5 –0.6 –0.03 l 0.5 0.6 µA µA –0.5 –0.6 –0.03 l 0.5 0.6 µA µA VCM = Half Supply VCM = V+ – 0.5V, NPN Mode en Input Noise Voltage Density f = 1MHz µV/°C l VCM = V+ – 0.5V, NPN Mode IOS –3.5 l 2.75 nV/√Hz Input 1/f Noise Voltage f = 0.1Hz to 10Hz 2 µVP-P in Input Noise Current Density f = 1MHz 4 pA/√Hz CIN Input Capacitance Differential Mode Common Mode 2.5 0.8 pF pF RIN Input Resistance Differential Mode Common Mode 7.2 3 kΩ MΩ AVOL Large Signal Voltage Gain RL = 1k to Half Supply (Note 10) 35 16 60 l V/mV V/mV 5 2.4 13 l V/mV V/mV 85 82 105 l dB dB RL = 100Ω to Half Supply (Note 10) CMRR Common Mode Rejection Ratio VCM = 0V to 3.5V 625234fc 3 LTC6252/LTC6253/LTC6254 ELECTRICAL CHARACTERISTICS (VS = 5V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 5V, 0V; VSHDN = 2V; VCM = VOUT = 2.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VCMR Input Common Mode Range PSRR Power Supply Rejection Ratio VS = 2.5V to 5.25V VCM = 1V Supply Voltage Range (Note 6) VOL Output Swing Low (VOUT – V–) MIN l 0 l 66.5 62 l 2.5 No Load TYP VS 70 Output Swing High (V+ – VOUT) No Load mV mV 60 90 120 mV mV 150 200 320 mV mV 65 100 120 mV mV 115 170 210 mV mV 270 330 450 mV mV –90 –40 –32 mA mA l ISOURCE = 5mA l ISOURCE = 25mA l ISC Output Short-Circuit Current Sourcing l Sinking l IS Supply Current per Amplifier 60 40 VCM = Half Supply 100 3.5 4.8 mA mA 4.25 4.85 5.9 mA mA 42 55 75 µA µA l ISD Disable Supply Current VSHDN = 0.8V l ISHDNL ISHDNH SHDN Pin Current Low SHDN Pin Current High VL SHDN Pin Input Voltage Low VSHDN = 0.8V mA mA 3.3 l VCM = V+ – 0.5V V 40 65 l VOH V 25 l ISINK = 25mA UNITS dB dB 5.25 l ISINK = 5mA MAX –3 –4 –1.6 l 0 0 µA µA –300 –600 35 l 300 600 nA nA 0.8 V VSHDN = 2V l VH SHDN Pin Input Voltage High IOSD Output Leakage Current in Shutdown VSHDN = 0.8V, Output Shorted to Either Supply 100 nA tON Turn-On Time VSHDN = 0.8V to 2V 3.5 µs tOFF Turn-Off Time VSHDN = 2V to 0.8V 2 µs BW –3dB Closed Loop Bandwidth AV = 1, RL = 1k to Half Supply GBW Gain-Bandwidth Product f = 4MHz, RL = 1k to Half Supply l l 2 450 320 V 400 MHz 720 MHz MHz tS , 0.1% Settling Time to 0.1% AV = 1, VO = 2V Step RL = 1k 36 ns SR Slew Rate AV = –1, 4V Step (Note 11) 280 V/µs FPBW Full Power Bandwidth VOUT = 4VP-P (Note 13) 9.5 MHz 625234fc 4 LTC6252/LTC6253/LTC6254 ELECTRICAL CHARACTERISTICS (VS = 5V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 5V, 0V; VSHDN = 2V; VCM = VOUT = 2.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS HD2/HD3 Harmonic Distortion RL = 1k to Half Supply fC = 100kHz, VO = 2VP-P fC = 1MHz, VO = 2VP-P fC = 2.5MHz, VO = 2VP-P fC = 4MHz, VO = 2VP-P 99/109 97/104 83/82 77/71 dBc dBc dBc dBc RL = 100Ω to Half Supply fC = 100kHz, VO = 2VP-P fC = 1MHz, VO = 2VP-P fC = 2.5MHz, VO = 2VP-P fC = 4MHz, VO = 2VP-P 97/90 95/70 87/65 78/59 dBc dBc dBc dBc DG Differential Gain (Note 14) AV = 2, RL = 150Ω, VS = ±2.5V AV = 1, RL = 1kΩ, VS = ±2.5V 0.1 0.02 % % Dq Differential Phase (Note 14) AV = 2, RL = 150Ω, VS = ±2.5V AV = 1, RL = 1kΩ, VS = ±2.5V 0.25 0.05 Deg Deg Crosstalk AV = –1, RL = 1k to Half Supply, VOUT = 2VP-P, f = 2.5MHz –96 dB ELECTRICAL CHARACTERISTICS (VS = 2.7V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 2.7V, 0V; VSHDN = 2V; VCM = VOUT = 1.35V, unless otherwise noted. SYMBOL PARAMETER VOS Input Offset Voltage CONDITIONS MIN TYP MAX UNITS 0 –300 700 l 1250 1500 µV µV –1.6 –2.0 0.9 l 3.2 3.4 mV mV –350 –750 10 l 350 750 µV µV –2.8 –4 0.1 l 2.8 4 mV mV –275 l –1000 –1500 600 900 nA nA 0.6 0 1.175 l 2.5 4.0 µA µA –500 –600 –150 l 500 600 nA nA –500 –600 –30 l 500 600 nA nA VCM = Half Supply VCM = V+ – 0.5V, NPN Mode DVOS Input Offset Voltage Match (Channel-to-Channel) (Note 8) VCM = Half Supply VCM = V+ – 0.5V, NPN Mode VOS TC Input Offset Voltage Drift IB Input Bias Current (Note 7) VCM = Half Supply VCM = V+ – 0.5V, NPN Mode IOS Input Offset Current VCM = Half Supply VCM = V+ – 0.5V, NPN Mode en 2.75 l Input Noise Voltage Density f = 1MHz Input 1/f Noise Voltage f = 0.1Hz to 10Hz 2.9 2 µV/°C nV/√Hz µVP-P in Input Noise Current Density f = 1MHz 3.6 pA/√Hz CIN Input Capacitance Differential Mode Common Mode 2.5 0.8 pF pF RIN Input Resistance Differential Mode Common Mode 7.2 3 kΩ MΩ AVOL Large Signal Voltage Gain RL = 1k to Half Supply (Note 12) 16.5 7 36 l V/mV V/mV RL = 100Ω to Half Supply (Note 12) 2.3 1.8 6.9 l V/mV V/mV 625234fc 5 LTC6252/LTC6253/LTC6254 ELECTRICAL CHARACTERISTICS (VS = 2.7V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 2.7V, 0V; VSHDN = 2V; VCM = VOUT = 1.35V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS CMRR VCM = 0V to 1.2V Common Mode Rejection Ratio VCMR Input Common Mode Range PSRR Power Supply Rejection Ratio VS = 2.5V to 5.25V VCM = 1V Supply Voltage Range (Note 6) VOL Output Swing Low (VOUT – V–) MIN TYP 80 77 105 l l 0 l 66.5 62 l 2.5 No Load 70 Output Swing High (V+ – VOUT) No Load mV mV 80 100 140 mV mV 110 150 190 mV mV 55 75 95 mV mV 125 150 200 mV mV 165 200 275 mV mV –35 –18 –14 mA mA l ISOURCE = 10mA l ISC Short-Circuit Current Sourcing l Sinking l IS Supply Current per Amplifier 20 17 VCM = Half Supply 40 3.5 4.5 mA mA 3.7 4.6 5.5 mA mA 24 35 50 µA µA l ISD Disable Supply Current VSHDN = 0.8V l ISHDNL ISHDNH SHDN Pin Current Low SHDN Pin Current High VSHDN = 0.8V mA mA 2.9 l VCM = V+ – 0.5V V 28 40 l ISOURCE = 5mA dB dB 5.25 l VOH V 22 l ISINK = 10mA UNITS dB dB VS l ISINK = 5mA MAX –1 –1.5 –0.5 l 0 0 µA µA –300 –600 45 l 300 600 nA nA 0.8 V VSHDN = 2V VL SHDN Pin Input Voltage l VH SHDN Pin Input Voltage l IOSD tON Output Leakage Current Magnitude in Shutdown VSHDN = 0.8V, Output Shorted to Either Supply Turn-On Time VSHDN = 0.8V to 2V tOFF Turn-Off Time VSHDN = 2V to 0.8V BW –3dB Closed Loop Bandwidth AV = 1, RL = 1k to Half Supply 350 MHz GBW Gain-Bandwidth Product f = 4MHz, RL = 1k to Half Supply 630 MHz tS , 0.1 Settling Time to 0.1% AV = +1, VO = 2V Step RL = 1k 34 ns SR Slew Rate AV = –1, 2V Step (Note 11) 170 V/µs FPBW Full Power Bandwidth VOUT = 2VP-P (Note 13) 8.5 MHz Crosstalk AV = –1, RL = 1k to Half Supply, VOUT = 2VP-P, f = 2.5MHz 96 dB 2.0 V 100 nA 5 µs 2 µs 625234fc 6 LTC6252/LTC6253/LTC6254 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes. If any of the input or shutdown pins goes 300mV beyond either supply or the differential input voltage exceeds 1.4V the input current should be limited to less than 10mA. This parameter is guaranteed to meet specified performance through design and/or characterization. It is not production tested. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output current is high. This parameter is guaranteed to meet specified performance through design and/or characterization. It is not production tested. Note 4: The LTC6252C/LTC6253C/LTC6254C and LTC6252I/LTC6253I/ LTC6254I are guaranteed functional over the temperature range of –40°C to 85°C. The LTC6252H/LTC6253H/LTC6254H are guaranteed functional over the temperature range of –40°C to 125°C. Note 5: The LTC6252C/LTC6253C/LTC6254C are guaranteed to meet specified performance from 0°C to 70°C. The LTC6252C/LTC6253C/ LTC6254C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LTC6252I/LTC6253I/LTC6254I are guaranteed to meet specified performance from –40°C to 85°C. The LTC6252H/ LTC6253H/LTC6254H are guaranteed to meet specified performance from –40°C to 125°C. Note 6: Supply voltage range is guaranteed by power supply rejection ratio test. Note 7: The input bias current is the average of the average of the currents at the positive and negative input pins. Note 8: Matching parameters are the difference between amplifiers A and D and between B and C on the LTC6254; between the two amplifiers on the LTC6253. Note 9: Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are with short traces connected to the leads with minimal metal area. Note 10: The output voltage is varied from 0.5V to 4.5V during measurement. Note 11: Middle 2/3 of the output waveform is observed. RL = 1k to half supply. Note 12: The output voltage is varied from 0.5V to 2.2V during measurement. Note 13: FPBW is determined from distortion performance in a gain of +2 configuration with HD2, HD3 < –40dBc as the criteria for a valid output. Note 14: Differential gain and phase are measured using a Tektronix TSG120YC/NTSC signal generator and a Tektronix 1780R video measurement set. TYPICAL PERFORMANCE CHARACTERISTICS VOS Distribution, VCM = VS/2 (MS, PNP Stage) 40 40 16 30 30 12 20 15 10 5 PERCENT OF UNITS (%) 25 0 –250 VS = 5V, 0V 14 VCM = 4.5V VS = 5V, 0V 35 VCM = 2.5V PERCENT OF UNITS (%) VS = 5V, 0V 35 VCM = 2.5V PERCENT OF UNITS (%) VOS Distribution, VCM = V+ – 0.5V (MS, NPN Stage) VOS Distribution, VCM = VS/2 (TSOT-23, PNP Stage) 25 20 15 10 250 625234 G01 0 –250 8 6 4 2 5 –150 –50 50 150 INPUT OFFSET VOLTAGE (µV) 10 –150 –50 50 150 INPUT OFFSET VOLTAGE (µV) 250 625234 G02 0 –2000 –1200 –400 400 1200 INPUT OFFSET VOLTAGE (µV) 2000 625234 G03 625234fc 7 LTC6252/LTC6253/LTC6254 TYPICAL PERFORMANCE CHARACTERISTICS VOS Distribution, VCM = V+ – 0.5V (TSOT-23, NPN Stage) VOS vs Temperature, VS = 5V, 0V (MS, PNP Stage) 18 300 VS = 5V, 0V 16 VCM = 4.5V 10 8 6 0 –100 –200 –300 4 –400 2 –500 0 –2000 –1200 –400 400 1200 INPUT OFFSET VOLTAGE (µV) 3200 5 25 45 65 85 105 125 TEMPERATURE (°C) 600 500 5 25 45 65 85 105 125 TEMPERATURE (°C) 625234 G07 1700 1200 700 200 –300 –800 VS = 2.7V, 0V –1300 VCM = 2.2V 6 DEVICES –1800 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 20 OFFSET VOLTAGE (mV) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –55°C 25°C Input Bias Current vs Common Mode Voltage 125°C –1.5 –2.0 3000 VS = ±2.5V TA = 25°C 15 10 5 75 100 625234 G10 125°C 25°C 1000 0 –55°C –1000 –2000 –3000 –4000 –2.5 –3.0 25 50 –100 –75 –50 –25 0 OUTPUT CURRENT (mA) VS = 5V, 0V 2000 INPUT BIAS CURRENT (nA) VS = ±2.5V 5 625234 G09 Warm-Up Drift vs Time CHANGE IN OFFSET VOLTAGE (µV) 2.5 600 V = 5V, 0V 400 S 200 –55°C 0 25°C –200 –400 125°C –600 –800 –1000 –1200 –1400 –1600 –1800 –2000 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 INPUT COMMON MODE VOLTAGE (V) 625234 G08 Offset Voltage vs Output Current 3.0 Offset Voltage vs Input Common Mode Voltage VOS vs Temperature, VS = 2.7V, 0V (MS, NPN Stage) OFFSET VOLTAGE (µV) 700 5 25 45 65 85 105 125 TEMPERATURE (°C) 625234 G06 2200 800 400 –55 –35 –15 VS = 5V, 0V –2000 VCM = 4.5V 6 DEVICES –2500 –55 –35 –15 2700 VOLTAGE OFFSET (µV) VOLTAGE OFFSET (µV) VS = 2.7V, 0V 1100 VCM = 1.35V 6 DEVICES 900 0 –500 625234 G05 VOS vs Temperature, VS = 2.7V, 0V (MS, PNP Stage) 1000 500 –1500 625234 G04 1200 1000 –1000 –600 –55 –35 –15 2000 1500 VOLTAGE OFFSET (µV) VOLTAGE OFFSET (µV) PERCENT OF UNITS (%) 100 12 2000 VS = 5V, 0V VCM = 2.5V 6 DEVICES 200 14 VOS vs Temperature, VS = 5V, 0V (MS, NPN Stage) 0 0 20 40 60 80 100 120 140 160 TIME AFTER POWER-UP (sec) 625234 G11 –5000 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 5 625234 G12 625234fc 8 LTC6252/LTC6253/LTC6254 TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current vs Temperature 2000 VS = 5V, 0V 1500 VOLTAGE NOISE (500nV/DIV) INPUT BIAS CURRENT (nA) 2500 2000 VCM = 4.5V 1500 1000 500 1000 VCM = 2.5V 0 1000 VOLTAGE NOISE (nV/√Hz) CURRENT NOISE (pA/√Hz) 3000 500 0 –500 –1000 –25 5 35 65 TEMPERATURE (°C) 95 125 –2000 0 2 1 3 4 5 6 7 TIME (1s/DIV) 8 in, VCM = 2.5V 10 1.0 5.0 5 en, VCM = 2.5V 2.5 10 100 –55°C 2.0 1.5 in, VCM = 4.5V 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 624678 G15 Supply Current Per Amplifier vs SHDN Pin Voltage 5.0 VS = 5V, 0V 4.5 VCM = 2.5V SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 25°C 3.0 1 TA = 125°C 4.0 125°C 3.5 0.1 10 VS = 5V, 0V AV = 1 4.5 4.0 9 Supply Current vs Input Common Mode Voltage (Per Amplifier) Supply Current vs Supply Voltage (Per Amplifier) 125°C 4 25°C 3 –55°C 1.0 3.5 TA = 25°C 3.0 TA = –55°C 2.5 2.0 1.5 1.0 0.5 0.5 1 3 2 4 TOTAL SUPPLY VOLTAGE (V) 5 16 OFFSET VOLTAGE (mV) 8 6 4 25°C 125°C 2 1.5 2 2.5 3 3.5 4 SHDN PIN VOLTAGE (V) 4.5 5 Minimum Supply Voltage, VCM = V+ – 0.5V (NPN Operation) VS = 5V, 0V 14 10 –55°C 8 6 25°C 4 2 125°C 0 0 625234 G19 1 12 –55°C 10 –2 16 VS = 5V, 0V 12 5 0.5 625234 G18 Minimum Supply Voltage, VCM = VS/2 (PNP Operation) 14 4.5 0 625234 G17 SHDN Pin Current vs SHDN Pin Voltage 0.50 0.25 VS = 5V, 0V 0 –0.25 –0.50 TA = 25°C –0.75 –1.00 TA = –55°C –1.25 –1.50 –1.75 TA = 125°C –2.00 –2.25 –2.50 –2.75 –3.00 0 0.5 1 1.5 2 2.5 3 3.5 4 SHDN PIN VOLTAGE (V) 0 3.25 1.25 2.25 4.25 4.75 COMMON MODE VOLTAGE (V) OFFSET VOLTAGE (mV) 0 2 0.25 625234 G16 SHDN PIN CURRENT (µA) en, VCM = 4.5V 624678 G14 624678 G13 0 100 –1500 –500 –55 SUPPLY CURRENT (mA) Input Noise Voltage and Noise Current vs Frequency 0.1Hz to 10Hz Voltage Noise –2 2 2.5 3 4 4.5 5 3.5 TOTAL SUPPLY VOLTAGE (V) 5.5 625234 G20 –4 2 2.5 3 4 4.5 5 3.5 TOTAL SUPPLY VOLTAGE (V) 5.5 625234 G21 625234fc 9 LTC6252/LTC6253/LTC6254 TYPICAL PERFORMANCE CHARACTERISTICS Output Saturation Voltage vs Load Current (Output Low) Output Saturation Voltage vs Load Current (Output High) 10 1 TA = 125°C TA = 25°C TA = –55°C 0.01 0.01 0.1 1 10 LOAD CURRENT (mA) 1 TA = 125°C TA = 25°C 0.1 TA = –55°C 0.01 0.01 100 0.1 1 10 LOAD CURRENT (mA) 625234 G22 1400 INPUT OFFSET VOLTAGE (µV) RL = 100Ω TO MID SUPPLY 200 RL = 1k TO MID SUPPLY 100 0 –100 RL = 1k TO GND –200 –300 RL = 100Ω TO GND –400 –500 0.5 1 RL = 100Ω TO MID SUPPLY 1.5 2 2.5 3 3.5 OUTPUT VOLTAGE (V) 4 4.5 1200 600 400 RL = 1k TO GND 200 6 55 RL = 100Ω TO GND –200 0 0.5 1 1.5 2 OUTPUT VOLTAGE (V) GAIN (dB) 45 PHASE 2.5 VS = ±1.35V 1 10 FREQUENCY (MHz) 75 25 45 30 VS = ±1.35V VS = ±2.5V 1M 10M 100M FREQUENCY (Hz) 100 1000 625234 G27 900 850 90 VS = ±2.5V 60 5 625234 G28 –4 Gain Bandwidth and Phase Margin vs Supply Voltage 35 –5 300k 2.5 Gain vs Frequency (AV = 1) –8 VS = ±2.5V TA = 25°C RL = 1k –10 0.01 0.1 120 TA = 25°C RL = 1k 105 GAIN 15 1000 2 2.25 1.5 1.75 TOTAL SUPPLY VOLTAGE (±V) 15 0 1G 625234 G29 70 PHASE MARGIN 60 800 50 750 40 700 30 650 GAIN BANDWIDTH PRODUCT 20 600 10 550 TA = 25°C RL = 1k 500 3 3.5 4.5 2.5 4 TOTAL SUPPLY VOLTAGE (V) 0 PHASE MARGIN (DEG) 65 100 TA = –55°C 625234 G26 8 0 SOURCE –6 0 PHASE (DEG) GAIN (dB) –120 –2 800 75 2 TA = 125°C 0 Open Loop Gain and Phase vs Frequency 4 TA = 25°C –80 RL = 1k TO MID SUPPLY 1000 –600 5 Gain vs Frequency (AV = 2) –2 V = ±2.5V S TA = 25°C –4 RL = 1k RF = RG = 500 –6 0.01 0.1 1 10 FREQUENCY (MHz) –40 VS = 2.7V, 0V TA = 25°C 625234 G25 10 0 2 –400 0 PULSE TESTED 625234 G24 GAIN BANDWIDTH (MHz) INPUT OFFSET VOLTAGE (µV) 1600 VS = 5V, 0V TA = 25°C 300 40 Open Loop Gain 400 TA = –55°C 625234 G23 Open Loop Gain 500 TA = 125°C 80 –160 1.25 100 TA = 25°C SINK 120 GAIN (dB) 0.1 160 VS = ±2.5V OUTPUT SHORT-CIRCUIT CURRENT (mA) VS = ±2.5V OUTPUT HIGH SATURATION VOLTAGE (V) OUTPUT HIGH SATURATION VOLTAGE (V) 10 Output Short-Circuit Current vs Supply Voltage –10 5 5.25 625234 G30 625234fc 10 LTC6252/LTC6253/LTC6254 TYPICAL PERFORMANCE CHARACTERISTICS Gain Bandwidth and Phase Margin vs Temperature 100 60 VS = ±1.35V 50 900 800 GAIN BANDWIDTH PRODUCT 40 700 VS = ±2.5V 30 AV = 10 10 AV = 1 1 AV = 2 0.1 0.01 20 600 COMMON MODE REJECTION RATIO (dB) 1000 VS = ±2.5V 70 110 VS = ±2.5V VS = ±1.35V 10 5 25 45 65 85 105 125 TEMPERATURE (°C) 500 –55 –35 –15 0.001 0.1 1 10 100 FREQUENCY (MHz) 625234 G31 –PSRR 50 SLEW RATE (V/µs) POWER SUPPLY REJECTION RATIO (dB) 60 +PSRR 40 30 20 10 0 –10 10 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) 500Ω OVERSHOOT (%) 80 70 –20 VIN – + RS VOUT CL 60 50 40 RS = 20Ω 30 10 0 10 100 1000 CAPACITIVE LOAD (pF) –60 –70 80 625234 G37 VS = ±2.5V 70 60 VIN 100M – + RS 40 RL = 1k, 2ND –90 –130 0.01 VOUT RS = 10Ω 30 RS = 20Ω 20 RS = 50Ω 10 0 10 100 1000 CAPACITIVE LOAD (pF) 10000 625234 G36 –40 RL = 100Ω, 3RD 1G CL 50 –30 –80 –120 10000 1M 10M FREQUENCY (Hz) Series Output Resistor vs Capacitive Load (AV = 1) –20 –50 –50 –60 Distortion vs Frequency (AV = 1, 2.7V) RL = 100Ω, 3RD RL = 100Ω, 2ND RL = 1k, 2ND –70 –80 –90 RL = 1k, 3RD –100 –110 RS = 50Ω 100k 625234 G33 Distortion vs Frequency (AV = 1, 5V) –100 RS = 10Ω 20 –10 10k VS = ±2.5V –30 V OUT = 2VP-P –40 AV = 1 500Ω DISTORTION (dBc) 90 10 625234 G35 Series Output Resistor vs Capacitive Load (AV = 2) VS = ±2.5V 30 1000 360 V = ±2.5V 340 S 320 RISING, VS = ±2.5V 300 280 FALLING, VS = ±2.5V 260 240 RISING, VS = ±1.35V 220 200 FALLING, VS = ±1.35V 180 160 AV = –1, RL = 1k, 140 VOUT = 4VP-P (±2.5V), 2VP-P (±1.35V) 120 SLEW RATE MEASURED AT MIDDLE 2/3 OF OUTPUT 100 –55 –30 95 120 5 20 45 70 TEMPERATURE (°C) 625234 G34 100 50 Slew Rate vs Temperature VS = ±2.5V 70 70 625234 G32 Power Supply Rejection Ratio vs Frequency 80 VS = ±2.5V 90 OVERSHOOT (%) PHASE MARGIN 1000 PHASE MARGIN (DEG) GAIN BANDWIDTH (MHz) 1100 80 DISTORTION (dBc) TA = 25°C RL = 1k OUTPUT IMPEDANCE (Ω) 1200 Common Mode Rejection Ratio vs Frequency Output Impedance vs Frequency RL = 1k, 3RD 0.1 RL = 100Ω, 2ND 1 10 FREQUENCY (MHz) 100 625234 G38 –110 VS = ±1.35V –120 VOUT = 1VP-P AV = 1 –130 0.1 1 10 0.01 FREQUENCY (MHz) 100 625234 G39 625234fc 11 LTC6252/LTC6253/LTC6254 TYPICAL PERFORMANCE CHARACTERISTICS Distortion vs Frequency AV = 2, 2.7V) RL = 100Ω, 3RD –70 –80 RL = 100Ω, 2ND –90 –100 DISTORTION (dBc) DISTORTION (dBc) VS = ±1.35V –30 V OUT = 1VP-P –40 AV = 2 RL = 1k, 3RD –60 RL = 100Ω, 3RD –50 –60 RL = 100Ω, 2ND –70 –80 –90 RL = 1k, 3RD –100 RL = 1k, 2ND –110 –110 –120 RL = 1k, 2ND 0.1 1 10 FREQUENCY (MHz) 100 –130 0.01 0.1 625234 G40 3 2 1 40 VIN 35 – + 100 VS = ±2.5V TA = 25°C RL = 1k HD2, HD3 < –40dBc 0 0.01 0.1 1 10 FREQUENCY (MHz) 100 625234 G42 0.1% Settling Time vs Output Step (Inverting) SHDN Pin Response Time 60 VOUT VS = ±2.5V AV = –1 50 TA = 25°C 45 55 1k SETTLING TIME (ns) VS = ±2.5V AV = 1 TA = 25°C 45 SETTLING TIME (ns) 4 625234 G41 0.1% Settling Time vs Output Step (Noninverting) 50 1 10 FREQUENCY (MHz) AV = 2 AV = –1 5 –120 –130 0.01 30 25 20 15 VSHDN 2.5V/DIV 0V 40 35 30 500Ω 25 VIN 20 15 10 500Ω – + VOUT 0.8V/DIV VOUT 0V 1k 10 5 0 6 –20 VS = ±2.5V –30 V OUT = 2VP-P –40 AV = 2 –50 Maximum Undistorted Output Signal vs Frequency OUTPUT VOLTAGE SWING (VP-P) –20 Distortion vs Frequency (AV = 2, 5V) 5 –4 –3 –2 –1 0 1 2 OUTPUT STEP (V) 3 4 0 –4 –3 –2 –1 0 1 2 OUTPUT STEP (V) 3 4 AV = 1 VS = ±2.5V RL = 1k VIN = 1.6V 625234 G44 625234 G43 Large Signal Response Small Signal Response 1V/DIV 2µs/DIV 625234 G45 Output Overdriven Recovery INPUT (50mV/DIV) 0V VIN 1V/DIV OUTPUT (50mV/DIV) VOUT 2V/DIV 0V 0V 0V 0V AV = 1 VS = ±2.5V TA = 25°C RL = 1k 100ns/DIV 625234 G46 VS = ±2.5V RL = 1k 20ns/DIV 625234 G47 20ns/DIV AV = ±2, TA = 25°C VS = ±2.5V, VIN = 3VP-P RL = 1k, RF = RG = 500Ω 625234 G48 625234fc 12 LTC6252/LTC6253/LTC6254 PIN FUNCTIONS –IN: Inverting Input of Amplifier. Input range from V– to V+. V– : Negative Supply Voltage. Typically 0V. This can be made a negative voltage as long as 2.5V ≤ (V+ – V–) ≤ 5.25V. +IN: Non-Inverting Input of Amplifier. Input range from V– to V+. SHDN: Active Low Shutdown. Threshold is typically 1.1V referenced to V–. Floating this pin will turn the part on. V+ : Positive Supply Voltage. Total supply voltage ranges from 2.5V to 5.25V. OUT: Amplifier Output. Swings rail-to-rail and can typically source/sink over 90mA of current at a total supply of 5V. APPLICATIONS INFORMATION Circuit Description The LTC6252/LTC6253/LTC6254 have an input and output signal range that extends from the negative power supply to the positive power supply. Figure 1 depicts a simplified schematic of the amplifier. The input stage is comprised of two differential amplifiers, a PNP stage, Q1/Q2, and an NPN stage, Q3/Q4 that are active over different common mode input voltages. The PNP stage is active between the negative supply to nominally 1.2V below the positive supply. As the input voltage approaches the positive supply, the transistor Q5 will steer the tail current, I1, to the current mirror, Q6/Q7, activating the NPN differential pair and the PNP pair becomes inactive for the remaining input common mode range. Also, at the input stage, devices Q17 to Q19 act to cancel the bias current of the PNP input pair. When Q1/Q2 are active, the current in Q16 is controlled to be the same as the current in Q1 and Q2. Thus, the base current of Q16 is nominally equal to the base current of the input devices. The base current of Q16 is then mirrored by devices Q17 to Q19 to cancel the base current of the input devices Q1/Q2. A pair of complementary common emitter stages, Q14/Q15, enable the output to swing from rail-to-rail. V+ V+ + ESDD1 I2 R3 V– ESDD2 + I1 D6 D8 D5 D7 –IN CC Q4 Q3 Q1 Q16 Q17 Q18 Q19 Q7 ESDD5 V– OUT Q9 V+ I3 Q2 BUFFER AND OUTPUT BIAS Q10 V– C2 + VBIAS Q5 Q15 Q13 ESDD3 ESDD4 R5 Q12 Q11 +IN R4 ESDD6 Q8 C1 Q6 R1 R2 V– Q14 625234 F01 Figure 1. LTC6252/LTC6253/LTC6254 Simplified Schematic Diagram 625234fc 13 LTC6252/LTC6253/LTC6254 APPLICATIONS INFORMATION Input Offset Voltage Input Protection The offset voltage will change depending upon which input stage is active. The PNP input stage is active from the negative supply rail to approximately 1.2V below the positive supply rail, then the NPN input stage is activated for the remaining input range up to the positive supply rail with the PNP stage inactive. The offset voltage magnitude for the PNP input stage is trimmed to less than 350µV with 5V total supply at room temperature, and is typically less than 150μV. The offset voltage for the NPN input stage is less than 2.2mV with 5V total supply at room temperature. The LTC6252/LTC6253/LTC6254 input stages are protected against a large differential input voltage of 1.4V or higher by 2 pairs of back-to-back diodes to prevent the emitterbase breakdown of the input transistors. In addition, the input and shutdown pins have reverse biased diodes connected to the supplies. The current in these diodes must be limited to less than 10mA. The amplifiers should not be used as comparators or in other open loop applications. Input Bias Current The LTC6252 family uses a bias current cancellation circuit to compensate for the base current of the PNP input pair. This results in a typical IB of about 100nA. When the input common mode voltage is less than 200mV, the bias cancellation circuit is no longer effective and the input bias current magnitude can reach a value above 4µA. For common mode voltages ranging from 0.2V above the negative supply to 1.2V below the positive supply, the low input bias current allows the amplifiers to be used in applications with high source resistances where errors due to voltage drops must be minimized. Output The LTC6252 family has excellent output drive capability. The amplifiers can typically deliver 90mA of output drive current at a total supply of 5V. The maximum output current is a function of the total supply voltage. As the supply voltage to the amplifier decreases, the output current capability also decreases. Attention must be paid to keep the junction temperature of the IC below 150°C (refer to the Power Dissipation Section) when the output is in continuous short-circuit. The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, extremely high current will flow through these diodes which can result in damage to the device. Forcing the output to even 1V beyond either supply could result in several hundred milliamps of current through either diode. ESD The LTC6252 family has reverse-biased ESD protection diodes on all inputs and outputs as shown in Figure 1. There is an additional clamp between the positive and negative supplies that further protects the device during ESD strikes. Hot plugging of the device into a powered socket must be avoided since this can trigger the clamp resulting in larger currents flowing between the supply pins. Capacitive Loads The LTC6252/LTC6253/LTC6254 are optimized for high bandwidth and low power applications. Consequently they have not been designed to directly drive large capacitive loads. Increased capacitance at the output creates an additional pole in the open loop frequency response, worsening the phase margin. When driving capacitive loads, a resistor of 10Ω to 100Ω should be connected between the amplifier output and the capacitive load to avoid ringing or oscillation. The feedback should be taken directly from the amplifier output. Higher voltage gain configurations tend to have better capacitive drive capability than lower gain configurations due to lower closed loop bandwidth and hence higher phase margin. The graphs titled Series Output Resistor vs Capacitive Load demonstrate the transient response of the amplifier when driving capacitive loads with various series resistors. 625234fc 14 LTC6252/LTC6253/LTC6254 APPLICATIONS INFORMATION Feedback Components Power Dissipation When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the parasitic capacitance at the inverting input does not degrade stability. For example if the amplifier is set up in a gain of +2 configuration with gain and feedback resistors of 5k, a parasitic capacitance of 5pF (device + PC board) at the amplifier’s inverting input will cause the part to oscillate, due to a pole formed at 12.7MHz. An additional capacitor of 5pF across the feedback resistor as shown in Figure 2 will eliminate any ringing or oscillation. In general, if the resistive feedback network results in a pole whose frequency lies within the closed loop bandwidth of the amplifier, a capacitor can be added in parallel with the feedback resistor to introduce a zero whose frequency is close to the frequency of the pole, improving stability. The LTC6252 and LTC6253 contain one and two amplifiers respectively. Hence the maximum on-chip power dissipation for them will be less than the maximum on-chip power dissipation for the LTC6254, which contains four amplifiers. 5pF 5k – CPAR TJ = TA + (PD • qJA) The power dissipation in the IC is a function of the supply voltage, output voltage and load resistance. For a given supply voltage with output connected to ground or supply, the worst-case power dissipation PD(MAX) occurs when the supply current is maximum and the output voltage at half of either supply voltage for a given load resistance. PD(MAX) is approximately (since IS actually changes with output load current) given by: 2 VOUT + 5k VIN The LTC6254 is housed in a small 16-lead MS package and typically has a thermal resistance (qJA) of 125°C/ W. It is necessary to ensure that the die’s junction temperature does not exceed 150°C. The junction temperature, TJ, is calculated from the ambient temperature, TA, power dissipation, PD, and thermal resistance, qJA: 624678 F02 Figure 2. 5pF Feedback Cancels Parasitic Pole Shutdown The LTC6252 and LTC6253MS have SHDN pins that can shut down the amplifier to 42µA typical supply current. The SHDN pin needs to be taken within 0.8V of the negative supply for the amplifier to shut down. When left floating, the SHDN pin is internally pulled up to the positive supply and the amplifier remains on. V PD(MAX) = (VS •IS(MAX) ) + S / RL 2 Example: For an LTC6254 in a 16-lead MS package operating on ±2.5V supplies and driving a 100Ω load to ground, the worst-case power dissipation is approximately given by PD(MAX)/Amp = (5 • 4.8mA) + (1.25)2/100 = 39.6mW If all four amplifiers are loaded simultaneously then the total power dissipation is 158mW. At the Absolute Maximum ambient operating temperature, the junction temperature under these conditions will be: TJ = TA + PD • 125°C/W = 125 + (0.158W • 125°C/W) = 145°C which is less than the absolute maximum junction temperature for the LTC6254 (150°C). Refer to the Pin Configuration section for thermal resistances of various packages. 625234fc 15 LTC6252/LTC6253/LTC6254 TYPICAL APPLICATIONS 5V Single-Supply 16-Bit ADC Driver Figure 3 shows the LTC6253 driving an LTC2393-16 16-bit A/D converter on a single 5V supply. The low wideband noise of the LTC6253 helps to achieve better than 93dB SNR. A gain of 1.17V/V is taken in the first amplifier, giving an input voltage range of 3.5VP-P for a full-scale input to the ADC. By taking a small amount of gain, a –1dBFS output can be easily obtained without the amplifier transitioning between input regions, thus minimizing crossover distortion. Furthermore, by driving VCM with 2.08V from the ADC’s VCM pin, the LTC6253 is capable of driving the LTC2393-16 to within 0.1dB of full scale. Figure 4 shows an FFT obtained with a sampling rate of 1Msps and a 20kHz input waveform. Spurious free dynamic range is an excellent 104.7dB. 5V VIN 27.4mV TO (3.5V + 27.4mV) 5V + 10µF ½ LTC6253 0.1µF – 143Ω 845Ω 5V 10µF AVP 2.5k 249Ω 2.5k – 5V 100Ω ½ LTC6253 + 4.7µF DVP OVP IN+ 3900pF 249Ω 0.1µF 1.8V TO 5V LTC2393-16 100Ω IN– VCM REFIN REFOUT CNVST PD RESET GND OGND PARALLEL OR 16 BIT SERIAL INTERFACE SER/PAR BYTESWAP OB/2C CS RD BUSY 625234 F03 ~2.08V 10µF 1µF SAMPLE CLOCK Figure 3. 5V Single Supply 16-Bit ADC Driver 0 fS = 1Msps F1 = 20.111kHz F1 AMPLITUDE = –1.032dBFS SNR = 93.28dB THD = –100.50dB SINAD = 92.53dB SFDR = 104.7dB F2 = –106.39dBc F3 = –104.70dBc F4 = –114.13dBc F5 = –105.48dBc –20 AMPLITUDE (dBFS) –40 –60 –80 –100 –120 –140 –160 0 100 200 300 FREQUENCY (kHz) 400 500 624678 F04 Figure 4. LTC6253 Driving LTC2393-16 16b ADC 5V Single-Supply Performance 625234fc 16 LTC6252/LTC6253/LTC6254 TYPICAL APPLICATIONS Low Noise Gain Block Using Channels in Parallel Multiplexing Channels Figure 5 shows the LTC6254 configured as a low noise gain block. By configuring each channel as a gain of 10 block and putting all four gain blocks in parallel, the input referred noise can be reduced significantly. 22Ω resistors are hooked up to the outputs of each of the channels to ensure even distribution of load currents.For a total supply current of 13.2mA, measured input referred noise density (including contributions from the resistors) between 100kHz and 10MHz was less than 1.6nV/√Hz, with input referred noise density at 1 MHz being 1.5nV/√Hz. The measured –3dB frequency was 37MHz for a load resistance of 1k. The LTC6252 and LTC6253 are available with shutdown pins in the SOT-23 and MS10 packages. While this allows for reduced power consumption, it also makes the parts suitable for high output impedance applications such as muxing. During shutdown, the bases of the amplifier’s output channels are hard tied to their emitters in order to minimize leakage. Figure 6 shows the LTC6253 applied as a mux, with the outputs simply shorted together. Depending on which device is powered, either the VA or the VB input is buffered to VOUT. The MOSFET Q1 provides a simple logic inversion, so that pulling the gate high selects the B path while the FET drain goes low shutting down the A path. R3 is provided to speed up the drain rise time. The LTC6253 turn-on time is longer than the turn-off time (3.5µs vs < 2µs) avoiding cross conduction in the output 1pF 900Ω 100Ω – 2.5V ¼ LTC6254 22Ω + VA R1 330Ω + 5V ½ LTC6253 1pF – SHDNA 900Ω VOUT 100Ω – ¼ LTC6254 22Ω VB + 5V R2 330Ω R3 20k + ½ LTC6253 – SHDNB 1pF 900Ω 100Ω – ¼ LTC6254 SEL_B 22Ω Q1 2N7002 625234 F06 + Figure 6. Multiplexing Channels 1pF VOUT 900Ω 100Ω – ¼ LTC6254 VIN 22Ω 625234 F05 + –2.5V Figure 5. Low Noise Gain Block Using Parallel Channels 625234fc 17 LTC6252/LTC6253/LTC6254 TYPICAL APPLICATIONS stages. See the oscillograph of Figure 7, showing the inputs VA and VB, the SEL_B control, and the resulting output. Note that there are protection diodes across the op amp inputs, so large signals at the output will feed back into the upstream off channel through the diodes. R1 and R2 were put in place to reduce the loading on the output, as well as to reduce the upstream feedback current and improve reverse isolation. Some reverse crosstalk can be discerned in the VA and VB traces during their respective off times, however, as the reverse current works back into the 50Ω source impedance of the function generators. VA VB 5V/DIV SEL_B VOUT 625234 F07 50µs/DIV Figure 7. Oscilloscope Traces Showing Multiplexing Channels VS+ High Speed Low Voltage Instrumentation Amplifier Figure 8 shows a three op amp instrumentation amplifier with a gain of 41V/V which can operate on low supplies. Op amps U1 and U2 are channels from an LTC6253. Op amp U3 can be an LTC6252 or one channel of an LTC6253. Figure 9 shows the measured frequency response of the instrumentation amplifier for a load of 1kΩ. Figure 10 shows the measured CMRR of the instrumentation amplifier, and Figure 11 shows the transient response for a 50mVP-P input square wave applied to the positive input, with the negative input grounded. + IN+ R4 750Ω U1 ½ LTC6253 R6 750Ω – VS+ R2 1.2k R1 60Ω U3 ½ LTC6253 R3 1.2k – U2 ½ LTC6253 IN– + + VS– – R5 750Ω VOUT VS– R7 750Ω 625234 F08 AV = 41 BW = 15MHz VS = ±1.5V IS = 8.4mA Figure 8. High Speed Low Voltage Instrumentation Amplifier 120 40 35 OUTPUT 1V/DIV 100 0V 80 25 CMRR (dB) GAIN (dB) 30 20 15 60 INPUT 25mV/DIV 0V 40 10 20 5 0 10k 100k 1M 10M FREQUENCY (Hz) 100M 625234 F09 Figure 9. Instrumentation Amplifier Frequency Response 0 10k 100k 1M 10M FREQUENCY (Hz) 100M 100ns/DIV 625234 F11 625234 F10 Figure 10. Instrumentation Amplifier CMRR Figure 11. Transient Response, Instrumentation Amplifier 625234fc 18 LTC6252/LTC6253/LTC6254 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DC8 Package 8-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1719 Rev A) 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 0.64 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.45 BSC 1.37 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.05 TYP 2.00 ±0.10 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) R = 0.115 TYP 5 8 0.40 ± 0.10 0.64 ± 0.10 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER (DC8) DFN 0106 REVØ 4 0.200 REF 1 0.23 ± 0.05 0.45 BSC 0.75 ±0.05 1.37 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 625234fc 19 LTC6252/LTC6253/LTC6254 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) DETAIL “A” 8 7 6 5 0° – 6° TYP GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) 0.52 (.0205) REF 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC 0.18 (.007) 1 1.10 (.043) MAX RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 2 3 4 0.86 (.034) REF 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS8) 0307 REV F 625234fc 20 LTC6252/LTC6253/LTC6254 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661 Rev E) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.50 0.305 ± 0.038 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 10 9 8 7 6 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0.497 ± 0.076 (.0196 ± .003) REF 0° – 6° TYP GAUGE PLANE 1 2 3 4 5 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 0.86 (.034) REF 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS) 0307 REV E 625234fc 21 LTC6252/LTC6253/LTC6254 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS Package MSPlastic Package 16-Lead MSOP Plastic MSOP Rev Ø) (Reference16-Lead LTC DWG # 05-08-1669 (Reference LTC DWG # 05-08-1669 Rev Ø) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 4.039 ± 0.102 (.159 ± .004) (NOTE 3) 0.50 (.0197) BSC 0.305 ± 0.038 (.0120 ± .0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) DETAIL “A” 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) 0° – 6° TYP 0.280 ± 0.076 (.011 ± .003) REF 16151413121110 9 GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.86 (.034) REF 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS16) 1107 REV Ø 625234fc 22 LTC6252/LTC6253/LTC6254 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 1.90 BSC S6 TSOT-23 0302 REV B 625234fc 23 LTC6252/LTC6253/LTC6254 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637 Rev A) 0.40 MAX 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 – 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0710 REV A NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 625234fc 24 LTC6252/LTC6253/LTC6254 REVISION HISTORY REV DATE DESCRIPTION A 9/10 Revised ISD Parameters in Electrical Characteristics section PAGE NUMBER B 6/11 Added H-grade MS8 to Order Information section C 1/12 Updated Electrical Characteristics 4, 5 2 3 to 6 625234fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 25 LTC6252/LTC6253/LTC6254 TYPICAL APPLICATION 2MHz, 1MΩ Single Supply Photodiode Amplifier 500 R1 1M, 1% C1 0.1pF 3V R2 1k IPD Q1 NXP BF862 C2 6.8nF FILM OR NPO PD1 OSRAM SFH213 3V Photodiode Amplifier Noise Spectrum R3 1k R4 10k 50nV/√Hz PER DIV 3V + VOUT ≈ 0.5V + IPD • 1M LTC6252 – –3dB BW = 2MHz ICC = 4.5mA OUTPUT NOISE = 360µVRMS MEASURED ON A 2MHz BW C3 0.1µF 0 5kHz 100kHz 2MHz 625234 TA02b Photodiode Amplifier Transient Response R5 20k 625234 TA02a 5V/DIV LED DRIVER VOLTAGE 500mV/DIV OUTPUT WAVEFORM 0V 200ns/DIV 625234 TA02c RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Operational Amplifiers LT1818/LT1819 Single/Dual Wide Bandwidth, High Slew Rate Low Noise and Distortion Op Amps 400MHz, 9mA, 6nV/√Hz, 2500V/µs, 1.5mV –85dBc at 5MHz LT1806/LT1807 Single/Dual Low Noise Rail-to-Rail Input and Output Op Amps 325MHz, 13mA, 3.5nV/√Hz, 140V/µs, 550µV, 85mA Output Drive LTC6246/LTC6247/ LTC6248 Single/Dual/Quad High Speed Rail-to-Rail Input and Output Op Amps 180MHz, 1mA, 4.2nV/√Hz, 90V/µs, 0.5mV LT6230/LT6231/ LT6232 Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps 215MHz, 3.5mA, 1.1nV/√Hz, 70V/µs, 350µV LT6200/LT6201 Single/Dual Ultralow Noise Rail-to-Rail Input/Output Op Amps 165MHz, 20mA, 0.95nV/√Hz, 44V/µs, 1mV LT6202/LT6203/ LT6204 Single/Dual/Quad Ultralow Noise Rail-to-Rail Op Amp 100MHz, 3mA, 1.9nV/√Hz, 25V/µs, 0.5mV LT1468 16-Bit Accurate Precision High Speed Op Amp 90MHz, 3.9mA, 5nV/√Hz, 22V/µs, 175µV, –96.5dB THD at 10VP-P, 100kHz LT1801/LT1802 Dual/Quad Low Power High Speed Rail-to-Rail Input and Output Op Amps 80MHz, 2mA, 8.5nV√Hz, 25V/µs, 350µV LT1028 Ultralow Noise, Precision High Speed Op Amps 75MHz, 9.5mA, 0.85nV/√Hz, 11V/µs, 40µV LTC6350 Low Noise Single-Ended to Differential Converter/ADC Driver 33MHz (–3dB), 4.8mA, 1.9nV/√Hz, 240ns Settling to 0.01% 8VP-P LTC2393-16 1Msps 16-Bit SAR ADC 94dB SNR LTC2366 3Msps, 12-Bit ADC Serial I/O 72dB SNR, 7.8mW No Data Latency TSOT-23 Package LTC2365 1Msps, 12-Bit ADC Serial I/O 73dB SNR, 7.8mW No Data Latency TSOT-23 Package ADCs 625234fc 26 Linear Technology Corporation LT 0112 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com ” LINEAR TECHNOLOGY CORPORATION 2010