Si5459DU Datasheet

Si5459DU
www.vishay.com
Vishay Siliconix
P-Channel 20 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
RDS(on) ()
ID (A) a
0.052 at VGS = -4.5 V
-8 e
0.082 at VGS = -2.5 V
-7.5
VDS (V)
-20
• TrenchFET® power MOSFET
Qg (TYP.)
• 100 % Rg tested
8
• Material categorization: 
for definitions of compliance
www.vishay.com/doc?99912
please
see
PowerPAK® ChipFET® Single
D
D
D 7 8
S 6
5
9
1.
m
m
1
m
0m
3.
S
9
Top View
APPLICATIONS
S
• Load switch
• HDD DC/DC
1
2
3 D D
4 D
G
Bottom View
G
Ordering Information: 
Si5459DU-T1-GE3 (Lead (Pb)-free and halogen-free)
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
-20
Gate-Source Voltage
VGS
± 12
TC = 70 °C
TA = 25 °C
-8 e
ID
-6.7 b, c
-5.3 b, c
TA = 70 °C
Pulsed Drain Current (10 μs pulse width)
Source-Drain Current Diode Current
IDM
TC = 25 °C
TA = 25 °C
TC = 70 °C
TA = 25 °C
-8 e
IS
-2.9 b, c
10.9
7
PD
W
3.5 b, c
2.2 b, c
TA = 70 °C
Operating Junction and Storage Temperature Range
A
-20
TC = 25 °C
Maximum Power Dissipation
V
-8 e
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
UNIT
TJ, Tstg
-50 to 150
Soldering Recommendations (Peak temperature) d, e
°C
260
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
LIMIT
TYPICAL
MAXIMUM
Maximum Junction-to-Ambient b, d
t  10 s
RthJA
30
36
Maximum Junction-to-Case (Drain)
Steady State
RthJC
9.5
11.5
UNIT
°C/W
Notes
a. Based on TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. Maximum under steady state conditions is 72 °C/W.
e. Package limited.
f. See solder profile (www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection.
g. Rework conditions: Manual soldering with a soldering iron is not recommended for leadless components.
S16-0980-Rev. C, 23-May-16
Document Number: 65017
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5459DU
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
TYP. a
MAX.
UNIT
-20
-
-
V
-
-19
-
-
3.1
-
SYMBOL
TEST CONDITIONS
MIN.
VDS
VGS = 0 V, ID = -250 μA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VGS(th) Temperature Coefficient
VDS/TJ
ID = -250 μA
VGS(th)/TJ
Gate Threshold Voltage
mV/°C
VGS(th)
VDS = VGS, ID = -250 μA
-0.6
-
-1.4
V
Gate-Body Leakage
IGSS
VDS = 0 V, VGS = ± 12 V
-
-
-100
nA
Zero Gate Voltage Drain Current
IDSS
On-State Drain Current b
ID(on)
Drain-Source On-State Resistance b
Forward Transconductance b
RDS(on)
gfs
VDS = -20 V, VGS = 0 V
-
-
-1
VDS = -20 V, VGS = 0 V, TJ = 55 °C
-
-
-10
VDS =  -5 V, VGS = -10 V
-20
-
-
A

VGS = -4.5 V, ID = -6.7 A
-
0.043
0.052
VGS = -2.5 V, ID = -1 A
-
0.068
0.082
VDS = -10 V, ID = -6.7 A
-
11
-
-
665
-
-
140
-
-
115
-
-
17
26
μA
S
Dynamic a
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
VDS = -10 V, VGS = 0 V, f = 1 MHz
VDS = -10 V, VGS = -10 V, ID = -6.7 A
pF
-
8
12
VDS = -10 V, VGS = -4.5 V, ID = -6.7 A
-
2
-
-
3
-
f = 1 MHz
1.2
6
12
-
6
12
-
15
23
-
26
39
tf
-
9
18
td(on)
-
21
32
-
50
75
-
29
44
-
13
20
-
-
-8
-
-
-20
-
-0.77
-1.2
V
-
30
45
ns
-
17
26
nC
-
16
-
-
14
-
td(on)
VDD = -10 V, RL = 1.9 
ID  -5.3 A, VGEN = -10 V, Rg = 1 
tr
td(off)
VDD = -10 V, RL = 1.9 
ID  -5.3 A, VGEN = -4.5 V, Rg = 1 
tr
td(off)
tf
nC

ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode
Current
IS
Pulse Diode Forward Current a
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
TC = 25 °C
IS = -5.3 A
IF = -5.3 A, dI/dt = 100 A/μs, TJ = 25 °C
A
ns
Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width  300 μs, duty cycle  2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S16-0980-Rev. C, 23-May-16
Document Number: 65017
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5459DU
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
20
3.0
VGS = 5 V thru 3 V
2.5
I D - Drain Current (A)
ID - Drain Current (A)
15
10
VGS = 2.5 V
2.0
1.5
TC = 25 °C
1.0
5
0.5
TC = 125 °C
VGS = 2 V
0.5
1.0
1.5
2.0
TC = - 55 °C
0.0
0.0
2.5
0.5
1.0
1.5
2.0
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.16
1200
0.12
900
C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
0
0.0
VGS = 2.5 V
0.08
Ciss
600
300
0.04
2.5
Coss
VGS = 4.5 V
Crss
0
0
0
5
10
15
20
0
4
ID - Drain Current (A)
8
16
20
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
10
1.6
R DS(on) - On-Resistance (Normalized)
ID = 6.7 A
VGS - Gate-to-Source Voltage (V)
12
VDS - Drain-to-Source Voltage (V)
8
VDS = 10 V
6
VDS = 16 V
4
2
0
0
3
6
9
12
15
18
1.5
1.4
VGS = 4.5 V; I D = - 6.7 A
1.3
1.2
1.1
VGS = 2.5 V; I D = - 5.3 A
1.0
0.9
0.8
0.7
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
S16-0980-Rev. C, 23-May-16
150
Document Number: 65017
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5459DU
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100
0.15
RDS(on) - On-Resistance (Ω)
I S - Source Current (A)
ID = - 6.7 A
10
TJ = 25 °C
TJ = 150 °C
1
0.12
0.09
TJ = 125 °C
0.06
0.03
TJ = 25 °C
0.00
2.0
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
3.0
3.5
4.0
4.5
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
1.3
30
1.2
25
1.1
5.0
20
Power (W)
VGS(th) (V)
2.5
VSD - Source-to-Drain Voltage (V)
1.0
ID = 250 µA
0.9
15
10
0.8
5
0.7
0.6
- 50
0
- 25
0
25
50
75
100
125
0.001
150
0.01
TJ - Temperature (°C)
0.1
1
10
100
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
Limited by RDS(on)*
ID - Drain Current (A)
10
100 µs
1 ms
1
10 ms
100 ms
1s
10 s
0.1
TA = 25 °C
Single Pulse
0.01
0.1
BVDSS
Limited
DC
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
S16-0980-Rev. C, 23-May-16
Document Number: 65017
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5459DU
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
15
ID - Drain Current (A)
12
9
6
3
0
0
25
50
75
100
125
150
TC - Case Temperature (°C)
15
2.5
12
2.0
Power (W)
Power (W)
Current Derating a
9
6
3
1.5
1.0
0.5
0
0.0
0
25
50
75
100
125
TC - Case Temperature (°C)
Power Derating, Junction-to-Case
150
0
25
50
75
100
125
150
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Ambient
Note
a. The power dissipation PD is based on TJ (max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit.
S16-0980-Rev. C, 23-May-16
Document Number: 65017
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5459DU
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
Notes:
0.05
PDM
0.02
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 72 °C/W
3. TJM - T A = PDMZthJA(t)
Single Pulse
0.01
10 -4
4. Surface Mounted
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
100
10
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.05
Single Pulse
0.1
10 -4
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65017.
S16-0980-Rev. C, 23-May-16
Document Number: 65017
6
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
PowerPAK® ChipFET® Case Outline
D
(7)
(6)
(5)
(1)
(2)
(3)
(4)
E
(8)
Pin #1
indicator
Side view of single
e
b
H
D1
D(2)
D2
K
D(3)
L
G(4)
K1
D2
SI(1)
GI(2)
S2(3)
D1(8)
D1(7)
D2(6)
Detail Z
G2(4)
K2
L
D(1)
A1
C
A
Z
Side view of dual
E1
E2
E3
H
D3
D(8)
D(7)
D(6)
S(5)
K3
Backside view of dual pad
Backside view of single pad
DIM.
D2(5)
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.70
0.75
0.85
0.028
0.030
0.033
A1
0
-
0.05
0
-
0.002
b
0.25
0.30
0.35
0.010
0.012
0.014
C
0.15
0.20
0.25
0.006
0.008
0.010
D
2.92
3.00
3.08
0.115
0.118
0.121
D1
1.75
1.87
2.00
0.069
0.074
0.079
D2
1.07
1.20
1.32
0.042
0.047
0.052
D3
0.20
0.25
0.30
0.008
0.010
0.012
E
1.82
1.90
1.98
0.072
0.075
0.078
E1
1.38
1.50
1.63
0.054
0.059
0.064
E2
0.92
1.05
1.17
0.036
0.041
0.046
E3
0.45
0.50
0.55
0.018
0.020
0.022
e
0.65 BSC
0.026 BSC
H
0.15
0.20
0.25
0.006
0.008
0.010
K
0.25
-
-
0.010
-
-
K1
0.30
-
-
0.012
-
-
K2
0.20
-
-
0.008
-
-
K3
0.20
-
-
0.008
-
-
L
0.30
0.35
0.40
0.012
0.014
0.016
C14-0630-Rev. E, 21-Jul-14
DWG: 5940
Note
• Millimeters will govern
Document Number: 73203
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revision: 21-Jul-14
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Single
0.225
(0.009)
0.350
(0.014)
0.650
(0.026)
0.200
(0.008)
0.300
(0.012)
0.300
(0.012)
0.100
(0.004)
1.500
(0.059)
1.900
(0.075)
0.250
(0.010)
0.500
(0.020)
0.350
(0.014)
0.350
(0.014)
1.870
(0.074)
0.305
(0.012)
2.575
(0.101)
Recommended Minimum Pads
Dimensions in mm/(Inches)
Return to Index
APPLICATION NOTE
Document Number: 69948
Revision: 21-Jan-08
www.vishay.com
9
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Revision: 02-Oct-12
1
Document Number: 91000