SiHG17N60D Datasheet

SiHG17N60D
www.vishay.com
Vishay Siliconix
D Series Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V) at TJ max.
• Optimal Design
650
RDS(on) max. at 25 °C ()
VGS = 10 V
Qg (Max.) (nC)
90
Qgs (nC)
14
Qgd (nC)
22
Configuration
- Low Area Specific On-Resistance
- Low Input Capacitance (Ciss)
0.340
- Reduced Capacitive Switching Losses
- High Body Diode Ruggedness
- Avalanche Energy Rated (UIS)
• Optimal Efficiency and Operation
- Low Cost
- Simple Gate Drive Circuitry
- Low Figure-of-Merit (FOM): Ron x Qg
Single
D
TO-247AC
- Fast Switching
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
G
S
APPLICATIONS
D
S
G
• Consumer Electronics
- Displays (LCD or Plasma TV)
• Lighting
• Industrial
- Welding
- Induction Heating
- Motor Drives
- Battery Chargers
N-Channel MOSFET
• SMPS
ORDERING INFORMATION
Package
TO-247AC
Lead (Pb)-free
SiHG17N60D-E3
Lead (Pb)-free and Halogen-free
SiHG17N60D-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
Continuous Drain Current (TJ = 150 °C)
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
UNIT
V
17
10.7
A
IDM
48
2.22
W/°C
Single Pulse Avalanche Energyb
EAS
165.6
mJ
Maximum Power Dissipation
PD
277.8
W
TJ, Tstg
- 55 to + 150
°C
Linear Derating Factor
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode
TJ = 125 °C
dV/dtd
Soldering Recommendations (Peak Temperature)c
for 10 s
dV/dt
24
0.2
300
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. VDD = 50 V, starting TJ = 25 °C, L = 2.3 mH, Rg = 25 , IAS = 12 A.
c. 1.6 mm from case.
d. ISD  ID, starting TJ = 25 °C.
S12-0685-Rev. A, 02-Apr-12
Document Number: 91496
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG17N60D
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SYMBOL
TYP.
MAX.
UNIT
RthJA
RthJC
-
62
0.45
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage (N)
VDS
VGS = 0 V, ID = 250 μA
600
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.7
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
3
-
5
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
1
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
100
Drain-Source On-State Resistance
Forward Transconductancea
RDS(on)
gfs
VGS = 10 V
ID = 8 A
VDS = 50 V, ID = 8 A
μA
-
0.275
0.340

-
6.2
-
S
Dynamic
Input Capacitance
Ciss
VGS = 0 V,
-
1780
-
Output Capacitance
Coss
VDS = 100 V,
-
140
-
Reverse Transfer Capacitance
Crss
f = 1 MHz
-
15
-
-
45
90
-
14
-
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
-
22
-
Turn-On Delay Time
td(on)
-
22
45
tr
VDD = 300 V, ID = 8 A
Rg = 9.1 , VGS = 10 V
-
56
85
-
37
75
-
30
60
f = 1 MHz, open drain
-
1.6
-
-
-
17
-
-
48
Rise Time
Turn-Off Delay Time
td(off)
Fall Time
tf
Internal Gate Resistance
Rg
VGS = 10 V
ID = 8 A, VDS = 480 V
pF
nC
ns

Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Current
IRRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 8 A, VGS = 0 V
TJ = 25 °C, IF = IS,
dI/dt = 100 A/μs, VR = 20 V
S
-
-
1.5
V
-
633
950
ns
-
7
15
μC
-
21
42
A
Note
a. Repetitive rating; pulse width limited by maximum junction temperature.
S12-0685-Rev. A, 02-Apr-12
Document Number: 91496
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG17N60D
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
3.0
50
TOP
15V
14V
13V
12V
11V
10V
9.0V
8.0V
7.0V
6.0V
BOTYTOM 5.0
30
TJ = 25ɗ
20
10
ID = 10 A
2.5
RDS(on) - On-Resistance
(Normalized)
ID - Drain Current (A)
40
VGS = 10 V
2.0
1.5
1.0
0.5
7V
0.0
0
0
5
10
15
20
25
VDS - Drain-to-Source Voltage (V)
- 60 - 40 - 20
30
0
20
40
60
80 100 120 140 160
TJ - Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 1 - Typical Output Characteristics, TC = 150 °C
30
10000
TOP
15V
14V
13V
12V
11V
10V
9.0V
8.0V
7.0V
6.0V
BOTYTOM 5.0V
18
TJ = 150ɗ
C - Capacitance (pF)
ID - Drain Current (A)
24
7V
12
Ciss
1000
Coss
Crss
100
6
10
0
0
5
10
15
20
25
VDS - Drain-to-Source Voltage (V)
0
30
Fig. 2 - Typical Output Characteristics, TC = 150 °C
600
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
60
18
50
VGS - Gate-to-Source Voltage (V)
I D,Drain- to-Source Current (A)
200
400
VDS - Drain-to-Source Voltage (V)
40
30
20
TJ = 150 °C
10
VDS = 300 V
ID = 12 A
16
VDS =120 V
14
VDS = 480 V
12
10
8
6
4
2
TJ = 25 °C
0
0
0
5
10
15
20
VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
S12-0685-Rev. A, 02-Apr-12
25
0.0
20.0
40.0
60.0
Qg - Total Gate Charge (nC)
80.0
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91496
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG17N60D
www.vishay.com
Vishay Siliconix
20.00
100
IS - Source Current (A)
TJ = 150 °C
15.00
ID,Drain Current (A)
10
TJ = 25 °C
1
10.00
5.00
0.00
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD - Source-to-Drain Voltage (V)
1.4
25
1.6
VDS , Drain -to -Source Breakdown
Voltage (V)
ID - Drain Current (A)
125
150
725
OPERATION IN THIS AREA
Limited by RDS(on)
100 μs
Limited by RDS(on)
1 ms
1
10 ms
0.1
100
Fig. 9 - Maximum Drain Current vs. Case Temperature
I DM Limited
10
75
TJ - Temperature (°C)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
100
50
700
675
650
625
600
575
TC= 25 °C
TJ= 150 °C
Single Pulse
BVDSS Limited
550
1
10
100
1000
-60 -40 -20
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Fig. 8 - Maximum Safe Operating Area
0
20
40
60
80 100 120 140
160
TJ,Temperature (°C)
Fig. 10 - Typical Drain-to-Source Voltage vs. Temperature
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
Square Wave Pulse Duration (s)
Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case
S12-0685-Rev. A, 02-Apr-12
Document Number: 91496
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG17N60D
www.vishay.com
VDS
RD
VDS
VGS
Vishay Siliconix
tp
VDD
D.U.T.
RG
+
- VDD
VDS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
IAS
Fig. 12 - Switching Time Test Circuit
Fig. 15 - Unclamped Inductive Waveforms
VDS
90 %
QG
10 V
QGS
10 %
VGS
QGD
VG
td(on)
td(off) tf
tr
Charge
Fig. 13 - Switching Time Waveforms
Fig. 16 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
L
Vary tp to obtain
required IAS
VDS
50 kΩ
D.U.T
RG
12 V
+
-
IAS
0.2 µF
0.3 µF
V DD
+
D.U.T.
-
VDS
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 14 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 17 - Gate Charge Test Circuit
S12-0685-Rev. A, 02-Apr-12
Document Number: 91496
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG17N60D
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 18 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91496.
S12-0685-Rev. A, 02-Apr-12
Document Number: 91496
6
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TO-247AC (High Voltage)
A
A
4
E
B
3 R/2
E/2
7 ØP
Ø k M DBM
A2
S
(Datum B)
ØP1
A
D2
Q
4
4
2xR
(2)
D1
D
1
2
4
D
3
Thermal pad
5 L1
C
L
A
See view B
2 x b2
3xb
0.10 M C A M
4
E1
0.01 M D B M
View A - A
C
2x e
A1
b4
Planting
Lead Assignments
1. Gate
2. Drain
3. Source
4. Drain
D DE
(b1, b3, b5)
Base metal
E
C
(c)
C
c1
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS
DIM.
MIN.
MAX.
A
4.58
5.31
A1
2.21
2.59
A2
1.17
2.49
b
0.99
1.40
b1
0.99
1.35
b2
1.53
2.39
b3
1.65
2.37
b4
2.42
3.43
b5
2.59
3.38
c
0.38
0.86
c1
0.38
0.76
D
19.71
20.82
D1
13.08
ECN: X13-0103-Rev. D, 01-Jul-13
DWG: 5971
INCHES
MIN.
MAX.
0.180
0.209
0.087
0.102
0.046
0.098
0.039
0.055
0.039
0.053
0.060
0.094
0.065
0.093
0.095
0.135
0.102
0.133
0.015
0.034
0.015
0.030
0.776
0.820
0.515
-
DIM.
D2
E
E1
e
Øk
L
L1
N
ØP
Ø P1
Q
R
S
MILLIMETERS
MIN.
MAX.
0.51
1.30
15.29
15.87
13.72
5.46 BSC
0.254
14.20
16.25
3.71
4.29
7.62 BSC
3.51
3.66
7.39
5.31
5.69
4.52
5.49
5.51 BSC
INCHES
MIN.
MAX.
0.020
0.051
0.602
0.625
0.540
0.215 BSC
0.010
0.559
0.640
0.146
0.169
0.300 BSC
0.138
0.144
0.291
0.209
0.224
0.178
0.216
0.217 BSC
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Contour of slot optional.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions D1 and E1.
5. Lead finish uncontrolled in L1.
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154").
7. Outline conforms to JEDEC outline TO-247 with exception of dimension c.
8. Xian and Mingxin actually photo.
Revision: 01-Jul-13
Document Number: 91360
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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Revision: 02-Oct-12
1
Document Number: 91000