DATASHEET

HCTS245MS
TM
Radiation Hardened
Octal Bus Transceiver, Three-State, Non-Inverting
September 1995
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
DIR
1
20 VCC
A0
2
19 OE
A1
3
18 B0
A2
4
17 B1
• Latch-Up Free Under Any Conditions
A3
5
16 B2
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
A4
6
15 B3
A5
7
14 B4
A6
8
13 B5
A7
9
12 B6
GND 10
11 B7
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Military Temperature Range: -55
oC
to
+125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS245MS is a Radiation Hardened NonInverting Octal Bidirectional Bus Transceiver, Three-State,
intended for two-way asynchronous communication between
data busses. The HCTS245MS allows data transmission
from the A bus to the B bus or from the B bus to the A bus.
The logic level at the direction input (DIR) determines the
data direction. The output enable input (OE) puts the I/O port
in the high-impedance state when high.
The HCTS245MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
DIR
1
20
VCC
A0
2
19
OE
A1
3
18
B0
A2
4
17
B1
A3
5
16
B2
A4
6
15
B3
A5
7
14
B4
A6
8
13
B5
A7
9
12
B6
10
11
B7
GND
The HCTS245MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS245DMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead SBDIP
HCTS245KMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
+25oC
Sample
20 Lead SBDIP
HCTS245K/Sample
+25oC
Sample
20 Lead Ceramic Flatpack
HCTS245HMSR
+25oC
Die
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
DB NA
HCTS245D/Sample
Spec Number
File Number
518615
2360.2
HCTS245MS
Functional Diagram
ONE OF 8 TRANSCEIVERS
P
A DATA
9
N
P
(2, 3, 4, 5,
6, 7, 8)
B DATA
N
11
(18, 17, 16, 15,
14, 13, 12)
TO OTHER
7 CIRCUITS
DIR
1
OUTPUT
ENABLE 19
TRUTH TABLE
CONTROL
INPUTS
OE
DIR
L
L
B Data to A Bus
L
H
A Data to B Bus
H
X
Isolation
OPERATION
H = High Voltage Level, L = Low Voltage Level,
X = Immaterial
To prevent excess currents in the High-Z (Isolation) modes, all I/O terminals
should be terminated with 10kΩ to 1MΩ resistors.
Spec Number
2
518615
Specifications HCTS245MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
72oC/W
24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . . 500ns Max
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
40
µA
2, 3
+125oC, -55oC
-
750
µA
1
+25oC
7.2
-
mA
2, 3
+125oC, -55oC
6.0
-
mA
1
+25oC
-7.2
-
mA
2, 3
+125oC, -55oC
-6.0
-
mA
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-
±0.5
µA
2, 3
+125oC, -55oC
-
±5.0
µA
1
+25oC
-
±1
µA
2, 3
+125oC, -55oC
-
±50
µA
7, 8A, 8B
+25oC, +125oC, -55oC
-
-
-
(NOTE 1)
CONDITIONS
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
IOZ
FN
VCC = 5.5V,
VIN = VCC or GND
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 5.5V, Applied
Voltage = 0V or VCC
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
LIMITS
NOTES:
1. All voltages reference to device GND.
2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number
3
518615
Specifications HCTS245MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Data to Output
SYMBOL
TPLH
TPHL
Enable to Output
TPZL
TPZH
Disable to Output
(NOTES 1, 2)
CONDITIONS
TPLZ
TPHZ
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
2
18
ns
10, 11
+125oC, -55oC
2
21
ns
9
+25oC
2
21
ns
10, 11
+125oC, -55oC
2
24
ns
9
+25oC
2
28
ns
10, 11
+125oC, -55oC
2
33
ns
9
+25oC
2
26
ns
10, 11
+125oC, -55oC
2
31
ns
9
+25oC
2
28
ns
10, 11
+125oC, -55oC
2
33
ns
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
LIMITS
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
Capacitance Power
Dissipation
CPD
Input Capacitance
Output Transition
Time
CIN
TTHL
TTLH
CONDITIONS
VCC = 5.0V, f = 1MHz
VCC = 5.0V, f = 1MHz
VCC = 4.5V
NOTES
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
68
pF
1
+125oC, -55oC
-
68
pF
1
+25oC
-
10
pF
1
+125oC
-
10
pF
1
+25oC
-
12
ns
1
+125oC, 55oC
-
18
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number
4
518615
Specifications HCTS245MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
TEMPERATURE
MIN
MAX
UNITS
Quiescent Current
ICC
VCC = 5.5V, VIN = VCC or GND
+25oC
-
0.75
mA
Output Current (Sink)
IOL
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25oC
6.0
-
mA
Output Current
(Source)
IOH
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25oC
-6.0
-
mA
Output Voltage Low
VOL
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
+25oC
-
0.1
V
Output Voltage High
VOH
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA
+25oC
VCC
-0.1
-
V
Input Leakage Current
IIN
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±5
µA
Three-State Output
Leakage Current
IOZ
Applied Voltage = 0V or VCC, VCC = 5.5V
+25oC
-
±50
µA
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,
(Note 3)
+25oC
-
-
-
TPLH
VCC = 4.5V
+25oC
2
21
ns
TPHL
VCC = 4.5V
+25oC
2
24
TPZL
VCC = 4.5V
+25oC
2
33
ns
TPZH
VCC = 4.5V
+25oC
2
31
ns
TPLZ
TPHZ
VCC = 4.5V
2
33
ns
Propagation Delay Data
to Output
Enable to Output
Disable to Output
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
12µA
IOL/IOH
5
-15% of 0 Hour
IOZL/IOZH
5
±200nA
PARAMETER
Spec Number
5
518615
Specifications HCTS245MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group A (Note 1)
Group B
Group D
READ AND RECORD
ICC, IOL/H, IOZL/H
Subgroups 1, 2, 3, 9, 10, 11
NOTE: 1. Alternate Group A Testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
Group E Subgroup 2
NOTE: 1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
-
20
-
-
-
1 - 9, 11 - 20
-
-
11 - 18
1, 20
2-9
19
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
2-9
1, 10 - 19
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
-
10
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
-
10
NOTES:
1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
-
10
1 - 9, 11 - 20
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E,
Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number
6
518615
HCTS245MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PIND, Method 2020, Condition A
100% External Visual
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
AC Timing Diagrams
AC Load Circuit
VIH
DUT
INPUT
VS
TEST
POINT
VIL
CL
TPLH
RL
TPHL
VOH
VS
OUTPUT
VOL
VOH
CL = 50pF
TTLH
80%
VOL
RL = 500Ω
TTHL
20%
80%
OUTPUT
20%
AC VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VIL
0
V
GND
0
V
Spec Number
7
518615
HCTS245MS
Three-State Low Timing Diagrams
Three-State Low Load Circuit
VIH
VCC
VS
INPUT
VIL
RL
TPZL
TPLZ
VOZ
VT
TEST
POINT
DUT
VW
OUTPUT
VOL
CL
CL = 50pF
THREE-STATE LOW VOLTAGE LEVELS
PARAMETER
RL = 500Ω
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VT
1.30
V
VW
0.90
V
0
V
GND
Three-State High Timing Diagrams
Three-State High Load Circuit
VIH
VS
TEST
POINT
DUT
INPUT
VIL
TPZH
TPHZ
RL
VOH
CL = 50pF
RL = 500Ω
VT
VW
OUTPUT
VOZ
THREE-STATE HIGH VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VT
1.30
V
VW
3.60
V
0
V
GND
Spec Number
8
518615
HCTS245MS
Die Characteristics
DIE DIMENSIONS:
124 x 110 mils
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
BOND PAD SIZE:
100µm x 100µm
4 mils x 4 mils
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
Metallization Mask Layout
(19) OE
NC
NC
(20) VCC
(1) DIR
NC
NC
HCTS245MS
A0 (2)
(18) B0
A1 (3)
(17) B1
A2 (4)
(16) B2
A3 (5)
(15) B3
B6 (12)
B7 (11)
(13) B5
GND (10)
A5 (7)
A7 (9)
(14) B4
A6 (8)
A4 (6)
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS245 is TA14417A.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Spec Number
9
518615
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