DATASHEET

HCTS299MS
TM
Radiation Hardened
8-Bit Universal Shift Register; Three-State
August 1995
Features
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Pinouts
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm2/mg
Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 1012 RAD (Si)/s
Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
Military Temperature Range: -55oC to +125 oC
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
Input Current Levels Ii ≤ 5µA at VOL, VOH
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
1
2
20 VCC
19 S1
OE2
3
18 DS7
I/O6
4
17 Q7
I/O4
5
16 I/O7
I/O2
6
15 I/O5
I/O0
7
14 I/O3
Q0
8
13 I/O1
MR
9
12 CP
GND 10
11 DS0
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
S0
OE1
S0
1
20
VCC
OE1
2
19
S1
OE2
3
18
DS7
I/O6
4
17
Q7
I/O4
5
16
I/O7
I/O2
6
15
I/O5
I/O0
7
14
I/O3
Q0
8
13
I/O1
MR
9
12
CP
10
11
DS0
GND
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS299DMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead SBDIP
HCTS299KMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
HCTS299D/Sample
+25oC
Sample
20 Lead SBDIP
HCTS299K/Sample
+25oC
Sample
20 Lead Ceramic Flatpack
Die
Die
+25 C
DB NA
HCTS299HMSR
o
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
624
518640
FN3069.1
Spec Number
HCTS299MS
Functional Block Diagram
S1
20
DS7
19
BUS LINE OUTPUTS
STANDARD
OUTPUT
Q7
18
I/O7
17
I/O5
16
I/O3
15
I/O1
14
CP
13
DS0
12
11
VCC
OE
OE
OE
OE
D7
CL
Q
D
CL
OE
OE
D5
Q
D
R
Q7
OE
OE
D3
CL
R
Q
D
CL
D1
CL
R
Q5
CL
Q
D
Q3
CL
R
CL
CL
CL
Q1
S1
S1
S0
MODE
SELECT
LOGIC
S0
OE
Q6
OE
Q4
D6
D4
R
CL
CL
D
Q
OE
OE
1
2
S0
3
OE1
CL
CL
D
Q
CL
CL
D0
R
D
Q
OE
OE
5
I/O6
Q0
D2
R
OE
OE
4
OE2
Q2
R
D
Q
OE
OE
6
I/O4
CL
CL
GND
7
I/O2
BUS LINE OUTPUTS
8
I/O0
9
Spec Number
625
10
Q0
MR
STANDARD
OUTPUT
518640
HCTS299MS
TRUTH TABLE
Register Operating Modes
INPUTS
FUNCTION
REGISTER OUTPUTS
MR
CP
S0
S1
DS0
DS7
I/On
Q0
Q1
...
Q6
Q7
Reset (Clear)
L
X
X
X
X
X
X
L
L
...
L
L
Shift Right
H
h
l
l
X
X
L
q0
...
q5
q6
H
h
l
h
X
X
H
q0
...
q5
Q6
H
l
h
X
l
X
q1
q2
...
q7
L
H
l
h
X
h
X
q1
q2
...
q7
H
Hold (Do Nothing)
H
l
l
X
X
X
q0
q1
...
q6
q7
Parallel Load
H
h
h
X
X
l
L
L
...
L
L
H
h
h
X
X
h
H
H
...
H
H
Shift Left
TRUTH TABLE
Three-State I/O Port Operating Mode
INPUTS
INPUTS/OUTPUTS
OE1
OE2
S0
S1
Qn (REGISTER)
I/O0 . . . I/O7
L
L
L
X
L
L
L
L
L
X
H
H
L
L
X
L
L
L
L
L
X
L
H
H
Load Register
X
X
H
H
Qn = I/On
I/On = Inputs
Disable I/O
H
X
X
X
X
Z
X
H
X
X
X
Z
FUNCTION
Read Register
H = HighVoltage Level
L = Low Voltage Level
X = Immaterial
Z = Output in High Impedance State
h = Input Voltage High One Setup Time Prior Clock Transition
l = Input voltage Low One Setup Time Prior Clock Transition
= Low-to-High Clock Transition
qn = Lower Case Letter Indicates the State of the Referenced Output One Setup Time Prior Clock Transition
Spec Number
626
518640
Specifications HCTS299MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
72oC/W
24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 107oC/W
28oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide
heat sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . . 500ns Max
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
40
µA
2, 3
+125oC, -55oC
-
750
µA
1
+25oC
7.2
-
mA
2, 3
+125oC, -55oC
6.0
-
mA
1
+25oC
-7.2
-
mA
2, 3
+125oC, -55oC
-6.0
-
mA
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-
±0.5
µA
2, 3
+125oC, -55oC
-
±5.0
µA
1
+25oC
-
±1
µA
2, 3
+125oC, -55oC
-
±50
µA
7, 8A, 8B
+25oC, +125oC, -55oC
-
-
-
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
IOZ
FN
LIMITS
GROUP
A SUBGROUPS
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
Applied Voltage = 0V or
VCC, VCC = 5.5V
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number
627
518640
Specifications HCTS299MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
CLK to I/On
CLK to Q0, Q7
MR to Output
OEn to Output
(NOTES 1, 2)
CONDITIONS
SYMBOL
TPHL,
TPLH
TPHL,
TPLH
TPHL
TPZH
LIMITS
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
2
28
ns
10, 11
+125oC, -55oC
2
32
ns
9
+25oC
2
30
ns
10, 11
+125oC, -55oC
2
34
ns
9
+25oC
2
32
ns
10, 11
+125oC, -55oC
2
36
ns
9
+25oC
2
23
ns
10, 11
+125oC, -55oC
2
25
ns
9
+25oC
2
25
ns
10, 11
+125oC, -55oC
2
27
ns
9
+25oC
2
30
ns
10, 11
+125oC, -55oC
2
34
ns
9
+25oC
2
30
ns
10, 11
+125oC, -55oC
2
34
ns
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
TPHZ
TPZL
TPLZ
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
Capacitance Power
Dissipation
CPD
Input Capacitance
Output Transition
Time
Max Operating
Frequency
Setup Time DS0,
DS7, I/On to CLK
CIN
TTHL,
TTLH
FMAX
TSU
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
147
pF
1
+125oC, -55oC
-
171
pF
1
+25oC
-
10
pF
1
+125oC
-
10
pF
1
+25oC
-
15
ns
1
+125oC, -55oC
-
22
ns
1
+25oC
-
25
MHz
1
+125oC, -55oC
-
16
MHz
1
+25oC
20
-
ns
1
+125oC, -55oC
30
-
ns
VCC = 5.0V, f = 1MHz
VCC = 5.0V, f = 1MHz
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
Spec Number
628
518640
Specifications HCTS299MS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
Setup Time S1, S0
to CLK
TSU
Hold Time DS0,
DS7, I/On, S0, S1 to
CLK
TH
Recovery Time MR
to CLK
TREC
Pulse Width MR
Pulse Width CLK
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
27
-
ns
1
+125oC, -55oC
41
-
ns
1
+25oC
0
-
ns
1
+125oC, -55oC
0
-
ns
1
+25oC
5
-
ns
1
+125oC, -55oC
5
-
ns
1
+25oC
15
-
ns
1
+125oC, -55oC
22
-
ns
1
+25oC
20
-
ns
1
+125oC, -55oC
30
-
ns
VCC = 4.5V
VCC = 4.5V
TW (MR)
TW (CLK)
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
TEMPERATURE
MIN
MAX
UNITS
Quiescent Current
ICC
VCC = 5.5V, VIN = VCC or GND
+25oC
-
0.75
mA
Output Current (Sink)
IOL
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25oC
6.0
-
mA
Output Current
(Source)
IOH
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25oC
-6.0
-
mA
Output Voltage Low
VOL
VCC = 4.5V or 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
+25oC
-
0.1
V
Output Voltage High
VOH
VCC = 4.5V or 5.5V, VIH =VCC/2,
VIL = 0.8V, IOH = -50µA
+25oC
VCC
-0.1
-
V
Input Leakage Current
IIN
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±5
µA
Three-State Output
Leakage Current
IOZ
Applied Voltage = 0V or VCC, VCC = 5.5V
+25oC
-
±50
µA
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
+25oC
-
-
-
CLK to I/On
TPHL,
TPLH
VCC = 4.5V
+25oC
2
32
ns
CLK to Q0, Q7
TPHL,
TPLH
VCC = 4.5V
+25oC
2
34
ns
Spec Number
629
518640
Specifications HCTS299MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
TEMPERATURE
MIN
MAX
UNITS
MR to Output
TPHL
VCC = 4.5V
+25oC
2
36
ns
OEn to Output
TPZH
VCC = 4.5V
+25oC
2
25
ns
2
27
ns
2
34
ns
2
34
ns
TPHZ
TPZL
+25oC
VCC = 4.5V
TPLZ
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR =TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
12µA
IOL/IOH
5
-15% of 0 Hour
IOZL/IOZH
5
±200nA
PARAMETER
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group A (Note 1)
Group B
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
NOTE: 1. Alternate Group A Inspection in accordance with Method 5005 of MIL-STD-883 may be exercised.
Spec Number
630
518640
HCTS299MS
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
Group E Subgroup 2
NOTE: 1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC BURN-IN AND DYNAMIC
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
-
20
-
-
-
1 - 7, 9, 11 - 16, 18 - 20
-
-
4 - 8, 13 - 17
1, 9, 20
12
11
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
8, 17
1 - 7, 9 - 16, 18, 19
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
8, 17
10
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
-
2, 3, 10, 18, 19
NOTES:
1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
8, 17
10
1 - 7, 9, 11 - 16, 18 - 20
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number
631
518640
HCTS299MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
100% Interim Electrical Test 2 (T2)
Sample - Wire Bond Pull Monitor, Method 2011
100% Delta Calculation (T0-T2)
Sample - Die Shear Monitor, Method 2019 or 2027
100% PDA 1, Method 5004 (Notes 1and 2)
100% Internal Visual Inspection, Method 2010, Condition A
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Delta Calculation (T0-T1)
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Interim Electrical Test 3 (T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% PIND, Method 2020, Condition A
100% Final Electrical Test
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Serialization
100% Radiographic, Method 2012 (Note 3)
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
7585 Irvine Center Drive
Suite 100
Irvine, CA 92618
TEL: (949) 341-7000
FAX: (949) 341-7123
Intersil Corporation
2401 Palm Bay Rd.
Palm Bay, FL 32905
TEL: (321) 724-7000
FAX: (321) 724-7946
EUROPE
Intersil Europe Sarl
Ave. William Graisse, 3
1006 Lausanne
Switzerland
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FAX: +41 21 6140579
ASIA
Intersil Corporation
Unit 1804 18/F Guangdong Water Building
83 Austin Road
TST, Kowloon Hong Kong
TEL: +852 2723 6339
FAX: +852 2730 1433
Spec Number
632
518640
Specifications HCTS299MS
AC Timing Diagrams and Load Circuit
INPUT LEVEL
VS
VS
MR
TREC
INPUT LEVEL
TW
CP
VS
VS
VS
VS
CP
TW
TPLH
t PHL
TPHL
VS
VS
I/On, Q0 OR Q7
VS
Q0 TO Q7
FIGURE 1. CLOCK PRE-REQUISITE AND PROPAGATION
DELAYS
FIGURE 2. MASTER RESET PRE-REQUISITE AND PROPAGATION DELAYS
INPUT
LEVEL
VS
DS0, DS7
OR I/On
VS
VS
VS
TH(H)
TH(L)
TSU(L)
CP
TTHL
80%
VS
VS
TTLH
VOH
TSU(L)
20%
VOL
FIGURE 3. DATA PRE-REQUISITE TIMES
80%
OUTPUT
20%
FIGURE 4. OUTPUT TRANSITION TIME
AC VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VIL
0
V
GND
0
V
DUT
TEST
POINT
CL
RL
CL = 50pF
RL = 500Ω
FIGURE 5. AC LOAD CIRCUIT
Spec Number
633
518640
HCTS299MS
Three-State Low Timing Diagrams
Three-State Low Load Circuit
VCC
VIH
VS
INPUT
VIL
RL
TPZL
TPLZ
VOZ
VT
TEST
POINT
DUT
VW
OUTPUT
VOL
CL
CL = 50pF
RL = 500Ω
Three-State LOW VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VT
1.30
V
VW
0.90
V
VIL
0
V
GND
0
V
Three-State High Timing Diagrams
Three-State High Load Circuit
VIH
TEST
POINT
DUT
VS
INPUT
VIL
TPZH
RL
TPHZ
CL = 50pF
RL = 500Ω
VOH
VT
VW
OUTPUT
VOZ
Three-State HIGH VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VT
1.30
V
VW
3.60
V
VIL
0
V
GND
0
V
Spec Number
634
518640
HCTS299MS
Die Characteristics
DIE DIMENSIONS:
123 x 94 mils
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
BOND PAD SIZE:
100µm x 100µm
4 mils x 4 mils
Metallization Mask Layout
(19) S1
(20) VCC
(1) S0
(2) OE1
HCTS299MS
(18) DS7
OE2 (3)
I/O6 (4)
(17) Q7
(16) I/O7
I/O4 (5)
(15) I/O5
I/O2 (6)
(14) I/O3
I/O0 (7)
(13) I/O1
CP (12)
DS0 (11)
GND (10)
MR (9)
Q0 (8)
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS299 is TA14480A.
Spec Number
635
518640
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