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MENDE 43L210
R E C OM
ISL
Data Sheet
February 27, 2013
Ultra Low ON-Resistance, Low Voltage,
Single Supply, Dual SPDT Analog Switch
The Intersil ISL43L220 device is a low ON-resistance, low
voltage, bidirectional, dual single-pole/double-throw (SPDT)
analog switch designed to operate from a single +1.1V to
+4.5V supply. Targeted applications include battery powered
equipment that benefit from low RON (0.22 and fast
switching speeds (tON = 11ns, tOFF = 5ns). The digital logic
input is 1.8V logic-compatible when using a single +3V supply.
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL43L220 is offered in a small form factor package,
alleviating board space limitations.
The ISL43L220 is a committed dual single-pole/double-throw
(SPDT) that consist of two normally open (NO) and two
normally closed (NC) switches. This configuration can also be
used as a dual 2-to-1 multiplexer. The ISL43L220 is pin
compatible with the MAX4684 and MAX4685.
TABLE 1. FEATURES AT A GLANCE
ISL43L220
Number of Switches
2
SW
SPDT or 2-1 MUX
4.3V RON
0.22
4.3V tON/tOFF
11ns/5ns
3V RON
0.26
3V tON/tOFF
14ns/6ns
1.8V RON
0.5
1.8V tON/tOFF
20ns/8ns
Packages
10Ld 3x3 thin DFN
1
ISL43L220
FN6093.3
Features
• Pb-Free (RoHS Compliant)
• ON Resistance (RON)
- V+ = +4.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.22
- V+ = +3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.26
- V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5
• RON Matching Between Channels. . . . . . . . . . . . . . . . 0.03
• RON Flatness Across Signal Range . . . . . . . . . . . . . . 0.03
• Single Supply Operation. . . . . . . . . . . . . . . . . +1.1V to +4.5V
• Low Power Consumption (PD). . . . . . . . . . . . . . . . . . <0.3µW
• Fast Switching Action (V+ = +4.3V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ns
• Guaranteed Break-Before-Make
• 1.8V Logic Compatible (+3V supply)
• Available in 10 lead 3x3 thin DFN
• ESD HBM Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >9kV
Applications
• Battery powered, handheld, and portable equipment
- Cellular/mobile phones
- Pagers
- Laptops, notebooks, palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and video switching
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2004, 2005, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL43L220
Ordering Information
PART
NUMBER
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL43L220IRZ
(Notes 2, 3)
220Z
-40 to 85
10 Ld 3x3 thin DFN
L10.3x3A
ISL43L220IRZ-T
(Notes 1, 2, 3)
220Z
-40 to 85
10 Ld 3x3 thin DFN
Tape and Reel
L10.3x3A
NOTE:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL43L220. For more information on MSL, please see tech brief
TB363.
Pinout
Pin Descriptions
(Note 4)
ISL43L220
(10 LD TDFN)
TOP VIEW
10 NO2
V+ 1
9 COM2
NO1 2
8 IN2
COM1 3
IN1 4
7 NC2
NC1 5
6 GND
PIN
FUNCTION
V+
System Power Supply Input (+1.1V to +4.5V)
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
NOTE:
4. Switches Shown for Logic “0” Input.
Truth Table
NOTE:
LOGIC
PIN NC
PIN NO
0
ON
OFF
1
OFF
ON
Logic “0” 0.5V. Logic “1” 1.4V with a 3V supply.
2
FN6093.3
February 27, 2013
ISL43L220
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 4.7V
Input Voltages
NO, NC, IN (Note 5) . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current NO, NC, or COM . . . . . . . . . . . . . . . . . 300mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . 500mA
ESD Rating:
HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>9kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>500V
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1kV
Thermal Resistance (Typical, Notes 6, 7) JA (°C/W) JC (°C/W)
10 Ld 3x3 DFN Package . . . . . . . . . . .
47
10.5
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range
ISL43L220IR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
5. Signals on NC, NO, IN, or COM exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
6. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
7. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications - 4.3V Supply
PARAMETER
Test Conditions: V+ = +3.9V to +4.5V, GND = 0V, VINH = 1.6V, VINL = 0.5V (Notes 8, 10),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 9)
MIN
TYP
(NOTE 9)
MAX
UNITS
Full
0
-
V+
V
25
-
0.23
0.35

Full
-
-
0.35

25
-
0.03
0.06

Full
-
-
0.06

ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 3.9V, ICOM = 100mA, VNO or VNC = 0V to V+
(See Figure 5)
ON Resistance, RON
RON Matching Between Channels,
RON
V+ = 3.9V, ICOM = 100mA, VNO or VNC = Voltage at
max RON (Note 13)
RON Flatness, RFLAT(ON)
V+ = 3.9V, ICOM = 100mA, VNO or VNC = 0V to V+
(Note 11)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 4.5V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V = 4.5V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V,
or Floating
25
-
0.03
0.08

Full
-
-
0.08

25
-60
-
60
nA
Full
-110
-
110
nA
25
-60
-
60
nA
Full
-100
-
100
nA
25
-
12
17
ns
Full
-
-
22
ns
25
-
5
10
ns
Full
-
-
15
ns
DYNAMIC CHARACTERISTICS
V+ = 3.9V, VNO or VNC = 1.5V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Turn-ON Time, tON
V+ = 3.9V, VNO or VNC = 1.5V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD
V+ = 4.5V, VNO or VNC = 1.5V, RL = 50, CL = 35pF
(See Figure 3, Note 12)
Full
2
4
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2)
25
-
128
-
pC
OFF Isolation
RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS
(See Figure 4)
25
-
68
-
dB
Crosstalk (Channel-to-Channel)
RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS,
(See Figure 6)
25
-
-95
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 600
25
-
0.003
-
%
3
FN6093.3
February 27, 2013
ISL43L220
Electrical Specifications - 4.3V Supply
Test Conditions: V+ = +3.9V to +4.5V, GND = 0V, VINH = 1.6V, VINL = 0.5V (Notes 8, 10),
Unless Otherwise Specified (Continued)
TEMP
(°C)
(NOTE 9)
MIN
TYP
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
115
-
pF
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
224
-
pF
Full
1.1
-
4.5
V
25
-
-
0.06
A
Full
-
-
1
A
Input Voltage Low, VINL
Full
-
-
0.5
V
Input Voltage High, VINH
Full
1.6
-
-
V
Full
-0.5
-
0.5
A
PARAMETER
TEST CONDITIONS
COM ON Capacitance, CCOM(ON)
(NOTE 9)
MAX
UNITS
POWER SUPPLY CHARACTERISTICS
Power Supply Range
V+ =1.1V to 4.5V, VIN = 0V or V+
Positive Supply Current, I+
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 4.5V, VIN = 0V or V+ (Note 12)
NOTES:
8. VIN = input voltage to perform proper function.
9. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
10. Parts are 100% tested at +25°C. Limits across the full temperature range are guaranteed by design and correlation.
11. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
12. Guaranteed but not tested.
13. RON matching between channels is calculated by subtracting the channel with the highest max RON value from the channel with lowest max
RON value, between NC1 and NC2 or between NO1 and NO2.
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 8, 10),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 9)
MIN
TYP
(NOTE 9)
MAX
UNITS
Full
0
-
V+
V
25
-
0.29
0.4

Full
-
-
0.4

25
-
0.03
0.06

Full
-
-
0.06

25
-
0.03
0.1

Full
-
-
0.1

25
-
1.1
-
nA
Full
-
25
-
nA
25
-
1.7
-
nA
Full
-
48
-
nA
25
-
14
20
ns
Full
-
-
25
ns
25
-
6
12
ns
Full
-
-
17
ns
Full
2
7
-
ns
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0V to V+
(See Figure 5, Note 12)
RON Matching Between Channels,
RON
V+ = 2.7V, ICOM = 100mA, VNO or VNC= Voltage at max
RON (Notes 12, 13)
RON Flatness, RFLAT(ON)
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0V to V+
(Notes 11, 12)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.3V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V = 3.3V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V,
or Floating
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Turn-OFF Time, tOFF
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Break-Before-Make Time Delay, tD
4
V+ = 3.3V, VNO or VNC = 1.5V, RL = 50, CL = 35pF
(See Figure 3, Note 12)
FN6093.3
February 27, 2013
ISL43L220
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 8, 10),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
(NOTE 9)
MIN
TYP
(NOTE 9)
MAX
UNITS
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2)
25
-
95
-
pC
OFF Isolation
RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS
(See Figure 4)
25
-
68
-
dB
Crosstalk (Channel-to-Channel)
RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS
(See Figure 6)
25
-
-95
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 600
25
-
0.003
-
%
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
115
-
pF
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
224
-
pF
Full
1.1
-
4.5
V
25
-
0.014
-
A
Full
-
0.52
-
A
Input Voltage Low, VINL
Full
-
-
0.5
V
Input Voltage High, VINH
Full
1.4
-
-
V
Full
-0.5
-
0.5
A
COM ON Capacitance, CCOM(ON)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current, I+
V+ =1.1V to 3.6V, VIN = 0V or V+
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 3.3V, VIN = 0V or V+ (Note 12)
Electrical Specifications - 1.8V Supply
PARAMETER
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 8, 10),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 9)
MIN
TYP
(NOTE 9)
MAX
UNITS
Full
0
-
V+
V
25
-
0.5
0.8

Full
-
-
0.8

25
-
1.1
-
nA
Full
-
25
-
nA
25
-
1.7
-
nA
Full
-
48
-
nA
25
-
22
28
ns
Full
-
-
33
ns
25
-
9
15
ns
Full
-
-
20
ns
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 1.65V, ICOM = 100mA, VNO or VNC = 0V to V+,
(See Figure 5, Note 12)
ON Resistance, RON
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 2.0V, VCOM = 0.3V, 1.8V, VNO or VNC = 1.8V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V = 2.0V, VCOM = 0.3V, 1.8V, or VNO or VNC = 0.3V,
1.8V, or Floating
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 1.65V, VNO or VNC = 1.0V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
V+ = 1.65V, VNO or VNC = 1.0V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD
V+ = 2.0V, VNO or VNC = 1.0V, RL = 50, CL = 35pF
(See Figure 3, Note 12)
Full
2
9
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2)
25
-
49
-
pC
OFF Isolation
RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See
Figure 4)
25
-
68
-
dB
Crosstalk (Channel-to-Channel)
RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See
Figure 6)
25
-
-95
-
dB
25
-
115
-
pF
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
5
FN6093.3
February 27, 2013
ISL43L220
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 8, 10),
Unless Otherwise Specified (Continued)
TEMP
(°C)
(NOTE 9)
MIN
TYP
25
-
224
-
pF
Input Voltage Low, VINL
Full
-
-
0.4
V
Input Voltage High, VINH
Full
1.0
-
-
V
Full
-0.5
-
0.5
A
PARAMETER
TEST CONDITIONS
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
(NOTE 9)
MAX
UNITS
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 2.0V, VIN = 0V or V+ (Note 12)
Electrical Specifications - 1.1V Supply
Test Conditions: V+ = +1.1V, GND = 0V, VINH = 1.0V, VINL = 0.3V (Note 4), Unless Otherwise Specified
TEMP
(°C)
(NOTE 9)
MIN
TYP
Full
0
-
V+
V
25
-
2.6
3

Full
-
3.4
4

25
-
30
-
ns
Full
-
35
-
ns
25
-
15
-
ns
Full
-
20
-
ns
Full
-
4
-
ns
Input Voltage Low, VINL
Full
-
0.3
-
V
Input Voltage High, VINH
Full
-
0.6
-
V
Full
-
0.5
-
A
PARAMETER
TEST CONDITIONS
(NOTE 9)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 1.1V, ICOM = 100mA, VNO or VNC = 0V to V+,
(See Figure 5)
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 1.1V, VNO or VNC = 1.0V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Turn-OFF Time, tOFF
V+ = 1.1V, VNO or VNC = 1.0V, RL = 50, CL = 35pF
(See Figure 1, Note 12)
Break-Before-Make Time Delay, tD
V+ = 1.1V, VNO or VNC = 1.0V, RL = 50, CL = 35pF
(See Figure 3, Note 12)
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 1.1V, VIN = 0V or V+ (Note 12)
6
FN6093.3
February 27, 2013
ISL43L220
Test Circuits and Waveforms
V+
LOGIC
INPUT
V+
tr < 20ns
tf < 20ns
50%
0V
tOFF
SWITCH
INPUT VNO
SWITCH
INPUT
VOUT
VOUT
NO or NC
COM
IN
90%
SWITCH
OUTPUT
C
90%
LOGIC
INPUT
0V
CL
35pF
RL
50
GND
tON
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (NO or NC) -----------------------------R L + R  ON 
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
RG
SWITCH
OUTPUT
VOUT
C
VOUT
COM
NO or NC
VOUT
VG
GND
IN
CL
V+
LOGIC
INPUT
ON
ON
OFF
LOGIC
INPUT
0V
Q = VOUT x CL
Repeat test for all switches.
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V+
V+
LOGIC
INPUT
VNX
C
NO
RL
50
IN
SWITCH
OUTPUT
VOUT
90%
0V
LOGIC
INPUT
VOUT
COM
NC
0V
CL
35pF
GND
tD
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
7
FN6093.3
February 27, 2013
ISL43L220
Test Circuits and Waveforms (Continued)
V+
C
V+
C
SIGNAL
GENERATOR
RON = V1/100mA
NO or NC
NO or NC
IN
VNX
0V or V+
100mA
IN
V1
0V or V+
COM
ANALYZER
GND
COM
RL
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
Repeat test for all switches.
FIGURE 5. RON TEST CIRCUIT
FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+
C
V+
C
SIGNAL
GENERATOR
NO or NC
COM
50
NO or NC
IN1
IN
0V or V+
0V or V+
IMPEDANCE
ANALYZER
NC or NO
COM
ANALYZER
GND
COM
N.C.
GND
RL
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 6. CROSSTALK TEST CIRCUIT
Detailed Description
The ISL43L220 is a bidirectional, dual single pole/double
throw (SPDT) analog switch that offers precise switching
capability from a single 1.1V to 4.5V supply with low onresistance (0.22) and high speed operation (tON = 11ns,
tOFF = 5ns). The device is especially well suited for portable
battery powered equipment due to its low operating supply
voltage (1.1V), low power consumption (4.5W max), low
leakage currents (110nA max), and the tiny DFN package.
The ultra low on-resistance and Ron flatness provide very low
insertion loss and distortion to applications that require signal
reproduction.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
8
Repeat test for all switches.
FIGURE 7. CAPACITANCE TEST CIRCUIT
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
FN6093.3
February 27, 2013
ISL43L220
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO or NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50 systems, the signal response is reasonably flat even
past 30MHz with a -3dB bandwidth of 120MHz (see
Figure 19). The frequency response is very consistent over a
wide V+ range, and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 20 details the high Off Isolation and Crosstalk
rejection provided by this part. At 100kHz, Off Isolation is
about 68dB in 50 systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
FIGURE 8. OVERVOLTAGE PROTECTION
Leakage Considerations
Power-Supply Considerations
The ISL43L220 construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL43L220 4.7V
maximum supply voltage provides plenty of room for the
10% tolerance of 4.3V supplies, as well as room for
overshoot and noise spikes.
The minimum recommended supply voltage is 1.1V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
to the electrical specification tables and Typical Performance
curves for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2.0V to 3.6V (see Figure 16). At 3.6V
the VIH level is about 1.27V. This is still below the 1.8V
CMOS guaranteed high output minimum level of 1.4V, but
noise margin is reduced.
9
FN6093.3
February 27, 2013
ISL43L220
Typical Performance Curves TA = 25°C, Unless Otherwise Specified
0.27
3
ICOM = 100mA
0.26
ICOM = 100mA
2.5
0.25
0.24
2
V+ = 2.7V
RON ()
RON ()
0.23
V+ = 3V
0.22
1
0.21
V+ = 1.5V
0.2
V+ = 3.6V
0.5
V+ = 4.3V
0.19
V+ = 1.62V
0
0.18
0
1
2
VCOM (V)
3
4
0
5
0.28
0.5
1
1.5
2
FIGURE 10. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
0.32
V+ = 4.3V
ICOM = 100mA
0.26
V+ = 2.7V
ICOM = 100mA
0.3
85°C
0.28
0.24
RON ()
85°C
0.22
V+ = 1.8V
VCOM (V)
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
RON()
V+ = 1.1V
1.5
0.2
0.26
25°C
0.24
25°C
0.22
0.18
-40°C
0.16
0.14
0.2
-40°C
0
1
2
3
4
0.18
5
0
0.5
1
VCOM (V)
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
0.5
3.5
2.5
3
V+ = 1.1V
ICOM = 100mA
3
-40°C
85°C
2.5
RON ()
0.4
RON ()
2
FIGURE 12. ON RESISTANCE vs SWITCH VOLTAGE
V+ = 1.8V
ICOM = 100mA
0.45
1.5
VCOM (V)
0.35
0.3
25°C
2
85°C
1.5
1
25°C
-40°C
0.25
0.5
0
0.2
0
0.5
1
1.5
VCOM (V)
FIGURE 13. ON RESISTANCE vs SWITCH VOLTAGE
10
2
0
0.2
0.4
0.6
0.8
1
1.2
VCOM (V)
FIGURE 14. ON RESISTANCE vs SWITCH VOLTAGE
FN6093.3
February 27, 2013
ISL43L220
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
1.5
150
1.4
1.3
100
VINH AND VINL (V)
1.2
50
Q (pC)
V+ = 4.3V
V+ = 1.8V
0
V+ = 3V
1.1
VINH
1
0.9
0.8
VINL
0.7
0.6
-50
0.5
0.4
-100
0
1
2
3
4
5
0.3
VCOM (V)
1
1.5
2
2.5
3
3.5
4
4.5
V+ (V)
FIGURE 15. CHARGE INJECTION vs SWITCH VOLTAGE
FIGURE 16. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
14
60
13
12
50
40
tOFF (ns)
tON (ns)
11
10
30
85°C
8
-40°C
7
85°C
25°C
6
20
25°C
5
4
-40°C
10
9
1
1.5
2
2.5
3
V+ (V)
3.5
4
FIGURE 17. TURN - ON TIME vs SUPPLY VOLTAGE
11
4.5
3
1
1.5
2
2.5
3
3.5
4
4.5
V+ (V)
FIGURE 18. TURN - OFF TIME vs SUPPLY VOLTAGE
FN6093.3
February 27, 2013
ISL43L220
-10
V+ = 3V
GAIN
0
PHASE
20
40
60
80
RL = 50
VIN = 0.2VP-P to 2VP-P
1
100
10
100
CROSSTALK (dB)
-20
-20
20
-30
30
-40
40
-50
50
-60
60
ISOLATION
-70
70
-80
80
CROSSTALK
-90
100
10k
100k
FREQUENCY (MHz)
1M
10M
110
100M 500M
FREQUENCY (Hz)
FIGURE 19. FREQUENCY RESPONSE
FIGURE 20. CROSSTALK AND OFF ISOLATION
100
50
V+ = 4.5V
V+ = 4.5V
VCOM = 0.3V
50
0
0
iOFF (nA)
iON (nA)
90
-100
-110
1k
600
OFF ISOLATION (dB)
0
10
V+ = 3V
PHASE (DEGREES)
NORMALIZED GAIN (dB)
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
25°C
-50
25°C
-50
85°C
-100
85°C
-100
-150
0
1
2
3
VCOM/NX (V)
4
FIGURE 21. ON LEAKAGE vs SWITCH VOLTAGE
5
0
1
2
3
4
5
VNX (V)
FIGURE 22. OFF LEAKAGE vs SWITCH VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
114
PROCESS:
Submicron CMOS
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
FN6093.3
February 27, 2013
ISL43L220
Package Outline Drawing
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 5, 3/10
3.00
A
2.0 REF
6
PIN 1
INDEX AREA
B
8X 0.50 BSC
5
1
6
PIN 1
INDEX AREA
10X 0 . 30
3.00
1.50
0.15
(4X)
10
0.10 M C A B
0.05 M C
5
4 10 X 0.25
TOP VIEW
2.30
( 2.30 )
BOTTOM VIEW
0 .80 MAX
SEE DETAIL "X"
0.10 C
C
(2.90)
SEATING PLANE
0.08 C
(1.50)
SIDE VIEW
(10 X 0.50)
0 . 2 REF
5
C
( 8X 0 .50 )
( 10X 0.25 )
0 . 00 MIN.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
Angular ±2.50°
4.
Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5.
Tiebar shown (if present) is a non-functional feature.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7.
13
Compliant to JEDEC MO-229-WEED-3 except exposed pad length (2.30mm).
FN6093.3
February 27, 2013
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