bd8876fv e

Output Coupling Capacitor-less
Line Amplifier
BD8876FV, BD8878FV
Key Specifications
Description
BD8876FV, BD8878FV are output coupling
capacitor-less line amplifiers. These IC have a negative
voltage generator built-in and generate the negative
voltage from the supply voltage. It is possible to drive in a
ground reference with both voltage of the supply voltage
and the negative voltage. Therefore, these line
amplifiers have wide output range, and they can output
2Vrms(5.65VP-P) with the single-supply 5V.
 Power Supply voltage:
 THD+N:
3V to 5.5V
0.003% (Typ)
(VCC=5V, RL=10kΩ, Vo=2Vrms, 20kHz LPF)




Maximum Output Voltage: 2Vrms (Min)@VCC=5V
Output Noise:
10μVrms (Typ)
Circuit Current (Active):
3.2mA (Typ)
Operating Temperature Range:
-40°C to +85°C
Features







Possible to output 2Vrms with single-supply 5V
Output Coupling Capacitor-less
Variable Gain(+6dB / +9dB Typ.) [BD8876FV]
Fixed Gain(+6.7dB Typ.)[BD8878FV]
Integrated Negative Power Supply
Ground-Referenced Outputs
Integrated Short-Circuit and Thermal Protection
Package
SSOP-B14
W(Typ) x D(Typ) x H(Max)
5.00mm x 6.40mm x 1.35mm
Applications
Video game console, Projector, Set Top Box, Blu-ray
player etc.
SSOP-B14
Typical Application Circuit
VDD
VDD
SVDD
PVDD
INL
OUTL
INR
OUTR
Amplifier type
Gain
SDB
CP
Package
GAIN (*1)
PVSS
BD8876FV
BD8878FV
Inverting
amplifier
+6.0dB / +9.0dB
Non-inverting
amplifier
(Changed by GAIN pin)
+6.7dB
SSOP-B14
CN
(*1) GAIN pin : BD8876FV
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays
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TSZ02201-0C1C0EZ00280-1-2
© 2015 ROHM Co., Ltd. All rights reserved.
1/20
TSZ22111・14・001
2015.10.30 Rev.001
BD8876FV, BD8878FV
Pin Configurations
(TOP VIEW)
1 OUTL
OUTR 14
1 O U T L
BD8876FV INR 13
2 INL
OUTR 14
BD8878FV INR 13
2 INL
3 SVDD
SVSS 12
3 S V D D
SVSS 12
4 SGND
PVSS 11
4 S G N D
PVSS 11
5 SDB
CN 10
6 GAIN
5 S D B
PGND 9
7 PVDD
CN 10
6 NC
CP 8
PGND 9
7 PVDD
CP 8
Figure 2. Pin Configurations
Pin Description/Function
PIN
No.
Pin
name
1
OUTL
2
INL
Equivalence Circuit
Function
Line amplifier (Lch) output
Line amplifier (Lch) input
Line amplifier supply voltage
-
4
SGND
Line amplifier ground
-
6
Shutdown control
(H: active, L: shutdown)
GAIN
Gain control
(BD8876FV) (H: 9.0dB, L:6.0dB)
NC
No Connection
(BD8878FV)
7
PVDD
8
CP
9
PGND
10
CN
11
12
14
PVSS
B
B
PVSS
SVDD
C1
A
Charge pump ground
-
Flying capacitor negative terminal
B
PVSS
Charge pump output voltage
F
SVSS
Line amplifier negative supply input
Line amplifier (Rch) output
PGND
PAD
Flying capacitor positive terminal
OUTR
PAD
E
-
Line amplifier (Rch) input
PGND
E
Charge pump supply voltage
INR
PGND
A
A
C1
SVSS
SVDD
SVDD
PAD
PAD
F
C2
C2
13
PGND
PAD
C1
(BD8876FV)
C2
(BD8878FV)
SVDD
SDB
PVDD
D
3
5
PVDD
Equivalence
Circuit
C1
(BD8876FV)
C2
(BD8878FV)
D
SVSS
SVSS
D
PGND PGND
SVDD
D
PAD
PAD
E
E
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
2/20
SGND
FF
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
Block Diagrams
BD8876FV
BD8878FV
SHORT CIRCUIT
PROTECTION
SHORT CIRCUIT
PROTECTION
22.5k
INL 2
13 INR
SVSS
SVDD
SVSS
SVDD
22.5k
6.8k
6.8k
SGND
SVDD 3
SVDD
15k/19.1k
15k/19.1k
SGND
SGND
SVSS
SVDD 3
12 SVSS
SGND
SGND 4
SGND
11 PVSS
UVLO /
SHUTDOWN
CONTROL
SDB 5
CHARGE
PUMP
15k
SVDD
12 SVSS
SGND
11 PVSS
UVLO /
SHUTDOWN
CONTROL
10 CN
CHARGE
PUMP
OPEN
NC 6
9 PGND
SVSS
SGND
SDB 5
10 CN
GAIN 6
9 PGND
SGND
SGND
PVDD 7
15k
15k
SVDD
SGND 4
SGND
15k
SVDD
13 INR
-
+
42.3k/38.2k
SVSS
-
SVDD
+
+
SVDD
14 OUTR
-
SVSS
+
42.3k/38.2k
-
INL 2
OUTL 1
14 OUTR
OUTL 1
PVDD
PVDD 7
8 CP
PVDD
8 CP
Figure 3. Block Diagrams
Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Rating
Unit
SVDD-PVDD Voltage
VDD
0
V
SGND-PGND Voltage
VGG
0
V
SVSS-PVSS Voltage
VSS
0
V
SVDD, PVDD-SGND or PGND Voltage
VDG
-0.3~6.0
V
SVSS, PVSS-SGND or PGND Voltage
VSG
-6.0~0.3
V
IN_-SGND Voltage
VIN
(SVSS-0.3)~(SVDD+0.3)
V
OUT_-SGND Voltage
VOUT
(SVSS-0.3)~(SVDD+0.3)
V
CP-PGND Voltage
VCP
(PGND-0.3)~(PVDD+0.3)
V
CN-PGND Voltage
VCN
(PVSS-0.3)~(PGND+0.3)
V
SDB-SGND Voltage
VSH
(SGND-0.3)~(SVDD+0.3)
V
GAIN-SGND Voltage
VGA
(SGND-0.3)~(SVDD+0.3)
V
Input current
IIN
-10~10
mA
Power Dissipation
(NOTE 1)
Storage Temperature Range
PD
0.87
W
TSTG
-55~+150
°C
(Note 1) Derate by 6.96mW/°C when operating above 25°C when mounted on 70mm x 70mm x 1.6mm, FR4.1-layer glass
epoxy board.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit
between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection
measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings.
Recommended Operating Conditions
Parameter
Symbol
Supply Voltage Range
VSVDD, VPVDD
Operating Temperature Range
Minimum Load Impedance
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Limit
Unit
Min
Typ
Max
3.0
-
5.5
V
TOPR
-40
-
+85
°C
ZL
550
-
-
Ω
3/20
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF)
Limit
Parameter
Symbol
BD8876FV
BD8878FV
Unit
Remarks
Min
Typ
Max
Min
Typ
Max
IST
-
0.1
2
-
0.1
2
µA
SDB=L
IDD
-
3.2
8.2
-
3.2
10.5
mA
SDB=H, No signal,
RL=No load
H Level Input Voltage
VIH
0.7 x
SVDD
-
-
0.7 x
SVDD
-
-
V
L Level Input Voltage
VIL
-
-
0.3 x
SVDD
-
-
0.3 x
SVDD
V
Input Leak Current
ILEAK
-
-
±1
-
-
±1
µA
Circuit current
Circuit Current
(Shutdown)
Circuit Current
(Active)
SDB pin/GAIN pin
Line amplifier
Start up time
tSON
-
470
-
-
470
-
µsec
Offset Voltage
VIS
-
±0.5
±5
-
±1
±10
mV
Maximum Output
Voltage
VOUT
2.5
3.5
-
2.05
3.0
-
Vrms
THD+N
THD+N
-
0.003
0.032
-
0.003
0.032
%
f=1kHz, VOUT=2Vrms,
20kHz LPF
20
30
40
kΩ
*1 GAIN=L (6dB mode)
*2 GAIN=H (9dB mode)
5.7
6.7
7.7
dB
*1 GAIN=L (6dB mode)
*2 GAIN=H (9dB mode)
Input Impedance
Gain
ZIN1
*1
12
19
26
ZIN2
*2
10
15
20
AV1
*1
5.0
6.0
7.0
AV2
*2
8.0
9.0
10.0
Gain mismatch
ΔAV
-
1
-
-
1
-
%
Output Noise
VN
-
8
-
-
10
-
µVrms
Slew Rate
Maximum Capacitive
Load
SR
-
3.0
-
-
3.0
-
V/µsec
CL
-
-
250
-
-
250
pF
Crosstalk
CT
-
-80
-
-
-65
-
dB
PSRR
-
-65
-
-
-65
-
dB
fOSC
150
300
450
150
300
450
kHz
Power Supply
Rejection Ratio
Charge-Pump
Oscillator Frequency
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
4/20
SDB=L→H
f=1kHz , THD+N≦-40dB,
20kHz LPF
20kHz LPF+A-Weight filter,
Rg=0ohm
f=1kHz, VOUT=200mVP-P,
1kHz BPF
f=1kHz, Vripple=100mVP-P,
1kHz BPF
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF) * SVDD, PVDD shows as ”VDD” in the following graphs.
BD8876FV
BD8878FV
1
8
0.9
7
0.8
Circuit Current (Active) [mA]
Circuit Current (shutdown) [µA]
BD8876FV
BD8878FV
0.7
0.6
0.5
0.4
0.3
6
5
4
3
2
0.2
1
0.1
0
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
6.0
Supply Voltage [V]
3.0
3.5
4.0
4.5
5.0
Supply Voltage [V]
Figure 4.
Figure 5.
Circuit Current (Shutdown)
vs. Supply Voltage
Circuit Current (Active)
vs. Supply Voltage
BD8876FV
VDD=5V
RL=10kΩ
GAIN=6dB
22kHz LPF+A-weight Filter
1m
VDD=5V
RL=10kΩ
22kHz LPF+A-weight Filter
1m
100u
Noise [Vrms]
100u
Noise [Vrms]
6.0
BD8878FV
10m
10m
5.5
10u
10u
VN=10.6µVrms
VN=7.8µVrms
1u
1u
0.1u
0.1u
10
100
1k
10k
100k
10
100
1k
10k
Frequency [Hz]
Frequency [Hz]
Figure 6.
Figure 7.
Noise Level (BD8876FV)
Noise Level (BDD8878FV)
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
100k
5/20
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF) * SVDD, PVDD shows as ”VDD” in the following graphs.
BD8876FV
BD8876FV
6
6
f=1kHz
RL=10kΩ
Gain=6dB
5
Output Voltage [Vrms]
Output Voltage [Vrms]
5
f=1kHz
RL=10kΩ
Gain=9dB
VDD=5.5V
4
VDD=5V
3
2
VDD=5.5V
4
VDD=5V
3
2
VDD=3V
VDD=3V
1
1
0
0
0.0
0.5
1.0
1.5
2.0
2.5
0.0
3.0
1.5
2.0
2.5
Figure 8.
Figure 9.
Output Voltage vs. Input Voltage
(BD8876FV, 6dB)
Output Voltage vs. Input Voltage
(BD8876FV, 9dB)
BD8878FV
6
VOUT=2Vrms
RL=10kΩ
Gain=6dB
11
VDD=5.5V
f=1kHz
RL=10kΩ
3.0
BD8876FV
12
10
9
4
Gain [dB]
Output Voltage [Vrms]
1.0
Input Voltage [Vrms]
Input Voltage [Vrms]
5
0.5
VDD=5V
3
VDD=3V
VDD=5V
VDD=5.5V
8
7
6
2
5
VDD=3V
4
1
3
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
100
1k
10k
Frequency [Hz]
Input Voltage [Vrms]
Figure 10.
Figure 11.
Output Voltage vs. Input Voltage
(BD8878FV)
Gain vs. Frequency
(BD8876FV, 6dB)
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
100k 200k
6/20
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF) * SVDD, PVDD shows as ”VDD” in the following graphs.
BD8878FV
12
11
11
10
10
9
9
Gain [dB]
Gain [dB]
BD8876FV
12
8
7
6
VOUT=2Vrms
RL=10kΩ
Gain=9dB
5
VDD=3V
VDD=5V
VDD=5.5V
8
7
6
VOUT=2Vrms
RL=10kΩ
5
4
4
3
3
2
2
100
1k
10k
Frequency [Hz]
100k 200k
10k
Figure 12.
Figure 13.
Gain vs. Frequency
(BD8878FV)
BD8876FV
BD8876FV
10
VDD=3V
Gain=6dB
RL=10kΩ
20kHz LPF
1
0.1
0.01
0.001
0.01
1k
Frequency [Hz]
THD+N [%]
1
100
100k 200k
Gain vs. Frequency
(BD8876FV, 9dB)
10
THD+N [%]
VDD=3V
VDD=5V
VDD=5.5V
VDD=5V
Gain=6dB
RL=10kΩ
20kHz LPF
0.1
0.01
0.1
1
Output Voltage [Vrms]
0.001
0.01
10
0.1
1
Output Voltage [Vrms]
Figure 14.
Figure 15.
THD+N vs. Output Voltage
(BD8876FV, 3V)
THD+N vs. Output Voltage
(BD8876FV, 5V)
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
7/20
10
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF) * SVDD, PVDD shows as ”VDD” in the following graphs.
BD8876FV
BD8878FV
10
VDD=5.5V
Gain=6dB
RL=10kΩ
20kHz LPF
VDD=3V
RL=10kΩ
20kHz LPF
1
THD+N [%]
THD +N[%]
1
10
0.1
0.01
0.01
0.001
0.01
0.1
0.1
1
0.001
0.01
10
10
Figure 16.
Figure 17.
THD+N vs. Output Voltage
(BD8876FV, 5.5V)
THD+N vs. Output Voltage
(BD8878FV, 3V)
BD8878FV
10
BD8878FV
10
VDD=5V
RL=10kΩ
20kHz LPF
VDD=5.5V
RL=10kΩ
20kHz LPF
1
1
THD +N[%]
THD+N [%]
1
Output Voltage [Vrms]
Output Voltage [Vrms]
0.1
0.01
0.001
0.01
0.1
0.1
0.01
0.1
1
Output Voltage [Vrms]
0.001
0.01
10
0.1
1
Output Voltage [Vrms]
Figure 18.
Figure 19.
THD+N vs. Output Voltage
(BD8878FV, 5V)
THD+N vs. Output Voltage
(BD8878FV, 5.5V)
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
8/20
10
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF) * SVDD, PVDD shows as ”VDD” in the following graphs.
BD8876FV
BD8878FV
10
10
VDD=5V
Gain=6dB
Vo=2Vrms
RL=10kΩ
20kHz LPF
1
THD+N [%]
THD+N [%]
1
0.1
0.01
0.1
0.01
0.001
0.001
0.0001
100
1k
Frequency [Hz]
10k
20k
0.0001
100
Figure 21.
THD+N vs. Frequency
(BD8878FV)
VDD=5V
Vripple=100mVP-P
RL=10kΩ
Band Pass Filter
-10
-20
PSRR [dB]
-30
-40
20k
BD8878FV
0
VDD=5V
Gain=6dB
Vripple=100mVP-P
RL=10kΩ
Band Pass Filter
-20
10k
Figure 20.
BD8876FV
-10
1k
Frequency [Hz]
THD+N vs. Frequency
(BD8876FV)
0
PSRR [dB]
VDD=5V
Vo=2Vrms
RL=10kΩ
20kHz LPF
-30
-40
-50
-50
-60
-60
-70
-70
-80
-80
10
100
1k
Frequency [Hz]
10k
20k
100k
10
100
1k
20k
100k
Frequency [Hz]
Figure 22.
Figure 23.
PSRR vs. Frequency
(BD8876FV)
PSRR vs. Frequency
(BD8878FV)
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
10k
9/20
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
(Unless otherwise specified, Ta=25°C, SVDD=PVDD=5V, SGND=PGND=0V, SDB=H, GAIN=L [BD8876FV], C1=C2=1µF,
RL=10kΩ, Input coupling capacitor=1µF) * SVDD, PVDD shows as ”VDD” in the following graphs.
BD8876FV
BD8876FV
0
0
VDD=5V
Lch to Rch, Rch to Lch
Gain=6dB
Vo=200mVP-P
RL=10kΩ
20kHz LPF
-10
-20
-20
-30
Crosstalk [dB]
Crosstalk [dB]
-30
VDD=5V
Lch to Rch, Rch to Lch
Gain=6dB
Vo=2Vrms
RL=10kΩ
20kHz LPF
-10
-40
-50
-60
-40
-50
-60
-70
-80
-70
-90
-80
-100
-90
-110
-100
-120
10
100
1k
Frequency [Hz]
100k
20k
10
Figure 25.
VDD=5V
Lch to Rch, Rch to Lch
Vo=2Vrms
RL=10kΩ
20kHz LPF
-10
-20
-30
-40
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
-90
-100
100k
20k
BD8878FV
0
Crosstalk [dB]
-30
10k
Crosstalk vs. Frequency
(BD8876FV, 2Vrms)
VDD=5V
Lch to Rch, Rch to Lch
Vo=20mVP-P
RL=10kΩ
20kHz LPF
-20
1k
Frequency [Hz]
Figure 24.
BD8878FV
-10
100
Crosstalk vs. Frequency
(BD8876FV, 200mVP-P)
0
Crosstalk [dB]
10k
-100
10
100
1k
10k
100k
20k
Frequency [Hz]
10
100
1k
10k
Frequency [Hz]
Figure 26.
Figure 27.
Crosstalk vs. Frequency
(BD8878FV, 200mVP-P)
Crosstalk vs. Frequency
(BD8878FV, 2Vrms)
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
100k
20k
10/20
TSZ02201-0C1C0EZ00280-1-2
2015.10.30 Rev.001
BD8876FV, BD8878FV
Application Examples
SHORT CIRCUIT
PROTECTION
OUTL
OUTR
1
14
RL>550Ω
CBPS=1.0µF
SHUTDOWN
CONTROL
GAIN
CONTROL
SGND
SDB
GAIN
5.0V
PVDD
SVDD
3
SVDD
4
SGND
SVDD
SVSS
SGND
SGND
INR
42.3k/38.2k
13
-
SVSS
+
CCL=1.0µF
5.0V
SVDD
2
+
Lch Input
RR>550Ω
42.3k/38.2k
-
INL
15k/19.1k
15k/19.1k
SVSS
12
SVDD
11
UVLO /
SHUTDOWN
CONTROL
5
10
Rch Input
CCR=1.0µF
SVSS
PVSS
CN
C2=1.0µF
CHARGE
PUMP
6
PGND
9
C1=1.0µF
SGND
7
8 CP
PVDD
CBPP=1.0µF
Figure 28. BD8876FV Application circuit example
SHORT CIRCUIT
PROTECTION
OUTL
1
14
RL>550Ω
SHUTDOWN
CONTROL
SGND
SDB
SVSS
+
6.8k
SVDD
22.5k
SVSS
15k
15k
SVDD
15k
SVSS
Rch Input
SVSS
SGND
11
UVLO /
SHUTDOWN
CONTROL
10
PVSS
CN
C2=1.0µF
CHARGE
PUMP
OPEN
NC 6
5.0V
PVDD
12
SGND
5
INR
CCR=1.0µF
SGN
D
15k
SVDD
13
6.8k
SGN
D
SGND
4
SVDD
-
CCL=1.0µF
5.0V
SVDD 3
CBPS=1.0µF
22.5k
2
-
INL
RR>550Ω
+
Lch Input
OUTR
9
PGND
C1=1.0µF
SGND
7
8 CP
PVDD
CBPP=1.0µF
Figure 29. BD8878FV Application circuit example
* PVSS and SVSS are connected each other inside IC. But, please connect PVSS and SVSS outside IC, also.
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Timing Chart
< Sequence of start-up / power-down>
PVDD, SVDD
SDB
PVSS, SVSS
INL, INR
OUTL
OUTR
Setup
(Charge pump
Start-up)
Shutdown
VDD
OFF -> ON
Shutdown
ON -> OFF
Active
-> Shutdown
Active
(Line Amp enable)
Signal input
Available
Figure 30. Sequence of start-up / power-down
①
The term from “PVDD, SVDD : ON” to “shutdown ON->OFF”
Audio
Source
Vs
Vin
Cin
Rin
=7.5k 7.5k
Vs [V]
When power supply (PVDD, SVDD) is applied, it is started that charging input coupling capacitors. Therefore, the input
terminal voltage ”Vin” is changed as following Figure 31. Time constant “τ” of charging input coupling capacitor is decided by
input coupling capacitor Cin and Internal input impedance Rin (See formula (1)). Internal impedance Rin in term of
shutdown is 7.5kΩ(typ) for making time constant τ shorten. If “SDB” is changed “L” to “H” (shutdown ON -> OFF) during
input DC voltage (Vin) is changing, pop noise may occur. It is recommended that shutdown ON -> OFF (“SDB” : L -> H) after
5τ ~ 6τ.
Vout
42.3k
Bias
VDD
0
time [s]
Vin [V]
+
Bias
VSS
0
time [s]
Convergence [%]
Figure 31. Fluctuation of input terminal voltage when charging input coupling capacitor
100
90
80
70
60
50
40
30
20
10
0
τ = Rin x Cin
0τ
1τ
2τ
3τ
4τ
5τ
Wait time [s]
6τ
7τ
8τ
(1)
(e.g.) in case of Cin =1.0µF,
τ = Rin x Cin
=7.5kΩ x 1.0µF
= 7.5 msec(typ)
6τ = 6 x 7.5msec
= 45 msec (typ)
Figure 32. Wait time vs. convergence
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②
The term from shutdown OFF to line amplifier start-up
When shutdown is ON -> OFF, charge pump starts up. Line amplifier is stopped during “tSON (start-up time of charge pump,
470µsec typ.)” for preventing irregular output. Please input audio signal after “tSON”.
[V]
VDD
SDB
0
[time]
[V]
[time]
0
PVSS
SVSS
470µsec(typ.)
shutdown
Line Amplifier
active
wait(=tSON)
Figure 33. Wait time for Line amplifier from “shutdown ON -> OFF”
Functional Descriptions / Application Information
The composition of conventional line amplifier is shown in Figure 34. Output signal swings in reference to Middle DC bias
(e.g. VDD/2). Therefore, Output dynamic range of line amplifier limits until “VDD”.
Vout
Input
VDD
VDD
Vout [V]
+
GND
VDD/2
0
Output range
≈ VDD
time [s]
Middle DC Bias (ex. VDD/2)
Figure 34. The composition of conventional line amplifier
The composition of BD8876FV/BD8878FV is shown to Figure 35. Output signal swings in reference to ground level. Line
amplifier can output between from VSS (-VDD) to VDD. Therefore, Output dynamic range of line amplifier expands
“2 x VDD”. And, it is possible to drive 2Vrms (5.65VP-P) with single supply voltage 5V.
BD8876FV
BD8878FV
Vout
VDD
VDD
-
-
Input
+
C1 : Flying
Capacitor
+
VSS
Charge
Pump
Vout
VDD
Vout [V]
Input
VSS
Output range
≈ 2 x VDD
0
time [s]
Charge
Pump
C2 : Hold
Capacitor
VSS
Figure 35. The composition of BD8876FV/BD8878FV
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■ CHARGE PUMP
The negative power supply circuit is composed of the regulated charge-pump. This circuit outputs the negative
voltage (PVSS) from positive power-supply voltage (PVDD).
The negative power supply circuit starts when “SDB=H”, and power is downed when “SDB=L”(See Table 1).
Table 1. Control of the charge pump circuit
SDB
Control
L
Power down
H
Power on
<The flying capacitor and the hold capacitor>
The flying capacitor (Figure 35. C1) and the hold capacitor (Figure 35. C2) have great influences on the characteristic
of the charge pump. Please select capacitors that have low ESR characteristic and low voltage coefficient, low
temperature coefficient for C1, C2. And, please connect these capacitors as near as possible to IC.
<Over-current Protection>
The charge pump has the over-current protection function. If the terminals of charge pump (CP, CN, PVSS, SVSS) are
under the abnormal connecting conditions (e.g. shorting to ground), this function shutdown IC and protect it from the
damage.
■Line Amplifier
The line amplifier is driven by power-supply voltage (SVDD) and negative voltage (SVSS) based on ground (SGND).
Therefore, the amplifier can output 2Vrms for RL=10kohm with the single supply voltage 5V. And BD8876FV can
change the gain 6dB and 9dB. The gain of BD8878FV is 6.7dB (fixed).
The both of Lch and Rch of the line amplifier are simultaneously controlled by SDB logic (See Table 2).
In addition, the over-current protection circuit is built in. The amplifier is shutdown, when the over-current occurs
because of the output short-circuit etc., and IC is protected from being destroyed.
Table 2. Control of the Line amplifier circuit
SDB
Lch/Rch amplifier control
L
Power down
H
Power on
<Input coupling capacitor>
Input DC voltage level of BD8876FV/BD8878FV is 0V (SGND). Therefore, input coupling capacitor is needed.
Gain is decreased in low frequency because of composing the high-pass filter by input coupling capacitor Cin and
internal input impedance Rin of BD8876FV/BD8878FV.
Input impedance Rin of BD8876FV is 15kΩ (Typ, Gain=+9dB), and Rin of BD8878FV is 30kΩ (Typ).
Cut-off frequency of the high-pass filter is shown to the following formula (2).
9.0
Rin=15kΩ
6.0
3.0
Cin=10.0μ F
Gain [dB]
0.0
-3.0
fc 
-6.0
Cin=4.7μ F
-9.0
-12.0
1
2Rin C in
(2)
Cin=2.2μ F
-15.0
Cin=1.0μ F
-18.0
-21.0
1
10
100
Frequency [Hz]
Figure 36. Frequency response by the input coupling capacitor (Reference data: Calculated value)
The degradation of THD happens because of the input coupling capacitor. Therefore, please consider the applied
voltage dependence and the temperature characteristic of the capacitor when selecting parts.
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■ UVLO / SHUTDOWN CONTROL
BD8876FV/BD8878FV has low voltage protection function (UVLO: Under Voltage Lock Out).
UVLO function protects from abnormal operation under lower power supply voltage than the recommended supply voltage
range. The detection voltage is 2.8V (Typ). It does not influence the recommended operation voltage (3.0V (Min)). The power
control by UVLO works for the whole of IC, and power down the both of the negative power supply charge pump and the line
amplifier. If power supply voltage recovers over recommended range (3.0V), all function also recover automatically.
Power Dissipation
SSOP-B14
1
0.87W
Power dissipation Pd (mW)
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
25
50
75
100
125
150
Ta (℃)
Figure 37. Power Dissipation Curve
Measurement Condition: Mounted on ROHM standard board, glass-epoxy
Board size: 74.2mm×74.2mm×1.6mm (1-layer)
Material: FR4
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on
the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the
IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Rush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has
more than one power supply. Therefore, give special consideration to power coupling capacitance, power
wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to the
power supply or ground line.
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Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 38. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
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Ordering Information
B
D
8
8
7
6
F
V
-
E
2
B
D
8
8
7
8
F
V
-
E
2
Package
FV: SSOP-B14
Part Number
Packaging and forming specification
E2: Embossed tape and reel
Line-up
BD8876FV
BD8878FV
Amplifier type
Inverting amplifier
Non-inverting amplifier
Gain
+6dB / +9dB
(Changed by Gain pin)
+6.7dB
Package
SSOP-B14
Marking Diagram
SSOP-B14 (TOP VIEW)
Part Number Marking
SSOP-B14 (TOP VIEW)
Part Number Marking
D8876
D8878
LOT Number
1PIN MARK
1PIN MARK
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BD8876FV, BD8878FV
Physical Dimension, Tape and Reel Information
Package Name
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BD8876FV, BD8878FV
Revision History
Date
Revision
2015/10/30
001
Changes
First version
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
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Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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