TC7126 DATA SHEET (02/05/2013) DOWNLOAD

TC7126/A
3-1/2 Digit Analog-to-Digital Converters
Features:
General Description:
• Internal Reference with Low Temperature Drift:
- TC7126: 80ppm/°C, Typical
- TC7126A: 35ppm/°C, Typical
• Zero Reading with Zero Input
• Low Noise: 15VP-P
• High Resolution: 0.05%
• Low Input Leakage Current: 1pA Typ., 10pA Max.
• Precision Null Detectors with True Polarity at Zero
• High-Impedance Differential Input
• Convenient 9V Battery Operation with Low-Power
Dissipation: 500W Typ., 900W Max.
The TC7126A is a 3-1/2 digit CMOS Analog-to-Digital
Converter (ADC) containing all the active components
necessary to construct a 0.05% resolution measurement system. Seven-segment decoders, digit and
polarity drivers, voltage reference, and clock circuit are
integrated on-chip. The TC7126A directly drives a
Liquid Crystal Display (LCD), and includes a backplane
driver.
Applications:
• Thermometry
• Bridge Readouts: Strain Gauges, Load Cells,
Null Detectors
• Digital Meters and Panel Meters:
- Voltage/Current/Ohms/Power, pH
• Digital Scales, Process Monitors
Device Selection Table
Package
Code
Package
Temperature
Range
CPL
40-Pin PDIP
0C to +70C
IPL
40-Pin PDIP (TC7126 Only)
-25C to +85C
CKW
44-Pin PQFP
0C to +70C
CLW
44-Pin PLCC
0C to +70C
 2002-2012 Microchip Technology Inc.
A low-cost, high resolution indicating meter requires
only a display, four resistors, and four capacitors. The
TC7126A’s extremely low-power drain and 9V battery
operation make it ideal for portable applications.
The TC7126A reduces linearity error to less than 1
count. Rollover error (the difference in readings for
equal magnitude, but opposite polarity input signals) is
below ±1 count. High-impedance differential inputs
offer 1pA leakage current and a 1012 input impedance. The 15VP-P noise performance ensures a “rock
solid” reading, and the auto-zero cycle ensures a zero
display reading with a 0V input.
The TC7126A features a precision, low drift internal
voltage reference and is functionally identical to the
TC7126. A low drift external reference is not normally
required with the TC7126A.
DS21458D-page 1
TC7126/A
Package Type
39 VREF-
G1 8
38 CREF+
OSC1 7
27 POL
32 CAZ
V+ 8
26 AB4
31 VBUFF
D1 9
25 E3
C1 10
24 F3
B1 11
23 B3
NC 5
29 G3
TC7126CKW
TC7126ACKW
28 BP
40-Pin PDIP (Normal)
E2
A1
12 13 14 15 16 17 18 19 20 21 22
G2
A3
C3
G3
BP
NC
POL
AB4
F3
E3
B3
18 19 20 21 22 23 24 25 26 27 28
44-Pin PDIP (Reverse)
40 OSC1
OSC1
1
39
OSC2
OSC2
2
3
38 OSC3
OSC3
3
38 C1
4
37 TEST
TEST
4
37 B1
36 A1
V+
1
D1
2
C1
B1
Normal Pin
Configuration
Reverse Pin
Configuration
40 V+
39 D1
A1
5
36 VREF+
VREF+ 5
F1
6
35 VREF-
VREF-
6
35
G1
7
34 C
CREF+
7
34 G1
E1
8
CREF-
8
D2
9
+
REF
TC7126CPL
C
33
TC7126ACPL
REFTC7126IPL 32 ANALOG
COMMON
TC7126AIPL
TC7126RCPL
TC7126ARCPL 33 E1
ANALOG 9
TC7126RIPL 32 D2
COMMON
TC7126ARIPL
V +
31 VIN+
10
31 C2
30 VIN-
VIN- 11
30 B2
12
29 CAZ
CAZ
29 A2
A2
F2 13
E2
14
IN
12
VBUFF 13
28 VBUFF
27 VINT
28
27 E2
26 V-
V-
15
26 D3
B3
16
25 G2
G2 16
25 B3
F3 17
24 C3
C3
17
24
E3
18
23 A3
A3
18
23 E3
AB4
19
22 G3
POL 20
(Minus Sign)
100's
G3 19
21 BP
(Backplane)
BP 20
(Backplane)
10's
F2
VINT 14
D3 15
100's
1's
F1
B2 11
C2 10
V-
33 VIN-
29 V-
1000's
VINT
34 NC
OSC2 6
D3 17
100's
VBUFF
30 A3
30 VINT
10's
CAZ
OSC3 4
E2 16
1's
VIN-
31 C3
D3
F2 15
37 CREF36 ANALOG
COMMON
35 VIN+
F2
B2 13
A2 14
32 G2
A2
NC 12
NC 2
TEST 3
B2
TC7126CLW
TC7126ACLW
33 NC
C2
C2 11
NC 1
D2
D2 10
ANALOG
COMMON
VIN+
44 43 42 41 40 39 38 37 36 35 34
F1 7
E1 9
CREF-
44 43 42 41 40
E1
1
VREF-
2
CREF+
OSC1
3
F1
NC
4
G1
V+
5
VREF+
D1
VREF+
C1
6
TEST
B1
OSC3
44-Pin PQFP
A1
OSC2
44-Pin PLCC
F3
22 AB4
100's
1000's
21 POL
(Minus Sign)
NC = No Internal Connection
DS21458D-page 2
 2002-2012 Microchip Technology Inc.
TC7126/A
Typical Application
0.1μF
1MΩ
+
Analog
Input
–
31
34
33
CREF+
CREF-
TC7126
TC7126A
LCD
VIN+
2–19
22–25
30 VIN-
POL
0.01μF
BP
32 ANALOG
COMMON
V+
28
180kΩ
0.33
μF
29
0.15μF
Segment
Drive
20
21
Minus Sign
Backplane
1
VBUFF
240kΩ
+
9V
VREF+ 36
CAZ
OSC2
VREFVOSC3 OSC1
39
38 COSC 40
27 V
INT
ROSC 50pF
10kΩ
35
26
1 Conversion/Sec
To Analog Common (Pin 32)
560kΩ
Note: Pin numbers refer to 40-pin DIP.
 2002-2012 Microchip Technology Inc.
DS21458D-page 3
DS21458D-page 4
VIN-
Analog
Common
VIN+
32
31
INT
INT
10
μA
CREF+
34
DE (–)
DE
(+)
+
–
+
–
ZI
V+ – 2.8V
33
CREF- VBUFF
26
V-
ZI &
AZ
35
VREF-
AZ & DE (±)
DE (+)
DE
(–)
ZI & AZ
36
VREF+
CREF
TC7126A
1
Low
Temp Co
VREF
28
V+
RINT
CINT
ROSC
39
OSC2
Clock
–
+
27
VINT
Comparator
40
OSC1
AZ
+
–
Integrator
29
CAZ
2mA
0.5mA
V+
COSC
38
OSC3
4
LCD
Hundreds
7-Segment
Decode
VTH = 1V
Control Logic
Tens
Data Latch
7-Segment
Decode
LCD Segment Drivers
Internal Digital Ground
FOSC
To Switch Drivers From
Comparator Output
Thousands
To Digital
Section
Segment
Output
Typical Segment Output
Units
7-Segment
Decode
BP
500Ω
6.2V
¸ 200
21
26
1
V-
TEST
V+
TC7126/A
Functional Block Diagram
 2002-2012 Microchip Technology Inc.
TC7126/A
1.0
ELECTRICAL
CHARACTERISTICS
*Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only and functional
operation of the device at these or any other conditions
above those indicated in the operation sections of the
specifications is not implied. Exposure to Absolute
Maximum Rating conditions for extended periods may
affect device reliability.
Absolute Maximum Ratings*
Supply Voltage (V+ to V-)....................................... 15V
Analog Input Voltage (either Input) (Note 1) ... V+ to VReference Input Voltage (either Input) ............ V+ to VClock Input ................................................... Test to V+
Package Power Dissipation (TA  70°C) (Note 2):
44-Pin PQFP............................................... 1.00W
40-Pin PLCC ............................................... 1.23W
44-Pin PDIP ................................................ 1.23W
Operating Temperature Range:
C (Commercial) Devices .................. 0°C to +70°C
I (Industrial) Devices .................... -25°C to +85°C
Storage Temperature Range.............. -65°C to +150°C
TABLE 1-1:
TC7126/A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VS = +9V, fCLK – 16kHz, and TA = +25°C, unless otherwise noted.
Symbol
Parameter
Min
Typ
Max
Unit
-000.0
±000.0
+000.0
Digital
Reading
Test Conditions
Input
ZIR
Zero Input Reading
VIN = 0V
Full Scale = 200mV
—
0.2
1
V/°C
VIN = 0V, 0°C  TA +70°C
999
999/1000
1000
Digital
Reading
VIN = VREF, VREF = 100mV
Linearity Error
-1
±0.2
1
Count
Full Scale = 200mV or 2V
Max Deviation From Best Fit
Straight Line
Rollover Error
-1
±0.2
1
Count
VIN- = VIN+  200mV
eN
Noise
—
15
—
VP-P
IL
Input Leakage Current
—
1
10
pA
CMRR
Common Mode Rejection Ratio
—
50
—
V/V
Scale Factor Temperature
Coefficient
—
1
5
ppm/°C
Zero Reading Drift
ZRD
Ratiometric Reading
NL
VIN = 0V, Full Scale = 200mV
VIN = 0V
VCM = ±1V, VIN = 0V
Full Scale = 200mV
VIN = 199mV, 0°C  TA  +70°C
Ext. Ref. Temp Coeff. = 0ppm/°C
Analog Common
VCTC
Analog Common Temperature
Coefficient
—
—
—
—
250k Between Common and V+
—
—
—
—
0°C  TA  +70°C (“C” Devices)
—
80
—
ppm/°C
TC7126
—
35
75
ppm/°C
TC7126A
—
35
100
ppm/°C
-25°C  TA  +85°C (“I” Device)
(TC7126A)
Note 1:
2:
3:
4:
Input voltages may exceed the supply voltages, provided the input current is limited to ±100A.
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Refer to “Differential Input” discussion.
Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.
5: See “Typical Application”.
6: During Auto-Zero phase, current is 10-20A higher. A 48kHz ocillator increases current by 8A (Typical). Common
current is not included.
 2002-2012 Microchip Technology Inc.
DS21458D-page 5
TC7126/A
TABLE 1-1:
TC7126/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VS = +9V, fCLK – 16kHz, and TA = +25°C, unless otherwise noted.
Symbol
Parameter
Analog Common Voltage
VC
Min
Typ
Max
Unit
Test Conditions
2.7
3.05
3.35
V
250k Between Common and V+
LCD Drive
VSD
LCD Segment Drive Voltage
4
5
6
VP-P
V+ to V- = 9V
VBD
LCD Backplane Drive Voltage
4
5
6
VP-P
V+ to V- = 9V
—
55
100
A
Power Supply
IS
Power Supply Current
VIN = 0V, V+ to V- = 9V (Note 6)
Note 1:
2:
3:
4:
Input voltages may exceed the supply voltages, provided the input current is limited to ±100A.
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Refer to “Differential Input” discussion.
Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.
5: See “Typical Application”.
6: During Auto-Zero phase, current is 10-20A higher. A 48kHz ocillator increases current by 8A (Typical). Common
current is not included.
DS21458D-page 6
 2002-2012 Microchip Technology Inc.
TC7126/A
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
(40-Pin PDIP)
Normal
(Reversed)
Symbol
1
(40)
V+
Positive supply voltage.
2
(39)
D1
Activates the D section of the units display.
3
(38)
C1
Activates the C section of the units display.
4
(37)
B1
Activates the B section of the units display.
5
(36)
A1
Activates the A section of the units display.
6
(35)
F1
Activates the F section of the units display.
7
(34)
G1
Activates the G section of the units display.
8
(33)
E1
Activates the E section of the units display.
9
(32)
D2
Activates the D section of the tens display.
10
(31)
C2
Activates the C section of the tens display.
Description
11
(30)
B2
Activates the B section of the tens display.
12
(29)
A2
Activates the A section of the tens display.
13
(28)
F2
Activates the F section of the tens display.
14
(27)
E2
Activates the E section of the tens display.
15
(26)
D3
Activates the D section of the hundreds display.
16
(25)
B3
Activates the B section of the hundreds display.
17
(24)
F3
Activates the F section of the hundreds display.
18
(23)
E3
Activates the E section of the hundreds display.
19
(22)
AB4
Activates both halves of the 1 in the thousands display.
20
(21)
POL
Activates the negative polarity display.
21
(20)
BP
LCD Backplane drive output (TC7106A). Digital Ground (TC7107A).
22
(19)
G3
Activates the G section of the hundreds display.
23
(18)
A3
Activates the A section of the hundreds display.
24
(17)
C3
Activates the C section of the hundreds display.
25
(16)
G2
Activates the G section of the tens display.
26
(15)
V-
Negative power supply voltage.
27
(14)
VINT
28
(13)
VBUFF
29
(12)
CAZ
The size of the auto-zero capacitor influences system noise. Use a 0.33F capacitor
for 200mV full scale, and a 0.033F capacitor for 2V full scale. See Section 6.1
“Auto-Zero Capacitor (CAZ)”, Auto-Zero Capacitor for additional details.
30
(11)
VIN-
The analog LOW input is connected to this pin.
31
(10)
VIN+
The analog HIGH input signal is connected to this pin.
32
(9)
33
(8)
The integrating capacitor should be selected to give the maximum voltage swing that
ensures component tolerance buildup will not allow the integrator output to saturate.
When analog common is used as a reference and the conversion rate is 3 readings
per second, a 0.047F capacitor may be used. The capacitor must have a low
dielectric constant to prevent rollover errors. See Section 6.3 “Integrating Capacitor (CINT)”, Integrating Capacitor for additional details.
Integration resistor connection. Use a 180k resistor for a 200mV full-scale range
and a 1.8M resistor for a 2V full scale range.
ANALOG This pin is primarily used to set the Analog Common mode voltage for battery operaCOMMON tion, or in systems where the input signal is referenced to the power supply. It also
acts as a reference voltage source. See Section 7.3 “Analog Common (Pin 32)”,
Analog Common for additional details.
CREF-
 2002-2012 Microchip Technology Inc.
See Pin 34.
DS21458D-page 7
TC7126/A
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-Pin PDIP)
Normal
(Reversed)
Symbol
34
(7)
CREF+
A 0.1F capacitor is used in most applications. If a large Common mode voltage
exists (for example, the VIN- pin is not at analog common) and a 200mV scale is
used, a 1F capacitor is recommended and will hold the rollover error to 0.5 count.
35
(6)
VREF-
See Pin 36.
36
(5)
VREF+
The analog input required to generate a full scale output (1999 counts). Place 100mV
between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for
2V full scale. See Section 6.6 “Reference Voltage Selection”, Reference Voltage
for additional information.
37
(4)
TEST
Lamp test. When pulled HIGH (to V+), all segments will be turned on and the display
should read -1888. It may also be used as a negative supply for externally
generated decimal points. See Section 7.4 “TEST (Pin 37)”, TEST for additional
information.
38
(3)
OSC3
See Pin 40.
39
(2)
OSC2
See Pin 40.
40
(1)
OSC1
Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock (3 readings,
39 per second), connect Pin 40 to the junction of a 180k resistor and a 50pF
capacitor. The 180k resistor is tied to Pin 39 and the 50pF capacitor is tied to
Pin 38.
DS21458D-page 8
Description
 2002-2012 Microchip Technology Inc.
TC7126/A
3.0
DETAILED DESCRIPTION
EQUATION 3-1:
VRTRI
1 TSI
RC 0 VIN(t)dt = RC

(All Pin Designations Refer to 40-Pin PDIP.)
3.1
Dual Slope Conversion Principles
The TC7126A is a dual slope, integrating analog-todigital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
Where:
VR = Reference voltage
TSI = Signal integration time (fixed)
TRI = Reference voltage integration time (variable)
For a constant VIN:
EQUATION 3-2:
• Input Signal Integration
• Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a
fixed time period (TSI). Time is measured by counting
clock pulses. An opposite polarity constant reference
voltage is then integrated until the integrator output
voltage returns to zero. The reference integration time
is directly proportional to the input signal (TRI) (see
Figure ).
Integrator
–
+
Comparator
–
+
Switch
Driver
Phase
Control
Polarity Control
Fixed
Signal
Integrate
Time
V
RI
-----RT
SI
Clock
Control
Logic
Counter
Display
Integrator
Output
REF
Voltage
IN
=
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are integrated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation converters in high noise environments. Interfering signals with
frequency components at multiples of the averaging
period will be attenuated. Integrating ADCs commonly
operate with the signal integration period set to a
multiple of the 50Hz/60Hz power line period (see
Figure 3-2).
VIN » VREF
VIN » 1.2 VREF
Variable
Reference
Integrate
Time
30
Normal Mode Rejection (dB)
Analog
Input
Signal
T
V
20
10
t = Measurement Period
0
FIGURE 3-1:
Basic Dual Slope Converter
In a simple dual slope converter, a complete conversion requires the integrator output to “ramp-up” and
“ramp-down.”
0.1/t
1/t
Input Frequency
10/t
FIGURE 3-2:
Normal Mode Rejection of
Dual Slope Converter
A simple mathematical equation relates the input
signal, reference voltage and integration time:
 2002-2012 Microchip Technology Inc.
DS21458D-page 9
TC7126/A
4.0
ANALOG SECTION
In addition to the basic integrate and de-integrate dual
slope cycles discussed above, the TC7126A design
incorporates an auto-zero cycle. This cycle removes
buffer amplifier, integrator and comparator offset voltage error terms from the conversion. A true digital zero
reading results without external adjusting potentiometers. A complete conversion consists of three phases:
1.
2.
3.
Auto-Zero phase
Signal Integrate phase
Reference Integrate phase
The differential input voltage must be within the device
Common mode range when the converter and measured system share the same power supply common
(ground). If the converter and measured system do not
share the same power supply common, VIN- should be
tied to analog common.
Polarity is determined at the end of signal integrate
phase. The sign bit is a true polarity indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection limited only by device
noise and auto-zero residual offsets.
4.3
4.1
Auto-Zero Phase
During the auto-zero phase, the differential input signal
is disconnected from the circuit by opening internal
analog gates. The internal nodes are shorted to analog
common (ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits comparator offset voltage error compensation. The voltage
level established on CAZ compensates for device offset
voltages. The auto-zero phase residual is typically
10V to 15V. The auto-zero cycle length is 1000 to
3000 clock periods.
4.2
Signal Integrate Phase
Reference Integrate Phase
The third phase is reference integrate or de-integrate.
VIN- is internally connected to analog common and
VIN+ is connected across the previously charged reference capacitor. Circuitry within the chip ensures that
the capacitor will be connected with the correct polarity
to cause the integrator output to return to zero. The
time required for the output to return to zero is proportional to the input signal and is between 0 and 2000
counts. The digital reading displayed is:
EQUATION 4-2:
VIN
1000 V
REF
The auto-zero loop is entered and the internal differential inputs connect to VIN+ and VIN-. The differential
input signal is integrated for a fixed time period. The
TC7126/A signal integration period is 1000 clock
periods or counts. The externally set clock frequency is
divided by four before clocking the internal counters.
The integration time period is:
EQUATION 4-1:
TSI =
4
x 1000
FOSC
Where: FOSC = external clock frequency.
DS21458D-page 10
 2002-2012 Microchip Technology Inc.
TC7126/A
5.0
DIGITAL SECTION
5.1
System Timing
The TC7126A contains all the segment drivers necessary to directly drive a 3-1/2 digit LCD, including an
LCD backplane driver. The backplane frequency is the
external clock frequency divided by 800. For 3 conversions per second, the backplane frequency is 60Hz
with a 5V nominal amplitude. When a segment driver is
in phase with the backplane signal, the segment is
OFF. An out of phase segment drive signal causes the
segment to be ON (visible). This AC drive configuration
results in negligible DC voltage across each LCD segment, ensuring long LCD life. The polarity segment
driver is ON for negative analog inputs. If VIN+ and VINare reversed, this indicator reverses.
The oscillator frequency is divided by four prior to
clocking the internal decade counters. The four-phase
measurement cycle takes a total of 4000 counts
(16,000 clock pulses). The 4000-count cycle is
independent of input signal magnitude.
On the TC7126A, when the TEST pin is pulled to V+,
all segments are turned ON and the display reads 1888. During this mode, LCD segments have a
constant DC voltage impressed.
2.
Note:
Do not leave the display in this mode for
more than several minutes. LCDs may be
destroyed if operated with DC levels for
extended periods.
The display font and segment drive assignment are
shown in Figure 5-1.
Each phase of the measurement cycle has the following
length:
1.
For signals less than full scale, the auto-zero
phase is assigned the unused reference
integrate time period.
1000's
FIGURE 5-1:
Assignment
100's
10's
1's
Signal Integrate: 1000 counts
(4000 clock pulses).
This time period is fixed. The integration period
is:
EQUATION 5-1:
TSI = 4000
1
FOSC
Where: FOSC is the externally set clock frequency.
3.
Display Font
Auto-Zero Phase: 1000 to 3000 counts
(4000 to 12,000 clock pulses).
Reference Integrate: 0 to 2000 counts
(0 to 8000 clock pulses).
The TC7126A is a drop-in replacement for the TC7126
and ICL7126, which offer a greatly improved internal
reference temperature coefficient. No external
component value changes are required to upgrade
existing designs.
Display Font and Segment
 2002-2012 Microchip Technology Inc.
DS21458D-page 11
TC7126/A
6.0
6.1
COMPONENT VALUE
SELECTION
Auto-Zero Capacitor (CAZ)
The CAZ capacitor size has some influence on system
noise. A 0.47F capacitor is recommended for 200mV
full scale applications where 1LSB is 100V. A 0.033F
capacitor is adequate for 2.0V full scale applications. A
mylar type dielectric capacitor is adequate.
6.2
Reference Voltage Capacitor (CREF)
The reference voltage, used to ramp the integrator output voltage back to zero during the reference integrate
phase, is stored on CREF. A 0.1F capacitor is acceptable when VREF- is tied to analog common. If a large
Common mode voltage exists (VREF- – analog common) and the application requires a 200mV full scale,
increase CREF to 1F. Rollover error will be held to less
than 0.5 count. A Mylar type dielectric capacitor is
adequate.
6.3
6.4
Integrating Resistor (RINT)
The input buffer amplifier and integrator are designed
with Class A output stages. The output stage idling
current is 6A. The integrator and buffer can supply
1A drive current with negligible linearity errors. RINT is
chosen to remain in the output stage linear drive
region, but not so large that PC board leakage currents
induce errors. For a 200mV full scale, RINT is 180k. A
2V full scale requires 1.8M.
Component
Value
CAZ
Nominal Full Scale Voltage
200mV
2V
0.33F
0.033F
RINT
180k
1.8M
CINT
0.047F
0.047F
Note:
6.5
FOSC = 48kHz (3 readings per sec).
Oscillator Components
COSC should be 50pF; ROSC is selected from the
equation:
Integrating Capacitor (CINT)
CINT should be selected to maximize integrator output
voltage swing without causing output saturation. Due to
the TC7126A’s superior analog common temperature
coefficient specification, analog common will normally
supply the differential voltage reference. For this case,
a ±2V full scale integrator output swing is satisfactory.
For 3 readings per second (FOSC = 48kHz), a 0.047F
value is suggested. For 1 reading per second, 0.15F
is recommended. If a different oscillator frequency is
used, CINT must be changed in inverse proportion to
maintain the nominal ±2V integrator swing.
An exact expression for CINT is:
EQUATION 6-1:
CINT =
Where:
FOSC =
VFS =
RINT =
VINT =
 1   VFS 
(4000) F
OSC   RINT
EQUATION 6-2:
FOSC =
0.45
RC
For a 48kHz clock (3 conversions per second),
R = 180k.
Note that FOSC is 44 to generate the TC7126A’s
internal clock. The backplane drive signal is derived by
dividing FOSC by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal integrate period should be a multiple of
60Hz. Oscillator frequencies of 24kHz, 12kHz, 80kHz,
60kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 20kHz, 100kHz,
66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note
that 40kHz (2.5 readings per second) will reject both
50Hz and 60Hz.
VINT
Clock frequency at Pin 38
Full scale input voltage
Integrating resistor
Desired full scale integrator output swing
At 3 readings per second, a 750resistor should be
placed in series with CINT. This increases accuracy by
compensating for comparator delay. CINT must have
low dielectric absorption to minimize rollover error. A
polypropylene capacitor is recommended.
DS21458D-page 12
 2002-2012 Microchip Technology Inc.
TC7126/A
6.6
Reference Voltage Selection
A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Required Full Scale Voltage*
VREF
20mV
100mV
2V
1V
Note:
VFS = 2VREF.
In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required digital reading. Assume, for example, a
pressure transducer output for 2000lb/in2 is 400mV.
Rather than dividing the input voltage by two, the
reference voltage should be set to 200mV. This permits
the transducer input to be used directly.
The differential reference can also be used where a
digital zero reading is required when VIN is not equal to
zero. This is common in temperature measuring instrumentation. A compensating offset voltage can be
applied between analog common and VIN-. The transducer output is connected between VIN+ and analog
common.
 2002-2012 Microchip Technology Inc.
DS21458D-page 13
TC7126/A
7.0
DEVICE PIN FUNCTIONAL
DESCRIPTION
(Pin Numbers Refer to the 40-Pin PDIP.)
+
7.1
VIN
+
Input
Buffer
CI
RI
–
Differential Signal Inputs
VIN+ (Pin 31), VIN- (Pin 30)
–
Integrator
–
The TC7126A is designed with true differential inputs
and accepts input signals within the input stage
Common mode voltage range (VCM). Typical range is
V+ – 1V to V- + 1V. Common mode voltages are
removed from the system when the TC7126A operates
from a battery or floating power source (isolated from
measured system), and VIN- is connected to analog
common (VCOM) (see Figure 7-2).
In systems where Common mode voltages exist, the
TC7126A’s 86 dB Common mode rejection ratio
minimizes error. Common mode voltages do, however,
affect the integrator output level. A worst-case condition exists if a large positive VCM exists in conjunction
with a full scale negative differential signal. The
negative signal drives the integrator output positive
along with VCM (see Figure 7-1). For such applications,
the integrator output swing can be reduced below the
recommended 2V full scale swing. The integrator
output will swing within 0.3V of V+ or V- without
increased linearity error.
tI
VI =
VCM – VIN
RI CI
Where:
4000
tI = Integration time =
FOSC
CI = Integration capacitor
RI = Integration resistor
[
VCM
V+
V-
VBUFF
7.2
Differential Reference
VREF+ (Pin 36), VREF- (Pin 35)
The reference voltage can be generated anywhere
within the V+ to V- power supply range.
To prevent rollover type errors being induced by large
Common mode voltages, CREF should be large
compared to stray node capacitance.
The TC7126A offers a significantly improved analog
common temperature coefficient. This potential
provides a very stable voltage, suitable for use as a reference. The temperature coefficient of analog common
is typically 35ppm/°C for the TC7126A and 80 ppm/°C
for the TC7126.
GND
CAZ
VINT
POL BP
OSC1
TC7126A
OSC3
VIN+
VIN-
[
FIGURE 7-1:
Common Mode Voltage
Reduces Available Integrator Swing (VCOM VIN)
Segment
Drive
Measured
System
VI
+
LCD
OSC2
V-
ANALOG
COMMON VREF- VREF+ V+
V+ V-
GND
Power
Source
FIGURE 7-2:
DS21458D-page 14
+
9V
Common Mode Voltage Removed in Battery Operation with VIN = Analog Common
 2002-2012 Microchip Technology Inc.
TC7126/A
Analog Common (Pin 32)
The analog common pin is set at a voltage potential
approximately 3V below V+. The potential is between
2.7V and 3.35V below V+. Analog common is tied internally to an N-channel FET capable of sinking 100A.
This FET will hold the common line at 3V should an
external load attempt to pull the common line toward
V+. Analog common source current is limited to 1A.
Therefore, analog common is easily pulled to a more
negative voltage (i.e., below V+ – 3V).
The TC7126A connects the internal VIN+ and VINinputs to analog common during the auto-zero phase.
During the reference integrate phase, VIN- is connected to analog common. If VIN- is not externally connected to analog common, a Common mode voltage
exists, but is rejected by the converter’s 86dB Common
mode rejection ratio. In battery operation, analog common and VIN- are usually connected, removing Common mode voltage concerns. In systems where VIN- is
connected to power supply ground or to a given
voltage, analog common should be connected to VIN-.
The analog common pin serves to set the analog section reference, or common point. The TC7126A is specifically designed to operate from a battery, or in any
measurement system where input signals are not referenced (float) with respect to the TC7126A’s power
source. The analog common potential of V+ – 3V gives
a 7V end of battery life voltage. The common potential
has a 0.001%/% voltage coefficient and a 15 output
impedance.
With sufficiently high total supply voltage (V+ – V- > 7V),
analog common is a very stable potential with excellent
temperature stability (typically 35ppm/°C). This potential can be used to generate the TC7126A’s reference
voltage. An external voltage reference will be unnecessary in most cases because of the 35ppm/°C temperature coefficient. See Section 7.5 “TC7126A Internal
Voltage Reference”, TC7126A Internal Voltage
Reference discussion.
7.4
TEST (Pin 37)
The TEST pin potential is 5V less than V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the internally generated negative logic supply through a 500
resistor. The TEST pin load should be no more than
1mA. See Section 5.0 “DIGITAL SECTION”, Digital
Section for additional information on using TEST as a
negative digital logic supply.
If TEST is pulled HIGH (to V+), all segments plus the
minus sign will be activated. DO NOT OPERATE IN
THIS MODE FOR MORE THAN SEVERAL MINUTES.
With TEST = V+, the LCD segments are impressed
with a DC voltage which will destroy the LCD.
 2002-2012 Microchip Technology Inc.
7.5
TC7126A Internal Voltage
Reference
The TC7126A’s analog common voltage temperature
stability has been significantly improved (Figure 7-3).
The “A” version of the industry standard TC7126 device
allows users to upgrade old systems and design new
systems, without external voltage references. External
R and C values do not need to be changed. Figure 7-4
shows analog common supplying the necessary
voltage reference for the TC7126A.
200
180
Analog Commom
Temperature Coefficient (ppm/°C)
7.3
160
No
Maximum
Specified
140
Typical
120
No
Maximum
Specified
100
Maximum
80
Typical
60
Typical
40
20
TC7126A
ICL7126
ICL7136
0
FIGURE 7-3:
Coefficient
Analog Common Temp.
9V
+
26
1
V-
240kΩ
V+
TC7126A
VREF+
36
10kΩ
VREF
VREF-
35
ANALOG 32
COMMON
SET VREF = 1/2 VREF
FIGURE 7-4:
TC7126A Internal Voltage
Reference Connection
DS21458D-page 15
TC7126/A
8.0
8.1
TYPICAL APPLICATIONS
Simple Inverter for Fixed Decimal Point
or Display Annunciator
Liquid Crystal Display Sources
V+
V+
Several manufacturers supply standard LCDs to interface with the TC7126A, 3-1/2 digit analog-to-digital
converter.
Manufacturer
Crystaloid
Electronics
AND
Address/Phone
5282 Hudson Dr.
Hudson, OH 44236
216-655-2429
1800 Vernon St., Ste. 2
Roseville, CA 95678
916-783-7878
LD-B709BZ
LD-H7992AZ
Hamlin, Inc.
612 E. Lake St.
Lake Mills,
WI 53551
414-648-2361
3902, 3933,
3903
8.2
To
Backplane
Multiple Decimal Point or
Annunciator Driver
V+
V+
VGI, Inc.
GND
TEST 37
C5335, H5535,
T5135, SX440
FE 0801
FE 0203
To LCD
Decimal
Point
BP 21
Representative
Part Numbers*
720 Palomar Ave.
Sunnyvale, CA 94086
408-523-8200
Note:
4049
TC7126A
BP
TC7126A
To LCD
Decimal
Point
4030
GND
TEST
Contact LCD manufacturer for full product listing/specifications.
Decimal Point and Annunciator
Drive
The TEST pin is connected to the internally generated
digital logic supply ground through a 500resistor. The
TEST pin may be used as the negative supply for external CMOS gate segment drivers. LCD annunciators for
decimal points, low battery indication, or function indication may be added, without adding an additional supply. No more than 1mA should be supplied by the TEST
pin; its potential is approximately 5V below V+ (see
Figure ).
To LCD
Decimal
Point
FIGURE 8-1:
Decimal Point and
Annunciator Drives
8.3
Flat Package
The TC7126 is available in an epoxy 64-pin formed
lead package. A test socket for the TC7126ACBQ
device is available:
Part Number:
Manufacturer:
Distribution:
8.4
IC 51-42
Yamaichi
Nepenthe Distribution
2471 East Bayshore, Ste. 520
Palo Alto, CA 94043
(650) 856-9332
Ratiometric Resistance
Measurements
The TC7126A’s true differential input and differential
reference make ratiometric reading possible. In a ratiometric operation, an unknown resistance is measured
with respect to a known standard resistance. No
accurately defined reference voltage is needed.
The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltage developed across the unknown is applied to the
input and the voltage across the known resistor is
applied to the reference input. If the unknown equals
the standard, the display will read 1000. The displayed
reading can be determined from the following
expression:
EQUATION 8-1:
Displayed (Reading) =
DS21458D-page 16
RUNKNOWN
x 1000
RSTANDARD
 2002-2012 Microchip Technology Inc.
TC7126/A
The display will over range for RUNKNOWN  2 x
RSTANDARD (see Figure 8-2).
VREF+ V+
VREF-
RSTANDARD
LCD
VIN+
TC7126A
RUNKNOWN
VINANALOG
COMMON
FIGURE 8-2:
Low Parts Count
Ratiometric Resistance Measurement
9V
200mV
C1
0.02μF
+
1μF
1MΩ
VIN
9MΩ
+
1N4148
1
14
2
13
10MΩ
3
2V
4
900kΩ
C2
20V
47kΩ
1Ω
10%
90kΩ
6.8μF
11
10
6
9
7
8
10kΩ
2.2
μF
1MΩ 10%
36
35
29
VREF+
28
VREF-
32 ANALOG
COMMON
31
V IN+
0.01
μF 30
26
10kΩ
COM
27
V-
TC7126A
240kΩ
+
C1 = 3pF to 10pF, Variable
C2 = 132pF, Variable
26
V+
12
AD636
5
20kΩ
10%
200V
1
40
38
VOUT+
39
VBP
Segment
Drive
LCD
FIGURE 8-3:
3-1/2 Digit True RMS AC DMM
 2002-2012 Microchip Technology Inc.
DS21458D-page 17
TC7126/A
9V
Constant 5V
2
V+
V+
6
VOUT
5
ADJ
51kΩ
51kΩ
R4
R5
VREF+
2 –
NC
TEMP
3
Temperature
Dependent Output
VREF-
8
1/2
LM358
+
4
REF02
3
TC7126A
50kΩ
R2
1
VIN+
VIN-
VOUT =
1.86V @
+25°C
50kΩ
R1
COMMON
V-
GND
4
FIGURE 8-4:
Integrated Circuit Temperature Sensor
+
+
9V
5.6kΩ
160kΩ
300kΩ
V+
V-
1N4148 R1
20kΩ
VIN1N4148
Sensor
R2
50kΩ
160kΩ
300kΩ
V+
R1
50kΩ
9V
VREF+
VREF-
TC7126A
VIN+
VIN+
TC7126A
V-
VIN-
0.7%/°C
PTC
R3
R2
20kΩ
VREF+
VREFCOMMON
COMMON
FIGURE 8-6:
Positive Temperature
Coefficient Resistor Temperature Sensor
FIGURE 8-5:
DS21458D-page 18
Temperature Sensor
 2002-2012 Microchip Technology Inc.
TC7126/A
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
Package marking data not available at this time.
 2002-2012 Microchip Technology Inc.
DS21458D-page 19
TC7126/A
9.2
Taping Form
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
44-Pin PQFP
7° Max.
.009 (0.23)
.005 (0.13)
Pin 1
.018 (0.45)
.012 (0.30)
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.031 (0.80) Typ.
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
DS21458D-page 20
.041 (1.03)
.026 (0.65)
.010 (0.25) Typ.
.083 (2.10)
.075 (1.90)
.096 (2.45) Max.
 2002-2012 Microchip Technology Inc.
TC7126/A
Component Taping Orientation for 44-Pin PQFP Devices
User Direction of Feed
Pin 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
44-Pin PQFP
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
24 mm
16 mm
500
13 in
Note: Drawing does not represent total number of pins.
 2002-2012 Microchip Technology Inc.
DS21458D-page 21
TC7126/A
9.3
Package Dimensions
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
40-Pin PDIP (Wide)
PIN 1
.555 (14.10)
.530 (13.46)
2.065 (52.45)
2.027 (51.49)
.610 (15.49)
.590 (14.99)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51)
.150 (3.81)
.115 (2.92)
.110 (2.79)
.090 (2.29)
.070 (1.78)
.045 (1.14)
.015 (0.38)
.008 (0.20)
3° MIN.
.700 (17.78)
.610 (15.50)
.022 (0.56)
.015 (0.38)
Dimensions: inches (mm)
Component Taping Orientation for 44-Pin PLCC Devices
User Direction of Feed
Pin 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
44-Pin PLCC
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
32 mm
24 mm
500
13 in
Note: Drawing does not represent total number of pins.
Dimensions: inches (mm)
DS21458D-page 22
 2002-2012 Microchip Technology Inc.
TC7126/A
9.4
Package Dimensions (Continued)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
44-Pin PQFP
7° Max.
.009 (0.23)
.005 (0.13)
Pin 1
.018 (0.45)
.012 (0.30)
.041 (1.03)
.026 (0.65)
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.031 (0.80) Typ.
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.010 (0.25) Typ.
.083 (2.10)
.075 (1.90)
.096 (2.45) Max.
Dimensions: inches (mm)
 2002-2012 Microchip Technology Inc.
DS21458D-page 23
TC7126/A
10.0
REVISION HISTORY
Revision D (December 2012)
Added a note to each package outline drawing.
DS21458D-page 24
 2002-2012 Microchip Technology Inc.
TC7126/A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART CODE
TC7126X X XXX
A or blank*
R (reversed pins) or blank (CPL pkg only)
* "A" parts have an improved reference TC
Package Code (see Device Selection Table)
 2002-2012 Microchip Technology Inc.
DS21458D-page 25
TC7126/A
NOTES:
DS21458D-page 26
 2002-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2002-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768372
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2002-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21458D-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
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Technical Support:
http://www.microchip.com/
support
Web Address:
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Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7828
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21458D-page 28
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
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