TC7106
TC7106A
TC7107
TC7107A
3-1/2 DIGIT A/D CONVERTERS
2
FEATURES
GENERAL DESCRIPTION
■ Internal Reference with Low Temperature Drift
TC7106/7 ....................................... 80ppm/°C Typical
TC7106A/7A .................................. 20ppm/°C Typical
■ Drives LCD (TC7106) or LED (TC7107) Display
Directly
■ Guaranteed Zero Reading With Zero Input
■ Low Noise for Stable Display
■ Auto-Zero Cycle Eliminates Need for Zero
Adjustment
■ True Polarity Indication for Precision Null
Applications
■ Convenient 9 V Battery Operation (TC7106A)
■ High Impedance CMOS Differential Inputs .... 1012Ω
■ Differential Reference Inputs Simplify Ratiometric
Measurements
■ Low Power Operation ..................................... 10mW
The TC7106A and TC7107A 3-1/2 digit direct-display
drive analog-to-digital converters allow existing 7106/7107
based systems to be upgraded. Each device has a precision reference with a 20ppm/°C max temperature coefficient. This represents a 4 to 7 times improvement over
similar 3-1/2 digit converters. Existing 7106 and 7107 based
systems may be upgraded without changing external passive component values. The TC7107A drives common
anode light emitting diode (LED) displays directly with 8mA
per segment. A low-cost, high-resolution indicating meter
requires only a display, four resistors, and four capacitors.
The TC7106A low power drain and 9V battery operation
make it suitable for portable applications.
The TC7106A/TC7107A reduces linearity error to less
than 1 count. Rollover error – the difference in readings for
equal magnitude but opposite polarity input signals – is
below ±1 count. High impedance differential inputs offer
1pA leakage current and a 1012Ω input impedance. The
differential reference input allows ratiometric measurements
for ohms or bridge transducer measurements. The
15µVP–P noise performance guarantees a “rock solid” reading. The auto-zero cycle guarantees a zero display reading with a zero-volts input.
ORDERING INFORMATION
PART CODE
TC710X X X XXX
6 = LCD
7 = LED
}
A or blank*
R (reversed pins) or blank (CPL pkg only)
1
3
4
5
* "A" parts have an improved reference TC
Package Code (see below):
0.1µF
34
Package
Code
Package
CKW
CLW
CPL
IPL
IJL
44-Pin PQFP
44-Pin PLCC
40-Pin PDIP
40-Pin PDIP
40-Pin CerDIP
Pin Layout
Temperature
Range
Formed Leads
—
Normal
Normal
Normal
0°C to +70°C
0°C to +70°C
0°C to +70°C
– 25°C to +85°C
– 25°C to +85°C
1MΩ
+
ANALOG
INPUT
–
31
LCD DISPLAY (TC7106/A) OR
COMMON ANODE LED
DISPLAY (TC7107/A)
33
C–
REF
IN
2–19
22–25
30
–
V IN
POL
32
ANALOG
COMMON
0.01µF
BP
V+
SEGMENT
DRIVE
20
21
MINUS SIGN
BACKPLANE
DRIVE
1
6
24kΩ
28 V
BUFF
47kΩ
TC7106/A
TC7107/A
27
+
36
V+
REF
0.47µF
29
0.22µF
AVAILABLE PACKAGES
+
C REF
V+
CAZ
1kΩ
9V
35 100mV
V–
REF
VINT
V
OSC2 OSC3 OSC1
39
VREF
– 26
38 COSC 40
R OSC 100pF
TO ANALOG
COMMON (PIN 32)
7
3 CONVERSIONS/SEC
200mV FULL SCALE
100kΩ
40-Pin Plastic DIP
40-Pin CERDIP
Figure 1. TC7106/A/7/A Typical Operating Circuit
44-Pin Plastic Quad Flat
Package Formed Leads
8
44-Pin Plastic Chip
Carrier PLCC
TC7106/6A/7/7A-7
TELCOM SEMICONDUCTOR, INC.
11/4/96
3-183
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
ABSOLUTE MAXIMUM RATINGS*
TC7106A
Supply Voltage (V+ to V–) ........................................... 15 V
Analog Input Voltage (either input) (Note 1) ......... V+ to V–
Reference Input Voltage (either input) ................. V+ to V–
Clock Input ........................................................ Test to V+
Package Power Dissipation (Note 2) (TA ≤ 70°C)
CerDIP ..............................................................2.29W
Plastic DIP ........................................................1.23W
PLCC ................................................................1.23W
PQFP ................................................................1.00W
Operating Temperature
“C” Devices ............................................ 0°C to +70°C
“I” Devices ........................................ – 25°C to +85°C
Storage Temperature ............................ – 65°C to +150°C
Lead Temperature (Soldering, 60 sec) ................... 300°C
TC7107A
Supply Voltage
V+ ................................................................................................ +6 V
V– ............................................................................................... – 9 V
Analog Input Voltage (either input) (Note 1) ......... V+ to V–
Reference Input Voltage (either input) ................. V+ to V–
Clock Input ....................................................... GND to V+
Power Dissipation (Note 2) (TA ≤ 70°C)
40-Pin CerDIP Package ...................................2.29W
40-Pin Plastic DIP ............................................. 1.23W
44-Pin PLCC .....................................................1.23W
44-Pin PQFP .................................................... 1.00W
Operating Temperature
“C” Devices ............................................ 0°C to +70°C
“I” Devices ........................................ – 25°C to +85°C
Storage Temperature ............................ – 65°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +300°C
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
ELECTRICAL CHARACTERISTICS (Note 3)
Parameters
Test Conditions
Zero Input Reading
VIN = 0.0 V
Full-Scale = 200.0mV
VIN = VREF
VREF = 100 mV
–
VIN
= +V+IN ≅ 200mV
Ratiometric Reading
Roll-Over Error (Difference in
Reading for Equal Positive and
Negative Reading Near Full-Scale)
Linearity (Max. Deviation From
Best Straight Line Fit)
Common-Mode
Rejection Ratio (Note 4)
Noise (Pk – Pk Value Not
Exceeded 95% of Time)
Leakage Current @ Input
Zero Reading Drift
Scale Factor
Temperature Coefficient
Supply Current (Does Not
Include LED Current For TC7107/A)
3-184
Full-Scale = 200mV
or Full-Scale = 2.000 V
VCM = ±1V, VIN = 0V,
Full Scale = 200.0 mV
VIN = 0 V
Full-Scale = 200.0mV
VIN = 0 V
VIN = 0 V
“C” Device = 0°C to +70°C
VIN = 0 V
“I” Device = – 25°C to +85°C
VIN = 199.0mV,
“C” Device = 0°C to +70°C
(Ext. Ref = 0ppm°C)
VIN = 199.0mV
“I” Device = – 25°C to +85°C
VIN = 0
TC7106/A & TC7107/A
Min
Typ
Max
Unit
– 000.0
±000.0
+000.0
999
999/1000
1000
–1
±0.2
+1
Digital
Reading
Digital
Reading
Counts
–1
±0.2
+1
Counts
—
50
—
µV/V
—
15
—
µV
—
1
10
pA
—
0.2
1
µV/°C
—
1.0
2
µV/°C
—
1
5
ppm/°C
—
—
20
ppm/°C
—
0.8
1.8
mA
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
1
ELECTRICAL CHARACTERISTICS (Cont.) (Note 3)
TC7106/A & TC7107/A
Min
Typ
Max
Unit
2.7
3.05
3.35
V
7106A/7A
7106/7
20
80
50
—
ppm/°C
ppm/°C
—
—
75
ppm/°C
4
5
6
V
V+ to V– = 9V
4
5
6
V
V+ = 5.0V
Segment Voltage = 3V
V+ = 5.0V
Segment Voltage = 3V
5
8.0
—
mA
10
16
—
mA
Parameters
Test Conditions
Analog Common Voltage
(With Respect to Pos. Supply)
Temp. Coeff. of
Analog Common
(With Respect
to Pos. Supply)
Temp. Coeff. of
Analog Common
(With Respect
to Pos. Supply)
TC7106A ONLY Pk – Pk
Segment Drive Voltage (Note 5)
TC7106A ONLY Pk – Pk
Backplane Drive Voltage (Note 5)
TC7107A ONLY
Segment Sinking Current (Except Pin 19)
TC7107A ONLY
Segment Sinking Current (Pin 19)
25kΩ Between Common
and Pos. Supply
25kΩ Between Common
and Pos. Supply
0°C ≤ TA ≤ +70°C
("C", Commercial Temp. Range Devices)
25kΩ Between Common
and Pos. Supply
– 25°C ≤ TA ≤ 85°C
(“I,” Industrial Temp. Range Devices)
V+ to V– = 9V
2
3
4
NOTES: 1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. Unless otherwise noted, specifications apply to both the TC7106/A and TC7107/A at TA = 25°C, fCLOCK = 48 kHz. Parts are tested in the
circuit of Figure 1.
4. Refer to “Differential Input” discussion.
5. Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times
conversion rate. Average DC component is less than 50mV.
5
6
7
8
TELCOM SEMICONDUCTOR, INC.
3-185
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
PIN CONFIGURATIONS
1's
V+
1
1
2
40 OSC 1
NORMAL PIN
CONFIGURATION 39 OSC 2
OSC 1
D1
OSC 2
2
40 V +
REVERSE PIN
CONFIGURATION 39 D1
C1
3
38 OSC 3
OSC 3
3
38 C1
B1
4
5
F1
6
G1
7
E1
8
D2
9
TEST 4
+
V REF 5
–
VREF
6
+
CREF
7
–
CREF
8
ANALOG 9
COMMON
+
V IN
10
V–
IN 11
37 B 1
A1
37 TEST
+
36 V REF
–
35 VREF
+
34 CREF
–
33 CREF
C2 10
10's
100's
1000's
B 2 11
TC7106ACPL
TC7107AIPL
32 ANALOG
COMMON
+
31 V IN
30 V –
IN
CAZ
A 2 12
29 CAZ
F2 13
E 2 14
28 VBUFF
27 V INT
D3 15
26 V –
B 3 16
25 G
2
24 C 3
F3 17
E 3 18
23 A 3
AB 4 19
22 G 3
28
F2
27 E 2
G 2 16
26 D3
25 B 3
C 3 17
24
A 3 18
23 E 3
G 3 19
22 AB 4
100's
F3
1000's
21 POL
(MINUS SIGN)
OSC3
TEST
REF HI
REF HI
REF LO
CREF
CREF
COM
IN HI
IN LO
A/Z
BUFF
INT
V–
BP/GND 20
(7106A/7107A)
OSC2
D1
3
100's
10's
29 A 2
OSC1
C1
4
30 B 2
12
NC
B1
5
31 C2
TC7106AIJL
TC7107AIJL
V+
A1
6
33 E 1
32 D2
V INT 14
V – 15
100's
1's
F1
34 G1
VBUFF 13
21 BP/GND
(7106A/7107A)
POL 20
(MINUS SIGN)
36 A 1
35
2
1
44
43
42
41
40
44
43
42
41
40
39
38
37
36
35
34
NC
1
33
CREF
NC
2
32
G2
CREF
TEST
3
31
C3
OSC3
4
30
A3
F1
7
39
G1
8
38
E1
9
37
D2
10
36
COMMON
REF LO
NC
C2
11
35
IN HI
NC
5
29
G3
NC
12
34
NC
OSC2
6
28
BP/GND
B2
13
33
IN LO
OSC1
7
27
POL
A2
14
32
A/Z
V+
8
26
AB4
TC7106ACLW
TC7107ACLW
(PLCC)
TC7106ACKW
TC7107ACKW
(FLAT PACKAGE)
3-186
24
25
26
27
28
12
13
14
15
16
17
18
19
20
21
22
D3
23
F2
22
E2
21
A2
20
B2
19
C2
18
E1
B3
D2
23
F1
11
G1
B1
A1
V–
G2
29
A3
17
C3
F3
D3
G3
E3
24
NC
25
10
BP/GND
9
C1
AB4
D1
INT
POL
BUFF
30
E3
31
16
F3
15
B3
F2
E2
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
1
PIN DESCRIPTION
Pin No.
40-Pin PDIP
(Normal)
Pin No.
40-Pin PDIP
(Reverse)
2
Symbol
V+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
(40)
(39)
(38)
(37)
(36)
(35)
(34)
(33)
(32)
(31)
(30)
(29)
(28)
(27)
(26)
(25)
(24)
(23)
(22)
(21)
(20)
22
23
24
25
26
27
(19)
(18)
(17)
(16)
(15)
(14)
G3
A3
C3
G2
V–
VINT
28
(13)
VBUFF
29
(12)
CAZ
30
31
32
(11)
(10)
(9)
33
(8)
D1
C1
B1
A1
F1
G1
E1
D2
C2
B2
A2
F2
E2
D3
B3
F3
E3
AB4
POL
BP
GND
V –IN
V +IN
ANALOG
COMMON
C –REF
TELCOM SEMICONDUCTOR, INC.
Description
Positive supply voltage.
Activates the D section of the units display.
Activates the C section of the units display.
Activates the B section of the units display.
Activates the A section of the units display.
Activates the F section of the units display.
Activates the G section of the units display.
Activates the E section of the units display.
Activates the D section of the tens display.
Activates the C section of the tens display.
Activates the B section of the tens display.
Activates the A section of the tens display.
Activates the F section of the tens display.
Activates the E section of the tens display.
Activates the D section of the hundreds display.
Activates the B section of the hundreds display.
Activates the F section of the hundreds display.
Activates the E section of the hundreds display.
Activates both halves of the 1 in the thousands display.
Activates the negative polarity display.
LCD Backplane drive output (TC7106A).
Digital ground (TC7107A).
Activates the G section of the hundreds display.
Activates the A section of the hundreds display.
Activates the C section of the hundreds display.
Activates the G section of the tens display.
Negative power supply voltage.
Integrator output. Connection point for integration capacitor. See
INTEGRATING CAPACITOR section for more details
Integration resistor connection. Use a 47kΩ resistor for a 200mV fullscale range and a 470kΩ resistor for 2V full-scale range.
The size of the auto-zero capacitor influences system noise. Use a
0.47µF capacitor for 200mV full scale, and a 0.047µF capacitor for
2V full scale. See Paragraph on AUTO-ZERO CAPACITOR for more
details.
The analog LOW input is connected to this pin.
The analog HIGH input signal is connected to this pin.
This pin is primarily used to set the analog common-mode voltage
for battery operation or in systems where the input signal is
referenced to the power supply. It also acts as a reference voltage
source. See paragraph on ANALOG COMMON for more details.
See pin 34.
3-187
3
4
5
6
7
8
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
PIN DESCRIPTION (Cont.)
Symbol
34
(7)
+
C REF
35
36
(6)
(5)
–
VREF
+
V REF
37
(4)
Test
38
39
40
(3)
(2)
(1)
OSC3
OSC2
OSC1
Description
A 0.1µF capacitor is used in most applications. If a large commonmode voltage exists (for example, the V –IN pin is not at analog
common), and a 200mV scale is used, a 1µF capacitor is recommended and will hold the roll-over error to 0.5 count.
See pin 36.
The analog input required to generate a full-scale output (1999
counts). Place 100mV between pins 35 and 36 for 199.9mV
full-scale. Place 1V between pins 35 and 36 for 2V full scale. See
paragraph on REFERENCE VOLTAGE.
Lamp test. When pulled HIGH (to V+) all segments will be turned on
and the display should read –1888. It may also be used as a negative
supply for externally-generated decimal points. See paragraph under
TEST for additional information.
See pin 40.
See pin 40.
Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock
(3 readings per section), connect pin 40 to the junction of a 100kΩ
resistor and a 100pF capacitor. The 100kΩ resistor is tied to pin 39
and the 100pF capacitor is tied to pin 38.
GENERAL THEORY OF OPERATION
DUAL SLOPE CONVERSION PRINCIPLES
(All Pin Designations Refer to the 40-Pin DIP)
The TC7106A and TC7107A are dual slope, integrating
analog-to-digital converters. An understanding of the dual
slope conversion technique will aid in following the detailed
operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
• Input Signal Integration
• Reference Voltage Integration (Deintegration)
The input signal being converted is integrated for a fixed
time period (TSI). Time is measured by counting clock
pulses. An opposite polarity constant reference voltage is
then integrated until the integrator output voltage returns to
zero. The reference integration time is directly proportional
to the input signal (TRI). (Figure 2A).
In a simple dual slope converter a complete conversion
requires the integrator output to “ramp-up” and “rampdown.”
A simple mathematical equation relates the input signal,
reference voltage and integration time:
TSI
VRTRI
1
V
(t)dt
=
IN
RC
RC
0
∫
3-188
where:
VR = Reference Voltage
TSI = Signal Integration Time (Fixed)
TRI = Reference Voltage Integration Time (Variable)
For a constant VIN:
T
VIN = VR RI
TSI
C
ANALOG
INPUT
SIGNAL
INTEGRATOR
–
+
COMPARATOR
–
+
+/–
SWITCH
DRIVER
REF
VOLTAGE
PHASE
CONTROL
CONTROL
LOGIC
POLARITY CONTROL
DISPLAY
INTEGRATOR
OUTPUT
Pin No.
Pin No.
40-Pin PDIP 40-Pin PDIP
(Normal)
(Reverse)
VIN
VIN
FIXED
SIGNAL
INTEGRATE
TIME
CLOCK
COUNTER
≈ VFULL SCALE
≈ 1/2 VFULL SCALE
VARIABLE
REFERENCE
INTEGRATE
TIME
Figure 2A. Basic Dual Slope Converter
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values as long as they are
stable during a measurement cycle. An inherent benefit is
noise immunity. Noise spikes are integrated or averaged to
zero during the integration periods. Integrating ADCs are
immune to the large conversion errors that plague successive approximation converters in high-noise environments.
Interfering signals with frequency components at multiples
of the averaging period will be attenuated. Integrating ADCs
commonly operate with the signal integration period set to a
multiple of the 50/60 Hz power line period. (Figure 2B)
Signal Integrate Cycle
When the auto-zero loop is opened, the internal differ+
–
ential inputs connect to V IN
and VIN
. The differential input
signal is integrated for a fixed time period. The signal
integration period is 1000 counts. The externally set clock
frequency is divided by four before clocking the internal
counters. The integration time period is:
TSI =
4
fOSC
2
x 1000
3
where:
fOSC = External Clock Frequency
30
NORMAL MODE REJECTION (dB)
1
20
10
T = MEASUREMENT PERIOD
0
0.1/T
1/T
INPUT FREQUENCY
10/T
Figure 2B. Normal-Mode Rejection of Dual Slope Converter
ANALOG SECTION
In addition to the basic signal integrate and deintegrate
cycles discussed, the circuit incorporates an auto-zero
cycle. This cycle removes buffer amplifier, integrator, and
comparator offset voltage error terms from the conversion.
A true digital zero reading results without adjusting external
potentiometers. A complete conversion consists of three
cycles: an auto-zero, signal-integrate and reference-integrate cycle.
Auto-Zero Cycle
During the auto-zero cycle the differential input signal is
disconnected from the circuit by opening internal analog
gates. The internal nodes are shorted to analog common
(ground) to establish a zero-input condition. Additional analog gates close a feedback loop around the integrator and
comparator. This loop permits comparator offset voltage
error compensation. The voltage level established on CAZ
compensates for device offset voltages. The offset error
referred to the input is less than 10µV.
The auto-zero cycle length is 1000 to 3000 counts.
TELCOM SEMICONDUCTOR, INC.
The differential input voltage must be within the device
common-mode range (1V of either supply) when the converter and measured system share the same power supply
common (ground). If the converter and measured system do
–
should be
not share the same power supply common, VIN
tied to analog common.
Polarity is determined at the end of the signal integrate
phase. The sign bit is a true polarity indication in that signals
less than 1 LSB are correctly determined. This allows
precision null detection, limited only by device noise and
auto-zero residual offsets.
Reference Integrate Cycle
The final phase is reference integrate or de-integrate.
–
+
VIN
is internally connected to analog common and V IN
is
connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be
connected with the correct polarity to cause the integrator
output to return to zero. The time required for the output to
return to zero is proportional to the input signal and is
between 0 and 2000 counts. The digital reading displayed is:
1000 x
VIN
VREF
4
5
6
DIGITAL SECTION (TC7106A)
The TC7106A (Figure 3) contains all the segment drivers necessary to directly drive a 3 -1/2 digit liquid crystal
display (LCD). An LCD backplane driver is included. The
backplane frequency is the external clock frequency divided
by 800. For three conversions/second the backplane frequency is 60Hz with a 5V nominal amplitude. When a
segment driver is in phase with the backplane signal the
segment is “OFF.” An out of phase segment drive signal
causes the segment to be “ON” or visible. This AC drive
configuration results in negligible DC voltage across each
LCD segment. This insures long LCD display life. The
polarity segment driver is “ON” for negative analog inputs. If
+
–
V IN
and VIN
are reversed, this indicator will reverse.
3-189
7
8
TC7106
TC7106A
TC7107
TC7107A
3-190
TYPICAL SEGMENT OUTPUT
+
V
0.5mA
SEGMENT
OUTPUT
LCD DISPLAY
2mA
TC7106A
INTERNAL DIGITAL GROUND
BACKPLANE
21
+
VREF
34
CREF
–
VREF
35
36
CAZ
RINT
–
V BUFF
C REF
33
V
28
CINT
+
LCD SEGMENT DRIVERS
VINT
1
29
27
INTEGRATOR
10
µA
–
–
+
+
A/Z
A/Z
+
7 SEGMENT
DECODE
TO
DIGITAL
SECTION
7 SEGMENT
DECODE
7 SEGMENT
DECODE
÷ 200
DATA LATCH
–
A/Z
+
V IN
31
INT
DE
(–)
COMPARATOR
DE
(+)
–
A/Z
ANALOG
COMMON
–
V IN
DE (+)
32
+
DE (–)
LOW
TEMPCO
VREF
TENS
UNITS
TO SWITCH DRIVERS
FROM COMPARATOR OUTPUT
CLOCK
V+– 3.0V
fOSC
AZ & DE (±)
30
HUNDREDS
THOUSANDS
1
÷4
CONTROL LOGIC
V+
6.2V
37
TELCOM SEMICONDUCTOR, INC.
INT
26
–
V
INTERNAL DIGITAL GOUND
TEST
VTH
= 1V
500Ω
26
40
OSC 1
39
OSC 2
ROSC
38
OSC 3
COSC
V–
3-1/2 DIGIT A/D CONVERTERS
Figure 3. TC7106A Block Diagram
+
C REF
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
When the TEST pin on the TC7106A is pulled to V+, all
segments are turned “ON.” The display reads –1888. During
this mode the LCD segments have a constant DC voltage
impressed. DO NOT LEAVE THE DISPLAY IN THIS MODE
FOR MORE THAN SEVERAL MINUTES! LCD displays
may be destroyed if operated with DC levels for extended
periods.
The display font and the segment drive assignment are
shown in Figure 4.
•
Signal Integrate: 1000 Counts
(4000 Clock Pulses)
This time period is fixed. The integration period is:
TSI = 4000
1
fOSC
Where fOSC is the externally set clock frequency.
•
Reference Integrate: 0 to 2000 Counts
(0 to 8000 Clock Pulses)
The TC7106A/7107A are drop-in replacements for the
7106/7107 parts. External component value changes are
not required to benefit from the low drift internal reference.
100's
10's
1's
2
[ ]
DISPLAY FONT
1000's
1
3
Clock Circuit
Three clocking methods may be used:
1. An external oscillator connected to pin 40.
2. A crystal between pins 39 and 40.
3. An R-C oscillator using all three pins.
4
Figure 4. Display Font and Segment Assignment
TO
COUNTER
÷4
In the TC7106A, an internal digital ground is generated
from a 6 volt zener diode and a large P channel source
follower. This supply is made stiff to absorb the large
capacitive currents when the backplane voltage is switched.
40
39
38
5
CRYSTAL
DIGITAL SECTION (TC7107A)
Figure 5 shows the TC7107A. It is designed to drive
common anode LEDs. It is identical to the TC7106A except
that the regulated supply and backplane drive have been
eliminated and the segment drive is typically 8mA. The
1000's output (pin 19) sinks current from two LED segments,
and has a 16mA drive capability.
In both devices, the polarity indication is “ON” for nega–
+
tive analog inputs. If VIN
and V IN
are reversed, this indication
can be reversed also, if desired.
The display font is the same as the TC7106A.
System Timing
The oscillator frequency is divided by 4 prior to clocking
the internal decade counters. The three-phase measurement cycle takes a total of 4000 counts or 16000 clock
pulses. The 4000 count cycle is independent of input signal
magnitude.
Each phase of the measurement cycle has the following
length:
•
Auto-Zero Phase: 1000 to 3000 Counts
(4000 to 12000 Clock Pulses)
For signals less than full-scale, the auto-zero phase is
assigned the unused reference integrate time period.
TELCOM SEMICONDUCTOR, INC.
EXT
OSC
RC NETWORK
TC7106A
TC7107A
TO TEST PIN ON TSC7106A
TO GND PIN ON TSC7107A
Figure 6. Clock Circuits
6
COMPONENT VALUE SELECTION
Auto-Zero Capacitor – CAZ
The CAZ capacitor size has some influence on system
noise. A 0.47µF capacitor is recommended for 200mV fullscale applications where 1 LSB is 100µV. A 0.047µF capacitor is adequate for 2.0V full-scale applications. A mylar
dielectric capacitor is adequate.
Reference Voltage Capacitor – CREF
7
The reference voltage used to ramp the integrator
output voltage back to zero during the reference-integrate
cycle is stored on CREF. A 0.1µF capacitor is acceptable
–
when VIN
is tied to analog common. If a large common-mode
–
voltage exists (VREF
≠ analog common) and the application
requires 200mV full-scale, increase CREF to 1.0 µF. Rollover
error will be held to less than 1/2 count. A mylar dielectric
capacitor is adequate.
8
3-191
TC7106
TC7106A
TC7107
TC7107A
3-192
TYPICAL SEGMENT OUTPUT
+
V
0.5mA
SEGMENT
OUTPUT
LED DISPLAY
8mA
TC7107A
+
VREF
34
CREF
–
VREF
35
36
CAZ
RINT
–
V BUFF
C REF
33
V
28
CINT
+
LCD SEGMENT DRIVERS
VINT
1
29
27
INTEGRATOR
10
µA
–
–
+
+
A/Z
A/Z
+
7 SEGMENT
DECODE
TO
DIGITAL
SECTION
7 SEGMENT
DECODE
7 SEGMENT
DECODE
DATA LATCH
–
A/Z
+
V IN
31
INT
DE
(–)
COMPARATOR
DE
(+)
–
A/Z
ANALOG
COMMON
TELCOM SEMICONDUCTOR, INC.
–
V IN
DE (+)
32
+
DE (–)
LOW
TEMPCO
VREF
INT
UNITS
TO SWITCH DRIVERS
FROM COMPARATOR OUTPUT
CLOCK
V+– 3.0V
fOSC
AZ & DE (±)
30
TENS
HUNDREDS
THOUSANDS
1
÷4
V+
LOGIC CONTROL
21
26
–
V
DIGITAL GOUND
40
OSC 1
39
OSC 2
ROSC
38
OSC 3
COSC
DIGITAL
GROUND
500Ω
37
TEST
3-1/2 DIGIT A/D CONVERTERS
Figure 5. TC7107A Block Diagram
+
C REF
INTERNAL DIGITAL GROUND
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
Integrating Capacitor – CINT
Oscillator Components
CINT should be selected to maximize the integrator
output voltage swing without causing output saturation. Due
to the TC7106A/7107A superior temperature coefficient
specification, analog common will normally supply the differential voltage reference. For this case a ±2V full-scale
integrator output swing is satisfactory. For 3 readings/
second (fOSC = 48kHz) a 0.22µF value is suggested. If a
different oscillator frequency is used, CINT must be changed
in inverse proportion to maintain the nominal ±2 V integrator
swing.
An exact expression for CINT is:
ROSC (Pin 40 to Pin 39) should be 100kΩ. COSC is
selected using the equation:
(4000) (
CINT =
1
fOSC
)(
VFS
)
RINT
VINT
fOSC =
CINT must have low dielectric absorption to minimize
rollover error. A polypropylene capacitor is recommended.
Integrating Resistor – RINT
For fOSC of 48kHz, COSC is 100pF nominally.
Note that fOSC is divided by four to generate the TC7106A
internal control clock. The backplane drive signal is derived
by dividing fOSC by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal-integrate period should be a multiple of 60Hz.
Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz,
48kHz, 40kHz, etc. should be selected. For 50 Hz rejection,
oscillator frequencies of 200kHz, 100kHz, 66 2/3kHz, 50kHz,
40kHz, etc. would be suitable. Note that 40kHz (2.5 readings/second) will reject both 50Hz and 60Hz.
Value
CAZ
RINT
CINT
Note:1.
Nominal Full-Scale Voltage
200.0mV
0.47µF
47kΩ
0.22µF
fOSC = 48kHz (3 readings/sec)
Reference Voltage Selection
3
4
A full-scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Required Full-Scale Voltage*
200.0mV
2.000V
VREF
5
100.0mV
1.000V
* VFS = 2 VREF
The input buffer amplifier and integrator are designed
with class A output stages. The output stage idling current
is 100µA. The integrator and buffer can supply 20µA drive
currents with negligible linearity errors. RINT is chosen to
remain in the output stage linear drive region but not so large
that printed circuit board leakage currents induce errors. For
a 200mV full-scale, RINT is 47kΩ. 2.0V full-scale requires
470kΩ.
Component
2
0.45
RC
Where:
fOSC = Clock frequency at Pin 38
VFS = Full-scale input voltage
RINT = Integrating resistor
VINT = Desired full-scale integrator output swing
1
2.000V
0.047µF
470kΩ
0.22µF
In some applications a scale factor other than unity may
exist between a transducer output voltage and the required
digital reading. Assume, for example, a pressure transducer
output is 400mV for 2000 lb/in2. Rather than dividing the
input voltage by two the reference voltage should be set to
200mV. This permits the transducer input to be used
directly.
The differential reference can also be used when a
digital zero reading is required when VIN is not equal to zero.
This is common in temperature measuring instrumentation.
A compensating offset voltage can be applied between
–
analog common and VIN
. The transducer output is con+
nected between V IN and analog common.
The internal voltage reference potential available at
analog common will normally be used to supply the converter's reference. This potential is stable whenever the supply
potential is greater than approximately 7V. In applications
where an externally-generated reference voltage is desired,
refer to Figure 7.
6
7
8
TELCOM SEMICONDUCTOR, INC.
3-193
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
V+
V+
+
VREF
V+
–
VREF
TC7106A
TC7107A
+
V+
6.8V
ZENER
+
VREF
–
VREF
–
VIN
VI
+
INTEGRATOR
TC7106A 20k Ω
TC7107A
–
TC04
TI
VI =
V CM – VIN
RI CI
Where:
4000
T I = INTEGRATION TIME =
[
VCM
1.2V
REF
[
f OSC
C I = INTEGRATION CAPACITOR
R I = INTEGRATION RESISTOR
COMMON
(a)
RI
+
–
6.8kΩ
IZ
CI
INPUT
BUFFER
(b)
Figure 7. External Reference
Figure 9.
DEVICE PIN FUNCTIONAL DESCRIPTION
Differential Signal Inputs
(V+IN (Pin 31), V–IN (Pin 30))
The TC7106A/7017A is designed with true differential
inputs and accepts input signals within the input stage
common mode voltage range (VCM). The typical range is V+
–1.0 to V– +1 V. Common-mode voltages are removed from
the system when the TC7106A/TC7107A operates from a
battery or floating power source (isolated from measured
–
system) and VIN
is connected to analog common (VCOM):
See Figure 8.
In systems where common-mode voltages exist, the
86dB common-mode rejection ratio minimizes error. Common-mode voltages do, however, affect the integrator output level. Integrator output saturation must be prevented. A
worst-case condition exists if a large positive VCM exists in
conjunction with a full-scale negative differential signal. The
negative signal drives the integrator output positive along
with VCM (Figure 9). For such applications the integrator
output swing can be reduced below the recommended 2.0V
Common-Mode Voltage Reduces Available Integrator
Swing. (VCOM ≠ VIN)
full-scale swing. The integrator output will swing within 0.3V
of V+ or V– without increasing linearity errors.
Differential Reference
+
–
(V REF
(Pin 36), VREF
(Pin 35))
The reference voltage can be generated anywhere
within the V+ to V– power supply range.
To prevent rollover errors from being induced by large
common-mode voltages, CREF should be large compared to
stray node capacitance.
The TC7106A/TC7107A circuits have a significantly
lower analog common temperature coefficient. This gives a
very stable voltage suitable for use as a reference. The
temperature coefficient of analog common is 20ppm/°C
typically.
SEGMENT
DRIVE
MEASURED
SYSTEM
+
V
V–
VBUF
V+IN
CAZ
VINT
POL BP
OSC1
V –IN
GND
LCD DISPLAY
OSC3
TC7106A
ANALOG
–
+
+
COMMON VREF VREF V
OSC2
V–
V+ V –
GND
POWER
SOURCE
+
9V
–
Figure 8. Common-Mode Voltage Removed in Battery Operation with VIN
= Analog Common
3-194
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
Analog Common (Pin 32)
Internal Voltage Reference Stability
The analog common pin is set at a voltage potential
approximately 3.0V below V+. The potential is guaranteed
to be between 2.7V and 3.35 V below V+. Analog common
is tied internally to the N channel FET capable of sinking
20mA. This FET will hold the common line at 3.0V should an
external load attempt to pull the common line toward V+.
Analog common source current is limited to 10µA. Analog
common is therefore easily pulled to a more negative
voltage (i.e., below V+ – 3.0V).
+
–
The TC7106A connects the internal V IN
and VIN
inputs
to analog common during the auto-zero cycle. During the
–
is connected to analog comreference-integrate phase, VIN
–
mon. If VIN is not externally connected to analog common,
a common-mode voltage exists. This is rejected by the
converter's 86dB common-mode rejection ratio. In battery
–
operation, analog common and VIN
are usually connected,
removing common-mode voltage concerns. In systems where
–
VIN
is connected to the power supply ground or to a given
–
voltage, analog common should be connected to VIN
.
The analog common pin serves to set the analog section
reference or common point. The TC7106A is specifically
designed to operate from a battery or in any measurement
system where input signals are not referenced (float) with
respect to the TC7106A power source. The analog common
potential of V+ – 3.0V gives a 6 V end of battery life voltage.
The common potential has a 0.001%/% voltage coefficient
and a 15 Ω output impedance.
With sufficiently high total supply voltage (V+ – V–
> 7.0V) analog common is a very stable potential with
excellent temperature stability—typically 20ppm/°C. This
potential can be used to generate the reference voltage. An
external voltage reference will be unnecessary in most
cases because of the 50ppm/°C maximum temperature
coefficient. See Internal Voltage Reference discussion.
The analog common voltage temperature stability has
been significantly improved (Figure 10). The “A” version of
the industry standard circuits allow users to upgrade old
systems and design new systems without external voltage
references. External R and C values do not need to be
changed. Figure 11 shows analog common supplying the
necessary voltage reference for the TC7106A/TC7107A.
Test (Pin 37)
The TEST pin potential is 5V less than V+. TEST may be
used as the negative power supply connection for external
CMOS logic. The TEST pin is tied to the internally generated
negative logic supply (Internal Logic Ground) through a
500Ω resistor in the TC7106A. The TEST pin load should be
no more than 1mA .
If TEST is pulled to V+ all segments plus the minus sign
will be activated. Do not operate in this mode for more than
several minutes with the TC7106A. With TEST = V+ the LCD
segments are impressed with a DC voltage which will
destroy the LCD.
The TEST pin will sink about 10mA when pulled to V+.
TELCOM SEMICONDUCTOR, INC.
TEMPERATURE COEFFICIENT (ppm/°C)
160
NO
MAXIMUM
SPECIFIED
NO MAXIMUM
SPECIFIED
140
TYPICAL
120
100
80
2
3
200
180
1
MAXIMUM
LIMIT
4
NO MAXIMUM
SPECIFIED
TYPICAL
60
40
TYPICAL
20
TC
7106A
0
ICL7106
5
ICL7136
Figure 10. Analog Common Temperature Coefficient
6
1
V–
V+
24kΩ
TC7106A
TC7107A
+
VREF
36
1kΩ
VREF
–
VREF
35
7
ANALOG 32
COMMON
SET VREF = 1/2 VFULL SCALE
Figure 11. Internal Voltage Reference Connection
8
3-195
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
POWER SUPPLIES
TC7107 Power Dissipation Reduction
The TC7107A is designed to work from ±5V supplies.
However, if a negative supply is not available, it can be
generated from the clock output with two diodes, two capacitors, and an inexpensive IC. (Figure 12)
In selected applications a negative supply is not required. The conditions to use a single +5V supply are:
• The input signal can be referenced to the center of the
common-mode range of the converter.
• The signal is less than ±1.5V.
• An external reference is used.
The TSC7660 DC to DC converter may be used to
generate – 5 V from +5 V (Figure 13).
The TC7107A sinks the LED display current and this
causes heat to build up in the IC package. If the internal
voltage reference is used, the changing chip temperature
can cause the display to change reading. By reducing the
LED common anode voltage the TC7107A package power
dissipation is reduced.
Figure 14 is a photograph of a curve-tracer display
showing the relationship between output current and output
voltage for a typical TC7107CPL. Since a typical LED has
1.8 volts across it at 7mA, and its common anode is connected to +5V, the TC7107A output is at 3.2V (point A on
Figure 13). Maximum power dissipation is 8.1mA x 3.2V x
24 segments = 622mW.
Notice, however, that once the TC7107A output voltage
is above two volts, the LED current is essentially constant as
output voltage increases. Reducing the output voltage by
0.7V (point B in Figure 14) results in 7.7mA of LED current,
only a 5 percent reduction. Maximum power dissipation is
only 7.7mA x 2.5 V x 24 = 462mW, a reduction of 26%. An
output voltage reduction of 1 volt (point C) reduces LED
current by 10% (7.3mA) but power dissipation by 38%!
(7.3mA x 2.2V x 24 = 385mW).
V
+
CD4009
V+
OSC1
OSC2
0.047
µF
OSC3
1N914
10
µF
+
–
1N914
TC7107A
GND
V–
V– = –3.3V
Figure 12. Generating Negative Supply From +5 V
+5 V
V
1
+
36
+
VREF
35
–
VREF
32
COM
LED
DRIVE
TC7107A
Figure 14. TC7107A Output Current vs Output Voltage
+ 31
VIN
VIN
– 30
VIN
V
8
+
10µF
–
GND
21
26
2
5
4
(–5 V)
TC7660
*3-1/2 DIGIT ADC
3
+
10µF
Figure 13. Negative Power Supply Generation with TC7660
3-196
Reduced power dissipation is very easy to obtain.
Figure 15 shows two ways: either a 5.1 ohm, 1/4 watt resistor
or a 1 Amp diode placed in series with the display (but not in
series with the TC7107A). The resistor will reduce the
TC7107A output voltage, when all 24 segments are “ON,” to
point “C” of Figure 14. When segments turn off, the output
voltage will increase. The diode, on the other hand, will result
in a relatively steady output voltage, around point “B.”
In addition to limiting maximum power dissipation, the
resistor reduces the change in power dissipation as the
display changes. This effect is caused by the fact that, as
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
fewer segments are “ON,” each “ON” output drops more
voltage and current. For the best case of six segments (a
“111” display) to worst case (a “1888” display) the resistor
will change about 230mW, while a circuit without the resistor
will change about 470mW. Therefore, the resistor will reduce the effect of display dissipation on reference voltage
drift by about 50%.
The change in LED brightness caused by the resistor is
almost unnoticeable as more segments turn off. If display
brightness remaining steady is very important to the designer, a diode may be used instead of the resistor.
APPLICATIONS INFORMATION
Several LCD manufacturers supply standard LCD displays to interface with the TC7106A 3-1/2 digit analog-todigital converter.
Manufacturer
Address/Phone
Part Numbers1
Crystaloid
Electronics
5282 Hudson Dr.
Hudson, OH 44236
216/655-2429
720 Palomar Ave.
Sunnyvale, CA 94086
408/523-8200
3415 Kashikawa St.
Torrance, CA 90505
213/534-0360
612 E. Lake St.
Lake Mills, WI 53551
414/648-2361
C5335, H5535,
T5135, SX440
AND
APPLICATIONS INFORMATION
24kΩ
+
–5V
IN
Epson
–
1 MΩ
150Ω
TP3
1kΩ
100
pF
TP5
100
kΩ
TP2
TP1
0.01
µF
0.1
µF
0.47
µF
0.22
µF
30
3902, 3933, 3903
4
Note: 1. Contact LCD manufacturer for full product listing/specifications.
Light Emitting Diode Display Sources
TP
4
21
TC7107A
1
Hamlin, Inc.
FE 0201,0701
FE 0203, 2201
FE 0501
LD-B709BZ
LD-H7992AZ
3
DISPLAY
47
kΩ
40
2
Liquid Crystal Display Sources
Figure 15. Diode or Resistor Limits Package Power Dissipation
+5V
1
10
DISPLAY
5.1Ω 1/4W
1N4001
Several LED manufacturers supply seven segment
digits with and without decimal point annunciators for the
TC7107A.
5
20
Manufacturer
Address
Display Type
Hewlett-Packard
Components
AND
640 Page Mill Rd.
Palo Alto, CA 94304
720 Palomar Ave.
Sunnyvale, CA 94086
LED
LED
6
7
8
TELCOM SEMICONDUCTOR, INC.
3-197
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
Decimal Point and Annunciator Drive
Ratiometric Resistance Measurements
The TEST pin is connected to the internally-generated
digital logic supply ground through a 500 Ω resistor. The
TEST pin may be used as the negative supply for external
CMOS gate segment drivers. LCD display annunciators for
decimal points, low battery indication, or function indication
may be added without adding an additional supply. No more
than 1mA should be supplied by the TEST pin: its potential
is approximately 5V below V+.
The true differential input and differential reference
make ratiometric reading possible. Typically in a ratiometric
operation, an unknown resistance is measured with respect
to a known standard resistance. No accurately defined
reference voltage is needed.
The unknown resistance is put in series with a known
standard and a current passed through the pair. The voltage
developed across the unknown is applied to the input and
the voltage across the known resistor is applied to the
reference input. If the unknown equals the standard, the
display will read 1000. The displayed reading can be determined from the following expression:
V+
V+
4049
Displayed Reading =
TC7106A
TO LCD
DECIMAL
POINT
BP 21
TEST
37
GND
RSTANDARD
V+
+
VREF
V–
V+
REF
LCD DISPLAY
+
V IN
RUNKNOWN
BP
x 1000
The display will overrange for R Unknown ≥ 2 x R
standard.
TO LCD
BACKPLANE
V+
R Unknown
R Standard
TC7106A
–
V IN
TC7106A
TO LCD
DECIMAL
POINTS
DECIMAL
POINT
SELECT
ANALOG
COMMON
Figure 17. Low Parts Count Ratiometric Resistance
Measurement
TEST
4030
GND
Figure 16. Decimal Point Drive Using TEST as Logic Ground
3-198
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
9V
+
1µF
2V
900kΩ
0.02
µF
1MΩ
1MΩ
20 V
90kΩ
200 V
1
14
2
13
3
12
AD636
4
47kΩ
1W
10%
1
+
10
1kΩ
6
9
1MΩ 10%
10kΩ
20kW
10%
COM
0.01
µF
2.2µF
36
V+
REF
35
V–
REF
32
ANALOG
COMMON
V+
IN
31
8
7
27
TC7106A
11
5
V+
24kΩ
–
6.8µF
26
V–
–
10kΩ
9MΩ
2
+
IN4148
200mV
VIN
1
C1 = 3–10pF VARIABLE,
C2 = 132pF VARIABLE
30
V–
IN
26
V–
29
28
3
40
38
39
BP
SEG
DRIVE
4
LCD DISPLAY
Figure 18. 3 1/2 Digit True RMS AC DMM
+
160kΩ
300kΩ
R1
50kΩ
1N4148
SENSOR
300kΩ
5.6kΩ
V+
–
VIN
+
VIN
1N914
R1
20kΩ
V+
–
VIN
+
VIN
TC7106A
+
VREF
0.7%/°C
PTC
R3
R2
20kΩ
V–
TC7106A
+
VREF
–
VREF
–
VREF
COMMON
COMMON
Figure 19. Temperature Sensor
5
160kΩ
V–
VFS = 2V
R2
50kΩ
9V
+
9V
6
Figure 20. Positive Temperature Coefficient Resistor
Temperature Sensor
7
8
TELCOM SEMICONDUCTOR, INC.
3-199
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
9V
2
1
CONSTANT 5 V
V+
V+REF
REF02
51kΩ
6
VOUT
5.1kΩ
R4
5
ADJ
R2
R5
2 –
NC
TC7106A
50kΩ
V–
REF
VFS = 2.00V
8
1
3
TEMP
TC911
3 +
4
TEMPERATURE
DEPENDENT
OUTPUT
1.3k
V+
V–
IN
VOUT =
1.86V @
25°C
V+
IN
50kΩ
COMMON
R1
V–
GND
4
26
Figure 21. Integrated Circuit Temperature Sensor
TO PIN 1
TO PIN 1
TC7106A
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
SET VREF = 100mV
100kΩ
100pF
0.1µF
1 kΩ
22kΩ
1MΩ
+
IN
0.01µF
+
0.47µF
47kΩ
0.22µF
–
9V
–
TO DISPLAY
TO BACKPLANE
Figure 22. TC7106A Using the Internal Reference: 200mV FullScale, 3 Readings-per-second (RPS).
3-200
40
39
38
37
36
35
34
33
32
31
TC7107A 30
29
28
27
26
25
24
23
22
21
SET VREF = 100mV
100kΩ
100pF
+5V
0.1µF
1kΩ
22kΩ
1MΩ
+
IN
0.01µF
0.47µF
–
47kΩ
0.22µF
–5V
TO DISPLAY
Figure 23. TC7107A Internal Reference (200mV Full-Scale,
–
3RPS, VIN
Tied to GND for Single Ended Inputs).
TELCOM SEMICONDUCTOR, INC.
3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
V+
1
40
TO
LOGIC
VCC
TC7106A
TC7106A
TC7107A
V–
O/R
U/R
20
21
CD4023
OR 74C10
CD4077
O/R = OVERRANGE
U/R = UNDERRANGE
Figure 24. Circuit for Developing Underrange and Overrange
Signals from TC7106A Outputs.
TC7107A
SET VREF = 1V
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
100kΩ
100pF
24kΩ
V+
25k Ω
0.1µF
1MΩ
IN
0.01µF
0.047µF
3
+
–
470k Ω
0.22µF
V–
TO DISPLAY
4
Figure 25. TC7106A/TC7107A: Recommended Component
Values for 2.00V Full-Scale
5
TO PIN 1
TO PIN 1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
2
TO PIN 1
TO
LOGIC
GND
100k Ω
SET VREF = 100mV
100pF
10k Ω
10kΩ
V
0.1µF
1kΩ
+
TC04
+
1.2V
0.01µF
0.47µF
1M Ω
IN
–
47kΩ
0.22µF
V
1
–
TO DISPLAY
Figure 26. TC7107A With a 1.2V External Band-Gap Reference.
–
(VIN
Tied to Common.)
TC7107A
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
100kΩ
SET VREF = 100mV
100pF
10k Ω
10kΩ
V
0.1µF
1 kΩ
TC04
+
1.2V
0.01µF
0.47µF
+
IN
1MΩ
6
–
47kΩ
0.22µF
TO DISPLAY
7
Figure 27. TC7107A Operated from Single +5V Supply. An
External Reference Must Be Used in This Application.
8
TELCOM SEMICONDUCTOR, INC.
3-201