TC7136/TC7136A Low Power 3-1/2 Digit Analog-to-Digital Converter Features General Description • Fast Over Range Recovery, Ensured First Reading Accuracy • Low Temperature Drift Internal Reference - TC7136: 70ppm/°C (Typ.) - TC7136A: 35ppm/°C (Typ.) • Zero Reading with Zero Input • Low Noise: 15µVP-P • High Resolution: 0.05% • Low Input Leakage Current: 1pA (Typ.)/10pA (Max.) • Precision Null Detectors with True Polarity at Zero • High-Impedance Differential Input • Convenient 9V Battery Operation with Low Power Dissipation: 500µW (Typ.)/900µW (Max.) The TC7136 and TC7136A are low power, 3-1/2 digit with liquid crystal display (LCD) drivers and analog-todigital converters. These devices incorporate an "integrator output zero" phase, which enables over range recovery. The performance of existing TC7126, TC7126A and ICL7126 based systems may be upgraded with minor changes to external, passive components. Applications The TC7136 and TC7136A limit linearity error to less than 1 count on 200mV or 2V full scale ranges. The rollover error (the difference in readings for equal magnitude, but opposite polarity input signals) is below ±1 count. High-impedance differential inputs offer 1pA leakage currents and a 1012Ω input impedance. The differential reference input allows ratiometric measurements for ohms or bridge transducer measurements. The 15µVP-P noise performance ensures a "rock solid" reading. The auto-zero cycle enables a zero display readout for a 0V input. • Thermometry • Bridge Readouts: Strain Gauges, Load Cells, Null Detectors • Digital Meters: Voltage/Current/Ohms/Power, pH • Digital Scales, Process Monitors • Portable Instrumentation Device Selection Table Part Number Package Temperature Range 0°C to +70°C TC7136 CPI 40-Pin PDIP TC7136 CKW 44-Pin PQFP 0°C to +70°C TC7136 CLW 44-Pin PLCC 0°C to +70°C TC7136A CPI 40-Pin PDIP 0°C to +70°C TC7136A CKW 44-Pin PQFP 0°C to +70°C TC7136A CLW 44-Pin PLCC 0°C to +70°C 2002 Microchip Technology Inc. The TC7136A has an improved internal zener reference voltage circuit which maintains the analog common temperature drift to 35ppm/°C (typical) and 75ppm/°C (maximum). This represents an improvement of two to four times over similar 3-1/2 digit converters. The costly, space consuming external reference source may be removed. DS21461B-page 1 TC7136/TC7136A Package Type OSC3 TEST REF HI REF HI REF LO CREF+ CREF- ANALOG COMMON IN HI IN LO AZ BUFF INT V- 3 OSC2 D1 4 OSC1 C1 5 V+ B1 6 44-Pin PQFP NC A1 44-Pin PLCC 2 1 44 43 42 41 40 44 43 42 41 40 39 38 37 36 35 34 F1 7 39 REF LO NC 1 33 NC G1 8 38 CREF+ NC 2 32 G2 E1 9 37 CREF- TEST 3 31 C3 ANALOG 36 COMMON OSC3 4 30 A3 D2 10 TC7136CLW TC7136ACLW C2 11 35 IN HI NC 5 29 G3 TC7136CKW TC7136ACKW 28 BP 34 NC OSC2 6 B2 13 33 IN LO OSC1 7 27 POL A2 14 32 AZ V+ 26 AB4 31 BUFF D1 9 25 E3 E2 16 30 INT C1 10 24 F3 D3 17 29 V- B1 11 23 B3 25 26 27 28 12 13 14 15 16 17 18 19 AB4 POL NC BP G3 A3 C3 G2 A1 G1 E1 C2 B2 A2 1's 10's V+ 1 2 C1 3 OSC1 1 OSC2 OSC2 2 38 OSC3 OSC3 3 38 C1 4 37 B1 Reverse Pin Configuration 40 V+ 39 D1 B1 4 37 TEST A1 5 36 VREF+ VREF+ 5 36 A1 F1 6 35 VREF- VREF- 6 35 G1 7 34 CREF+ CREF+ 7 E1 8 33 CREF- CREF- 8 D2 9 TC7136CPL TC7136ACPL ANALOG 9 COMMON VIN+ 10 34 G1 TC7136RCPL TC7136ARCPL 33 E1 C2 10 B2 11 30 VIN- VIN- 11 30 B2 12 29 CAZ CAZ 12 29 A2 VBUFF 13 28 VINT A2 28 VBUFF 32 D2 31 C2 14 27 E2 26 V- V- 15 26 D3 B3 16 25 G2 G2 16 25 B3 F3 17 24 C3 C3 17 24 E3 18 23 A3 A3 18 23 E3 AB4 19 22 G3 POL 20 (MINUS SIGN) 27 VINT 100's 100's G3 19 21 BP (Backplane) BP 20 (Backplane) 10's F2 D3 15 14 1's F1 32 ANALOG COMMON 31 VIN+ E2 1000's 40 OSC1 39 TEST F2 13 100's Normal Pin Configuration 21 22 40-Pin PDIP 40-Pin PDIP D1 20 D3 24 E2 23 D2 21 22 F1 20 F3 18 19 E3 8 B3 F2 15 F2 NC 12 F3 22 AB4 100's 1000's 21 POL (Minus Sign) NC = No Internal Connection DS21461B-page 2 2002 Microchip Technology Inc. TC7136/TC7136A Typical Application 0.1µF 1MΩ + Analog Input – 33 34 CREF+ 31 9-19 Segment 22-25 Drive VIN+ 0.01µF 30 V IN LCD CREF- TC7136 TC7136A POL 20 BP 32 ANALOG COMMON V+ 28 180kΩ 0.15µF 0.47 µF 29 21 Minus Sign Backplane 1 VBUFF 240kΩ + 9V VREF+ 36 10kΩ CAZ VREFV- 27 V INT OSC2 OSC3 OSC1 39 38 COSC 40 ROSC 50pF 35 26 1 Conversion/Sec To Analog Common (Pin 32) 560kΩ 2002 Microchip Technology Inc. DS21461B-page 3 DS21461B-page 4 VIN- ANALOG COMMON VIN+ 32 31 INT INT 10 µA CREF+ 34 DE (–) DE (+) – + + – ZI V+ – 2.8V 33 CREF- VBUFF 26 V- ZI & AZ 35 VREF- AZ & DE (±) DE (+) DE (–) ZI & AZ 36 VREF+ CREF 1 LOW TEMPCO VREF V RINT 28 TC7136/A VINT CINT ROSC 39 OSC2 Clock – + 27 Comparator 40 OSC1 AZ + – Integrator 29 CAZ V+ COSC ÷4 LCD Hundreds 7-Segment Decode VTH = 1V Control Logic Tens Data Latch 7-Segment Decode LCD Segment Drivers Internal Digital Ground FOSC To Switch 38 OSC3 To Digital Section Thousands Segment Output Internal Digital Ground 2mA 0.5mA Typical Segment Input Units 7-Segment Decode BP 500Ω 6.2V ÷ 200 21 26 37 1 V- TEST V+ TC7136/TC7136A Functional Block Diagram 2002 Microchip Technology Inc. TC7136/TC7136A 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings* Supply Voltage (V+ to V-)....................................... 15V Analog Input Voltage (Either Input) (Note 1)... V+ to VReference Input Voltage (Either Input)............ V+ to VClock Input .................................................TEST to V+ Package Power Dissipation (TA ≤ 70°C) (Note 2): Plastic DIP ................................................... 1.23W Plastic Quad Flat Package .......................... 1.00W PLCC ........................................................... 1.23W Operating Temperature Range: C Devices.......................................... 0°C to +70°C I Devices ........................................ -25°C to +85°C Storage Temperature Range .............. -65°C to +150°C *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. TC7136 AND TC7136A ELECTRICAL SPECIFICATIONS Electrical Characteristics: VS = 9V, fCLK = 16kHz, and TA = +25°C, unless otherwise noted. Symbol Parameter Min Typ Max -000.0 ±000.0 +000.0 Unit Test Conditions Input Zero Input Reading Zero Reading Drift Ratiometric Reading — 0.2 1 999 999/1000 1000 Digital VIN = 0V, Full Scale = 200mV Reading µV/°C VIN = 0V, 0°C ≤ TA ≤ +70°C Digital VIN = VREF, VREF = 100mV Reading NL Non-Linearity Error — 1 ±0.2 Count ER Rollover Error -1 -1 ±0.2 1 Count eN Noise — 15 — µVP-P IL Input Leakage Current — 1 10 pA CMRR Common Mode Rejection Ratio — 50 — µV/V TCSF Scale Factor Temperature Coefficient — 1 5 ppm/°C Full Scale = 20mV or 2V Max. Deviation from best Straight Line VIN - = VIN + ≈ 200mV VIN = 0V, Full Scale = 200mV VIN = 0V VCM = ±1V, VIN = 0V, Full Scale = 200mV VIN = 199mV, 0°C ≤ TA ≤ +70°C Ext. Ref. Temp. Coeff. = 0ppm/°C Note 1: 2: 3: 4: Input voltages may exceed supply voltages when input current is limited to 100µA. Dissipation rating assumes device is mounted with all leads soldered to PC board. Refer to "Differential Input" discussion. Backplane drive is in phase with segment drive for "OFF" segment and 180° out-of-phase for "ON" segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: See "Typical Application". 6: A 48kHz oscillator increases current by 20µA (typical). Common current not included. 2002 Microchip Technology Inc. DS21461B-page 5 TC7136/TC7136A TC7136 AND TC7136A ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: VS = 9V, fCLK = 16kHz, and TA = +25°C, unless otherwise noted. Symbol Parameter Min Typ Max Unit Test Conditions Analog Common VCTC Analog Common Temperature Coefficient TC7136A — 35 75 ppm/°C 0°C ≤ TA ≤ +70°C TC7136 — 70 150 ppm/°C "C" Commercial Temp. Range Devices TC7136A — 35 100 ppm/°C -25°C ≤ TA ≤ +85°C TC7136 — 70 150 ppm/°C "I" Industrial Temp. Range Devices 2.7 3.05 3.35 V 250kΩ Between Common and V+ Analog Common Voltage VC 250kΩ between Common and V+ LCD Drive VSD LCD Segment Drive Voltage 4 5 6 VP-P V+ to V- = 9V VBD LCD Backplane Drive Voltage 4 5 6 VP-P V+ to V- = 9V — 70 100 µA Power Supply Power Supply Current IS VIN = 0V, V+ to V- = 9V (Note 6) Note 1: 2: 3: 4: Input voltages may exceed supply voltages when input current is limited to 100µA. Dissipation rating assumes device is mounted with all leads soldered to PC board. Refer to "Differential Input" discussion. Backplane drive is in phase with segment drive for "OFF" segment and 180° out-of-phase for "ON" segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: See "Typical Application". 6: A 48kHz oscillator increases current by 20µA (typical). Common current not included. DS21461B-page 6 2002 Microchip Technology Inc. TC7136/TC7136A 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN DESCRIPTION Pin Number (40-Pin PDIP) Normal (Reverse) Symbol 1 (40) V+ Positive supply voltage. 2 (39) D1 Activates the D section of the units display. 3 (38) C1 Activates the C section of the units display. 4 (37) B1 Activates the B section of the units display. 5 (36) A1 Activates the A section of the units display. 6 (35) F1 Activates the F section of the units display. 7 (34) G1 Activates the G section of the units display. 8 (33) E1 Activates the E section of the units display. 9 (32) D2 Activates the D section of the tens display. 10 (31) C2 Activates the C section of the tens display. 11 (30) B2 Activates the B section of the tens display. 12 (29) A2 Activates the A section of the tens display. 13 (28) F2 Activates the F section of the tens display. 14 (27) E2 Activates the E section of the tens display. 15 (26) D3 Activates the D section of the hundreds display. 16 (25) B3 Activates the B section of the hundreds display. 17 (24) F3 Activates the F section of the hundreds display. 18 (23) E3 Activates the E section of the hundreds display. 19 (22) AB4 20 (21) POL 21 (20) BP Backplane drive output. 22 (19) G3 Activates the G section of the hundreds display. 23 (18) A3 Activates the A section of the hundreds display. 24 (17) C3 Activates the C section of the hundreds display. 25 (16) G2 Activates the G section of the tens display. 26 (15) V- 27 (14) VINT 28 (13) VBUFF Integration resistor connection. Use a 180kΩ for a 20mV full scale range and a 1.8MΩ for 2V full scale range. 29 (12) CAZ The size of the auto-zero capacitor influences the system noise. Use a 0.47µF capacitor for a 200mV full scale and a 0.1µF capacitor for a 2V full scale. See Section 6.1, Auto-Zero Capacitor for more details. Description Activates both halves of the 1 in the thousands display. Activates the negative polarity display. Negative power supply voltage. The integrating capacitor should be selected to give the maximum voltage swing that ensures component tolerance buildup will not allow the integrator output to saturate. When analog common is used as a reference and the conversion rate is 3 readings per second, a 0.047µF capacitor may be used. The capacitor must have a low dielectric constant to prevent rollover errors. See Section 6.3, Integrating Capacitor for additional details. 30 (11) VIN - The low input signal is connected to this pin. 31 (10) VIN + The high input signal is connected to this pin. 32 (9) ANALOG COMMON 33 (8) CREF- 2002 Microchip Technology Inc. This pin is primarily used to set the Analog Common mode voltage for battery operation, or in systems where the input signal is referenced to the power supply. See Section 7.3, Analog Common for more details. It also acts as a reference voltage source. See Pin 34. DS21461B-page 7 TC7136/TC7136A TABLE 2-1: PIN DESCRIPTION (CONTINUED) Pin Number (40-Pin PDIP) Normal (Reverse) Symbol 34 (7) CREF+ Description A 0.1µF capacitor is used in most applications. If a large Common mode voltage exists (for example, the VIN- pin is not at analog common) and a 200mV scale is used, a 1µF capacitor is recommended, which will hold the rollover error to 0.5 count. (6) VREF- See Pin 36. (5) VREF+ The analog input required to generate a full scale output (1999 counts). Place 100mV between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for 2V full scale. See Section 6.6, Reference Voltage. 36 (4) TEST Lamp test. When pulled HIGH (to V+), all segments will be turned ON and the display should read -1888. It may also be used as a negative supply for externally generated decimal points. See Section 7.4, Test for additional information. 37 (3) OSC3 See Pin 40. 38 (2) OSC2 See Pin 40. 39 (1) OSC1 Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock (3 readings per second), connect Pin 40 to the junction of a 180kΩ resistor and a 50pF capacitor. The 180kΩ resistor is tied to Pin 39 and the 50pF capacitor is tied to Pin 38. 35 DS21461B-page 8 2002 Microchip Technology Inc. TC7136/TC7136A 3.0 DETAILED DESCRIPTION FIGURE 3-1: BASIC DUAL SLOPE CONVERTER (All Pin Designations Refer to 40-Pin PDIP.) CINT 3.1 Dual Slope Conversion Principles The TC7136/A is a dual slope, integrating analog-todigital converter. An understanding of the dual slope conversion technique will aid in following detailed TC7136/A operational theory. Analog Input Signal Clock Control Logic Polarity Control Counter Integrator Output Display VIN ≈ VREF VIN ≈ 1/2 VREF Fixed Signal Integrate Time Variable Reference Integrate Time FIGURE 3-2: EQUATION 3-1: NORMAL MODE REJECTION OF DUAL SLOPE CONVERTER 30 1 --------V IN ( t ) dt RC ∫0 V R t RI = -----------RC Where: VR = Reference voltage tSI = Signal integration time (fixed) tRI = Reference voltage integration time (variable) Normal Mode Rejection (dB) t SI 20 10 t = Measured Period For a constant VIN: 0 EQUATION 3-2: V Phase Control REF Voltage In a simple dual slope converter, a complete conversion requires the integrator output to "ramp up" and "ramp down." A simple mathematical equation relates the input signal, reference voltage, and integration time: + Switch Driver Input signal integration Reference voltage integration (de-integration) The input signal being converted is integrated for a fixed time period (tSI), measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (tRI). Comparator – + The conventional dual slope converter measurement cycle has two distinct phases (see Figure 3-1). 1. 2. Integrator – 0.1/t IN = t RI V -------Rt SI 2002 Microchip Technology Inc. 1/t Input Frequency 10/t The dual slope converter accuracy is unrelated to the integrating resistor and capacitor values, as long as they are stable during a measurement cycle. Noise immunity is an inherent benefit. Noise spikes are integrated or averaged to zero during integration periods. Integrating ADCs are immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals with frequency components at multiples of the averaging period will be attenuated. Integrating ADCs commonly operate with the signal integration period set to a multiple of the 50Hz/60Hz power line period. DS21461B-page 9 TC7136/TC7136A 4.0 ANALOG SECTION In addition to the basic integrate and de-integrate dual slope cycles discussed above, the TC7136 and TC7136A designs incorporate an "integrator output zero cycle" and an "auto-zero cycle." These additional cycles ensure the integrator starts at 0V (even after a severe over range conversion) and that all offset voltage errors (buffer amplifier, integrator and comparator) are removed from the conversion. A true digital zero reading is assured without any external adjustments. The differential input voltage must be within the device Common mode range when the converter and measured system share the same power supply common (ground). If the converter and measured system do not share the same power supply common, VIN- should be tied to analog common. Polarity is determined at the end of signal integrate phase. The sign bit is a true polarity indication, in that signals less than 1LSB are correctly determined. This allows precision null detection, limited only by device noise and auto-zero residual offsets. A complete conversion consists of four distinct phases: 1. 2. 3. 4. 4.1 Integrator output zero phase Auto-zero phase Signal integrate phase Reference de-integrate phase Integrator Output Zero Phase This phase ensures the integrator output is at 0V before the system zero phase is entered. This ensures that true system offset voltages will be compensated for, even after an over range conversion. The count for this phase is a function of the number of counts required by the de-integrate phase. The count lasts from 11 to 140 counts for non over range conversions and from 31 to 640 counts for over range conversions. 4.2 Auto-Zero Phase During the auto-zero phase, the differential input signal is disconnected from the circuit by opening internal analog gates. The internal nodes are shorted to analog common (ground) to establish a zero input condition. Additional analog gates close a feedback loop around the integrator and comparator. This loop permits comparator offset voltage error compensation. The voltage level established on CAZ compensates for device offset voltages. The auto-zero phase residual is typically 10µV to 15µV. 4.4 Reference Integrate Phase The third phase is reference integrate or de-integrate. VIN- is internally connected to analog common and VIN+ is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal and is between 0 and 2000 internal clock periods. The digital reading displayed is: EQUATION 4-2: V IN 1000 = ---------------V REF FIGURE 4-1: INT 1000 1-2000 DENT 11-140 ZI AZ 910-2900 The auto-zero duration is from 910 to 2900 counts for non over range conversions and from 300 to 910 counts for over range conversions. 4.3 Signal Integration Phase The auto-zero loop is entered and the internal differential inputs connect to VIN+ and VIN-. The differential input signal is integrated for a fixed time period. The TC7136/A signal integration period is 1000 clock periods or counts. The externally set clock frequency is divided by four before clocking the internal counters. The integration time period is: 4000 FIGURE 4-2: INT DEINT CONVERSION TIMING DURING OVER RANGE OPERATION 1000 2001-2090 31-640 EQUATION 4-1: tSI = CONVERSION TIMING DURING NORMAL OPERATION 4 x 1000 FOSC ZI AZ 300-910 4000 Where FOSC = external clock frequency. DS21461B-page 10 2002 Microchip Technology Inc. TC7136/TC7136A 5.0 DIGITAL SECTION Each phase of the measurement cycle has the following length: The TC7136/A contains all the segment drivers necessary to directly drive a 3-1/2 digit LCD. An LCD backplane driver is included. The backplane frequency is the external clock frequency divided by 800. For three conversions per second, the backplane frequency is 60Hz with a 5V nominal amplitude. When a segment driver is in phase with the backplane signal, the segment is OFF. An out-of-phase segment drive signal causes the segment to be ON, or visible. This AC drive configuration results in negligible DC voltage across each LCD segment, ensuring long LCD life. The polarity segment driver is ON for negative analog inputs. If VIN+ and VIN- are reversed, this indicator would reverse. On the TC7136/A, when the TEST pin is pulled to V+, all segments are turned ON. The display reads -1888. During this mode, the LCD segments have a constant DC voltage impressed. Note: Do not leave the display in this mode for more than several minutes. LCDs may be destroyed if operated with DC levels for extended periods. 1. Auto-zero phase: 3000 to 2900 counts (1200 to 11,600 clock pulses) Signal integrate: 1000 counts (4000 clock pulses) 2. This time period is fixed. The integration period is: EQUATION 5-1: Where: 1 FOSC tSI = 4000 FOSC is the externally set clock frequency. 3. 4. The TC7136 is a drop-in replacement for the TC7126 and ICL7126. The TC7136A offers a greatly improved internal reference temperature coefficient. Minor component value changes are required to upgrade existing designs and improve the noise performance. 6.0 COMPONENT VALUE SELECTION 6.1 Auto-Zero Capacitor (CAZ) The display font and segment drive assignment are shown in Figure 5-1. FIGURE 5-1: DISPLAY FONT AND SEGMENT ASSIGNMENT Display Font 1000's 5.1 100's 10's 1's System Timing The oscillator frequency is divided by 4 prior to clocking the internal decade counters. The four-phase measurement cycle takes a total of 4000 counts, or 16,000 clock pulses. The 4000 count cycle is independent of input signal magnitude. Reference integrate: 0 to 2000 counts Zero integrator: 11 to 640 counts The CAZ capacitor size has some influence on system noise. A 0.47µF capacitor is recommended for 200mV full scale applications, where 1LSB is 100µV. A 0.1µF capacitor is adequate for 2V full scale applications. A Mylar type dielectric capacitor is adequate. 6.2 Reference Voltage Capacitor (CREF) The reference voltage, used to ramp the integrator output voltage back to zero during the reference integrate phase, is stored on CREF. A 0.1µF capacitor is acceptable when VREF- is tied to analog common. If a large Common mode voltage exists (VREF- ≠ analog common) and the application requires a 200mV full scale, increase CREF to 1µF. Rollover error will be held to less than 0.5 count. A Mylar type dielectric capacitor is adequate. 6.3 Integrating Capacitor (CINT) CINT should be selected to maximize integrator output voltage swing without causing output saturation. Analog common will normally supply the differential voltage reference in this case, a ±2V full scale integrator output swing is satisfactory. For 3 readings per second (FOSC = 48kHz), a 0.047µF value is suggested. For one reading per second, 0.15µF is recommended. If a different oscillator frequency is used, CINT must be changed in inverse proportion to maintain the nominal ±2V integrator swing. 2002 Microchip Technology Inc. DS21461B-page 11 TC7136/TC7136A An exact expression for CINT is: 6.5 EQUATION 6-1: C OSC should be 50pF. R OSC is selected from the equation: 1 FOSC (4000) CINT = VFS RINT Oscillator Components EQUATION 6-2: VINT FOSC = Where: FOSC = Clock frequency at Pin 38 VFS Note that FOSC is ÷ 4 to generate the TC7136A's internal clock. The backplane drive signal is derived by dividing FOSC by 800. = Full scale input voltage RINT = Integrating resistor VINT = Desired full scale integrator output swing CINT must have low dielectric absorption to minimize rollover error. A polypropylene capacitor is recommended. 6.4 Integrating Resistor (RINT) The input buffer amplifier and integrator are designed with Class A output stages. The output stage idling current is 6µA. The integrator and buffer can supply 1µA drive currents with negligible linearity errors. RINT is chosen to remain in the output stage linear drive region, but not so large that PC board leakage currents induce errors. For a 200mV full scale, R INT is 180kΩ. A 2V full scale requires 1.8MΩ (see Table 6-1). TABLE 6-1: Component Value CAZ Nominal Full Scale Voltage 200mV 2V 0.47µF 0.1µF 180kΩ 1.8MΩ CINT 0.047µF 0.047µF FOSC = 48kHz (3 reading per sec). ROSC = 180kΩ, COSC = 50pF. DS21461B-page 12 To achieve maximum rejection of 60Hz noise pickup, the signal integrate period should be a multiple of 60Hz. Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note that 40kHz (2.5 readings per second) will reject both 50Hz and 60Hz. 6.6 Reference Voltage Selection A full scale reading (2000 counts) requires the input signal be twice the reference voltage. Required Full Scale Voltage* VREF 200mV 100mV 2V 1V Note: RINT Note: 0.45 RC *VREF = 2VREF. In some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. Assume, for example, a pressure transducer output for 2000 lb/in2 is 400mV. Rather than dividing the input voltage by two, the reference voltage should be set to 200mV. This permits the transducer input to be used directly. The differential reference can also be used when a digital zero reading is required, when VIN is not equal to zero. This is common in temperature measuring instrumentation. A compensating offset voltage can be applied between analog common and VIN-. The transducer output is connected between VIN+ and analog common. 2002 Microchip Technology Inc. TC7136/TC7136A 7.0 DEVICE PIN FUNCTIONAL DESCRIPTION 7.1 Differential Signal Inputs VIN+ (Pin 31), VIN- (Pin 30) The TC7136/A is designed with true differential inputs and accepts input signals within the input stage Common mode voltage range (VCM). The typical range is FIGURE 7-1: V+ – 1V to V- + 1V. Common mode voltages are removed from the system when the TC7136A operates from a battery or floating power source (isolated from measured system), Common mode voltage removed in battery operation with VIN = analog common and VINis connected to analog common (VCOM) (see Figure 7-1). COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH VIN = ANALOG COMMON Segment Drive Measured System VBUF V+ V+ V- VGND CAZ VINT POL BP OSC1 TC7136 TC7136A OSC3 LCD OSC2 V- ANALOG COMMON VREF- VREF+ V+ V+ V- GND Power Source + 9V In systems where Common mode voltages exist, the 86dB Common mode rejection ratio minimizes error. Common mode voltages do, however, affect the integrator output level. A worst case condition exists if a large positive VCM exists in conjunction with a full scale negative differential signal. The negative signal drives the integrator output positive along with VCM (see Figure 7-2.) For such applications, the integrator output swing can be reduced below the recommended 2V full scale swing. The integrator output will swing within 0.3V of V+ or V- without increased linearity error. FIGURE 7-2: COMMON MODE VOLTAGE REDUCES AVAILABLE INTEGRATOR SWING (VCOM ≠ VIN) CI Input Buffer + + RI – VIN – VI + Integrator – VCM tI VCM = VIN VI = CI Where: 4000 tI = Integration time = FOSC CI = Integration capacitor [ [ 7.2 Differential Reference VREF+ (Pin 36), VREF- (Pin 35) The reference voltage can be generated anywhere within the V+ to V- power supply range. To prevent rollover type errors being induced by large Common mode voltages, CREF should be large compared to stray node capacitance. The TC7136/A offers a significantly improved analog common temperature coefficient. This potential provides a very stable voltage, suitable for use as a voltage reference. The temperature coefficient of analog common is typically 35ppm/°C. 7.3 Analog Common (Pin 32) The analog common pin is set at a voltage potential approximately 3V below V+. The potential is between 2.7V and 3.35V below V+. Analog common is tied internally to an N-channel FET, capable of sinking 100µA. This FET will hold the common line at 3V below V+ if an external load attempts to pull the common line toward V+. Analog common source current is limited to 1µA. Analog common is, therefore, easily pulled to a more negative voltage (i.e., below V+ – 3V). RI = Integration resistor 2002 Microchip Technology Inc. DS21461B-page 13 TC7136/TC7136A The analog common pin serves to set the analog section reference, or common point. The TC7136A is specifically designed to operate from a battery, or in any measurement system where input signals are not referenced (float), with respect to the TC7136A power source. The analog common potential of V+ – 3V gives a 7V end of battery life voltage. The common potential has a 0.001%/% voltage coefficient. With sufficiently high total supply voltage (V+ – V- > 7V), analog common is a very stable potential with excellent temperature stability (typically 35ppm/°C for TC7136A. This potential can be used to generate the TC7136A's reference voltage. An external voltage reference will be unnecessary in most cases, because of the 35ppm/°C temperature coefficient. See Section 7.5, TC7136A Internal Voltage Reference discussion. 7.4 TEST (Pin 37) The TEST pin potential is 5V less than V+. TEST may be used as the negative power supply connection for external CMOS logic. The TEST pin is tied to the internally generated negative logic supply through a 500Ω resistor. The TEST pin load should not be more than 1mA. See Section 8.0, Typical Applications for additional information on using TEST as a negative digital logic supply. FIGURE 7-3: ANALOG COMMON TEMPERATURE COEFFICIENT 200 180 Analog Common Temperature Coefficient (ppm/°C) The TC7136/A connects the internal VIN+ and VINinputs to analog common during the auto-zero phase. During the reference integrate phase, VIN- is connected to analog common. If VIN- is not externally connected to analog common, a Common mode voltage exists, but is rejected by the converter's 86dB Common mode rejection ratio. In battery operation, analog common and VIN- are usually connected, removing Common mode voltage concerns. In systems where VIN- is connected to the power supply ground or to a given voltage, analog common should be connected to VIN-. 160 Maximum No Maximum Specified 140 Typical 120 100 Maximum 80 Typical 60 Typical 40 20 TC7136A TC7136 ICL7136 0 FIGURE 7-4: TC7136A INTERNAL VOLTAGE REFERENCE CONNECTION 9V 26 V- + 1 V+ 240kΩ TC7136 TC7136A VREF+ 36 10kΩ VREF VREF- 35 ANALOG 32 COMMON Set VREF = 1/2 VREF If TEST is pulled high (to V+), all segments plus the minus sign will be activated. DO NOT OPERATE IN THIS MODE FOR MORE THAN SEVERAL MINUTES. With TEST = V+, the LCD segments are impressed with a DC voltage which will destroy the LCD. 7.5 TC7136A Internal Voltage Reference The TC7136 analog common voltage temperature stability has been significantly improved (Figure 7-3). The "A" version of the industry standard TC7136 device allows users to upgrade old systems and design new systems without external voltage references. External R and C values do not need to be changed; however, noise performance will be improved by increasing CAZ (see Section 6.1, Auto-Zero Capacitor). Figure 7-4 shows analog common supplying the necessary voltage reference for the TC7136/A. DS21461B-page 14 2002 Microchip Technology Inc. TC7136/TC7136A 8.0 TYPICAL APPLICATIONS 8.1 Liquid Crystal Display Sources Several manufacturers supply standard LCDs to interface with the TC7136A 3-1/2 digit analog-to-digital converter. Representative Part Numbers* Manufac. Address/Phone Crystaloid Electronics 5282 Hudson Dr. Hudson, OH 44236 216-655-2429 C5335, H5535, T5135, SX440 AND 720 Palomar Ave. Sunnyvale, CA 94086 408-523-8200 FE 0201, 0501 FE 0203, 0701 FE 2201 VGI, Inc. 1800 Vernon St. Ste.2, Roseville, CA 95678 916-783-7878 I1048, I1126 Hamlin, Inc. 612 E. Lake St. Lake Mills, WI 53551 414-648-236100 3902, 3933, 3903 Note: 8.2 Contact LCD manufacturer for full product listing/ specifications. EQUATION 8-1: Displayed(Reading) = Ratiometric Resistance Measurements The TC7136A's true differential input and differential reference make ratiometric readings possible. In ratiometric operation, an unknown resistance is measured with respect to a known standard resistance. No accurately defined reference voltage is needed. 2002 Microchip Technology Inc. RUNKNOWN x 1000 RSTANDARD The display will over range for: RUNKNOWN ≥ 2 x R STANDARD FIGURE 8-1: DECIMAL POINT AND ANNUNCIATOR DRIVES Simple Inverter for Fixed Decimal Point or Display Annunciator V+ V+ TC7136 TC7136A BP Decimal Point and Annunciator Drive The TEST pin is connected to the internally generated digital logic supply ground through a 500Ω resistor. The TEST pin may be used as the negative supply for external CMOS gate segment drivers. LCD annunciators for decimal points, low battery indication, or function indication may be added without adding an additional supply. No more than 1mA should be supplied by the TEST pin; its potential is approximately 5V below V+. 8.3 The unknown resistance is put in series with a known standard and a current passed through the pair. The voltage developed across the unknown is applied to the input and the voltage across the known resistor applied to the reference input. If the unknown equals the standard, the display will read 1000. The displayed reading can be determined from the following expression: TEST 4049 To LCD Decimal Point 21 GND 37 To LCD Backplane Multiple Decimal Point or Annunciator Driver V+ V+ BP TC7136 TC7136A TEST To LCD Decimal Point Decimal Point Select 4030 GND DS21461B-page 15 TC7136/TC7136A FIGURE 8-2: LOW PARTS COUNT RATIOMETRIC RESISTANCE MEASUREMENT FIGURE 8-4: + VREF+ V+ 5.6kΩ V+ 1N4148 R1 20kΩ LCD VIN+ TC7136 TC7136A RUNKNOWN 0.7%/°C PTC VIN- + R2 50kΩ R1 50kΩ R3 R2 20kΩ TC7136 TC7136A VREF+ COMMON 9V 300kΩ V+ VIN- 1N4148 Sensor VIN- VREF- TEMPERATURE SENSOR 300kΩ V- VIN+ ANALOG COMMON FIGURE 8-3: 9V 160kΩ VREF- RSTANDARD 160kΩ POSITIVE TEMPERATURE COEFFICIENT RESISTOR TEMPERATURE SENSOR V- VIN+ TC7136 TC7136A VREF+ VREFCOMMON DS21461B-page 16 2002 Microchip Technology Inc. TC7136/TC7136A 9.0 PACKAGING INFORMATION 9.1 Package Marking Information Package marking data not available at this time. 9.2 Taping Form Component Taping Orientation for 44-Pin PQFP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 44-Pin PQFP Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 24 mm 16 mm 500 13 in Note: Drawing does not represent total number of pins. Component Taping Orientation for 44-Pin PLCC Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 44-Pin PLCC Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 32 mm 24 mm 500 13 in Note: Drawing does not represent total number of pins. 2002 Microchip Technology Inc. DS21461B-page 17 TC7136/TC7136A 9.3 Package Dimensions 40-Pin PDIP (Wide) PIN 1 .555 (14.10) .530 (13.46) 2.065 (52.45) 2.027 (51.49) .610 (15.49) .590 (14.99) .200 (5.08) .140 (3.56) .040 (1.02) .020 (0.51) .150 (3.81) .115 (2.92) .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .015 (0.38) .008 (0.20) 3° MIN. .700 (17.78) .610 (15.50) .022 (0.56) .015 (0.38) Dimensions: inches (mm) 44-Pin PLCC PIN 1 .021 (0.53) .013 (0.33) .050 (1.27) TYP. .695 (17.65) .685 (17.40) .630 (16.00) .591 (15.00) .656 (16.66) .650 (16.51) .032 (0.81) .026 (0.66) .020 (0.51) MIN. .656 (16.66) .650 (16.51) .120 (3.05) .090 (2.29) .695 (17.65) .685 (17.40) .180 (4.57) .165 (4.19) Dimensions: inches (mm) DS21461B-page 18 2002 Microchip Technology Inc. TC7136/TC7136A 9.3 Package Dimensions (Continued) 44-Pin PQFP 7° MAX. .009 (0.23) .005 (0.13) PIN 1 .018 (0.45) .012 (0.30) .041 (1.03) .026 (0.65) .398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65) .031 (0.80) TYP. .398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65) .010 (0.25) TYP. .083 (2.10) .075 (1.90) .096 (2.45) MAX. Dimensions: inches (mm) 2002 Microchip Technology Inc. DS21461B-page 19 TC7136/TC7136A SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. DS21461B-page 20 2002 Microchip Technology Inc. TC7136/TC7136A Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro ® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. DS21461B-page 21 WORLDWIDE SALES AND SERVICE AMERICAS ASIA/PACIFIC Japan Corporate Office Australia 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com Microchip Technology Australia Pty Ltd Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 Microchip Technology Japan K.K. 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India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O’Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 EUROPE Denmark Microchip Technology Nordic ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910 France Microchip Technology SARL Parc d’Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany Microchip Technology GmbH Gustav-Heinemann Ring 125 D-81739 Munich, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44 Italy Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 03/01/02 *DS21461B* DS21461B-page 22 2002 Microchip Technology Inc.