20V 6A LOW VCE(sat) PNP High Current Transistor ChipFET

NSS20600CF8T1G
20 V, 7.0 A, Low VCE(sat)
PNP Transistor
ON Semiconductor’s e2 PowerEdge family of low VCE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (VCE(sat)) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e2PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
• This is a Pb−Free Device
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−20 VOLTS, 7.0 AMPS
PNP LOW VCE(sat) TRANSISTOR
EQUIVALENT RDS(on) 50 mW
COLLECTOR
1, 2, 3, 6, 7, 8
4
BASE
MAXIMUM RATINGS (TA = 25°C)
Rating
Symbol
Max
Unit
Collector-Emitter Voltage
VCEO
−20
Vdc
Collector-Base Voltage
VCBO
−20
Vdc
Emitter-Base Voltage
VEBO
−7.0
Vdc
Collector Current − Continuous
IC
−6.0
Adc
Collector Current − Peak
ICM
−7.0
A
Electrostatic Discharge
ESD
HBM Class 3B
MM Class C
5
EMITTER
ChipFET]
CASE 1206A
STYLE 4
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation, TA = 25°C
Derate above 25°C
PD (Note 1)
830
6.7
mW
mW/°C
RqJA (Note 1)
150
°C/W
PD (Note 2)
1.4
11.1
W
mW/°C
Thermal Resistance,
Junction−to−Ambient
RqJA (Note 2)
90
°C/W
Thermal Resistance,
Junction−to−Lead #1
RqJL (Note 2)
15
°C/W
Total Device Dissipation
(Single Pulse < 10 sec)
PDsingle
(Notes 2 & 3)
2.75
W
TJ, Tstg
−55 to
+150
°C
Thermal Resistance,
Junction−to−Ambient
Total Device Dissipation, TA = 25°C
Derate above 25°C
Junction and Storage
Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ 100 mm2, 1 oz copper traces.
2. FR−4 @ 500 mm2, 1 oz copper traces.
3. Thermal response.
VC M
G
VC = Specific Device Code
M = Date Code
G = Pb−Free Package
PIN CONNECTIONS
C 8
1 C
C 7
2 C
C 6
3 C
E 5
4 B
ORDERING INFORMATION
Device
Package
Shipping†
NSS20600CF8T1G
ChipFET
(Pb−Free)
3000/
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
1
Publication Order Number:
NSS20600CF8/D
NSS20600CF8T1G
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typical
Max
−20
−
−
−20
−
−
−7.0
−
−
−
−
−0.1
−
−
−0.1
250
250
220
200
180
−
−
300
−
−
−
−
−
−
−
−
−
−
−
−
−
−0.007
−0.050
−0.065
−0.090
−0.140
−0.160
−0.010
−0.060
−0.080
−0.130
−0.180
−0.200
−
−
−0.90
−
−
−0.90
100
−
−
Unit
OFF CHARACTERISTICS
Collector −Emitter Breakdown Voltage
(IC = −10 mAdc, IB = 0)
V(BR)CEO
Collector −Base Breakdown Voltage
(IC = −0.1 mAdc, IE = 0)
V(BR)CBO
Emitter −Base Breakdown Voltage
(IE = −0.1 mAdc, IC = 0)
V(BR)EBO
Collector Cutoff Current
(VCB = −20 Vdc, IE = 0)
ICBO
Emitter Cutoff Current
(VEB = −7.0 Vdc)
IEBO
Vdc
Vdc
Vdc
mAdc
mAdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 4)
(IC = −10 mA, IC = −2.0 V)
(IC = −500 mA, VCE = −2.0 V)
(IC = −1.0 A, VCE = −2.0 V)
(IC = −2.0 A, VCE = −2.0 V)
(IC = −3.0 A, VCE = −2.0 V)
Collector −Emitter Saturation Voltage (Note 4)
(IC = −0.1 A, IB = −0.010 A) (Note 5)
(IC = −1.0 A, IB = −0.100 A)
(IC = −1.0 A, IB = −0.010 A)
(IC = −2.0 A, IB = −0.020 A)
(IC = −3.0 A, IB = −0.030 A)
(IC = −4.0 A, IB = −0.400 A)
VCE(sat)
Base −Emitter Saturation Voltage (Note 4)
(IC = −1.0 A, IB = −0.01 A)
VBE(sat)
Base −Emitter Turn−on Voltage (Note 4)
(IC = −2.0 A, VCE = −3.0 V)
VBE(on)
Cutoff Frequency
(IC = −100 mA, VCE = −5.0 V, f = 100 MHz)
fT
V
V
V
MHz
Input Capacitance (VEB = −0.5 V, f = 1.0 MHz)
Cibo
−
−
700
pF
Output Capacitance (VCB = −3.0 V, f = 1.0 MHz)
Cobo
−
−
280
pF
Delay (VCC = −15 V, IC = 750 mA, IB1 = 15 mA)
td
−
−
120
ns
Rise (VCC = −15 V, IC = 750 mA, IB1 = 15 mA)
tr
−
−
250
ns
Storage (VCC = −15 V, IC = 750 mA, IB1 = 15 mA)
ts
−
−
400
ns
Fall (VCC = −15 V, IC = 750 mA, IB1 = 15 mA)
tf
−
−
250
ns
SWITCHING CHARACTERISTICS
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
5. Guaranteed by design but not tested.
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2
NSS20600CF8T1G
0.30
IC/IB = 10
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
0.25
0.20
VCE(sat) = 150°C
0.15
25°C
0.10
−55°C
0.05
0
0.001
0.01
0.1
1.0
IC/IB = 100
0.25
0.20
150°C
0.10
0.05
0
10
VCE(sat) = −55°C
0.001
IC, COLLECTOR CURRENT (A)
1.2
VBE(sat), BASE EMITTER
SATURATION VOLTAGE (V)
25°C (5 V)
400
25°C (2 V)
300
−55°C (5 V)
200
100
VBE(on), BASE EMITTER TURN−ON VOLTAGE (V)
150°C (2 V)
0.001
0.01
0.1
1.0
10
0.9
−55°C
0.8
25°C
0.7
0.6
0.5
150°C
0.001
0.01
0.1
10
1.0
IC, COLLECTOR CURRENT (A)
Figure 3. DC Current Gain vs.
Collector Current
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
VCE = −1.0 V
−55°C
25°C
0.7
0.6
0.5
150°C
0.4
0.3
0.2
0.001
1.0
IC, COLLECTOR CURRENT (A)
0.8
0.1
10
IC/IB = 10
1.1
0.3
1.0
0.9
1.0
0.4
−55°C (2 V)
VCE, COLLECTOR−EMITTER VOLTAGE (V)
hFE, DC CURRENT GAIN
700
500
0.1
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
150°C (5 V)
600
0.01
IC, COLLECTOR CURRENT (A)
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
800
25°C
0.15
0.01
0.1
1.0
10
1.0
100 mA
10 mA
IC = 500 mA
0.8
300 mA
0.6
0.4
0.2
0
0.01
0.1
1.0
10
IC, COLLECTOR CURRENT (A)
IB, BASE CURRENT (mA)
Figure 5. Base Emitter Turn−On Voltage vs.
Collector Current
Figure 6. Saturation Region
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3
100
NSS20600CF8T1G
375
Cobo, OUTPUT CAPACITANCE (pF)
800
Cibo (pF)
750
700
650
600
550
500
450
400
350
300
0
1.0
2.0
3.0
4.0
5.0
6.0
350
Cobo (pF)
325
300
275
250
225
200
175
150
125
100
0
5.0
10
15
20
VEB, EMITTER BASE VOLTAGE (V)
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 7. Input Capacitance
Figure 8. Output Capacitance
10
1.0 mS
1.0
IC (A)
Cibo, INPUT CAPACITANCE (pF)
850
10 mS
100 mS
1.0 S
0.1
Thermal
Limit
0.01
0.01
0.1
1.0
10
VCE (Vdc)
Figure 9. Safe Operating Area
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4
100
25
NSS20600CF8T1G
PACKAGE DIMENSIONS
ChipFET
CASE 1206A−03
ISSUE G
D
8
7
q
6
L
5
HE
5
6
7
8
4
3
2
1
E
1
e1
2
3
e
4
b
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
DIM
A
b
c
D
E
e
e1
L
HE
q
c
A
MILLIMETERS
NOM
MAX
1.05
1.10
0.30
0.35
0.15
0.20
3.05
3.10
1.65
1.70
0.65 BSC
0.55 BSC
0.28
0.35
0.42
1.80
1.90
2.00
5° NOM
MIN
1.00
0.25
0.10
2.95
1.55
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.011
0.014
0.071
0.075
5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
0.05 (0.002)
SOLDERING FOOTPRINT*
2.032
0.08
0.457
0.018
2.032
0.08
0.635
0.025
1.727
0.068
0.457
0.018
0.711
0.028
0.66
0.026
SCALE 20:1
0.178
0.007
0.711
0.028
mm Ǔ
ǒinches
0.66
0.026
Basic
SCALE 20:1
mm Ǔ
ǒinches
Style 4
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NSS20600CF8/D
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