ATA6560/ATA6561 - Complete

ATA6560/ATA6561
High-speed CAN Transceiver with Standby Mode
CAN FD Ready
DATASHEET
Features
● Fully ISO 11898-2,-5, SAE J2284 compliant
● CAN FD ready
● Communication speed up to 5Mbit/s
● Low electromagnetic emission (EME) and high electromagnetic immunity (EMI)
● Differential receiver with wide common mode range
● Atmel ATA6560: Silent mode (receive only)
● Remote wake-up capability via CAN bus
● Functional behavior predictable under all supply conditions
● Transceiver disengages from the bus when not powered up
● RXD recessive clamping detection
● High electrostatic discharge (ESD) handling capability on the bus pins
● Bus pins protected against transients in automotive environments
● Transmit data (TXD) dominant time-out function
● Undervoltage detection on VCC and VIO pins
● CANH/CANL short-circuit and overtemperature protected
● Qualified according to AEC-Q100
● Packages: SO8, DFN8 with wettable flanks (Moisture Sensitivity Level 1)
Description
The Atmel® ATA6560/ATA6561 is a high-speed CAN transceiver that provides an interface
between a controller area network (CAN) protocol controller and the physical two-wire CAN
bus. The transceiver is designed for high-speed (up to 5Mbit/s) CAN applications in the
automotive industry, providing differential transmit and receive capability to (a microcontroller with) a CAN protocol controller. It offers improved electromagnetic compatibility
(EMC) and electrostatic discharge (ESD) performance, as well as features such as:
● Ideal passive behavior to the CAN bus when the supply voltage is off
● Direct interfacing to microcontrollers with supply voltages from 3V to 5V (ATA6561)
9288J-AUTO-04/15
Three operating modes together with the dedicated fail-safe features make the Atmel ATA6560/ATA6561 an excellent
choice for all types of high- speed CAN networks, especially in nodes requiring low-power mode with wake-up capability via
the CAN bus.
Figure 1.
Block Diagram
VIO
VCC
5(1)
3
ATA6560/ATA6561
VCC
Temperature
Protection
VIO(1)
7
CANH
TXD
1
VIO(1)
STBY
TXD
Time-OutTimer
Slope
Control
and
Driver
6
CANL
8
VIO(1)
Control
Unit
5(1)
NSIL
HSC(2)
VIO(1)
RXD
4
MUX
Wake-Up
Filter
WUC(3)
2
GND
Notes:
2
1.
Pin 5: Atmel ATA6561: VIO
Atmel ATA6560: NSIL (the VIO line and the VCC line are internally connected)
2.
HSC: High-speed comparator
3.
WUC: Wake-up comparator
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
1.
Pin Configuration
Figure 1-1. SO8 Pinning
TXD
1
GND
2
8
STBY
TXD
1
7
CANH
GND
2
ATA6561
8
STBY
7
CANH
ATA6560
VCC
3
6
CANL
VCC
3
6
CANL
RXD
4
5
VIO
RXD
4
5
NSIL
Figure 1-2. DFN8 Pinning
TXD
GND
VCC
RXD
Table 1-1.
ATA6561
STBY
CANH
CANL
VIO
TXD
GND
VCC
RXD
ATA6560
STBY
CANH
CANL
NSIL
Pin Description
Pin
Symbol
1
TXD
Transmit data input
2
GND
Ground supply
3
VCC
Supply voltage
4
RXD
Receive data output; reads out data from the bus lines
5(1)
VIO
Supply voltage for I/O level adapter; only in the Atmel ATA6561
NSIL
Silent mode control input (low active); only in the Atmel ATA6560
6
CANL
Low-level CAN bus line
7
CANH
High-level CAN bus line
STBY
Standby mode control input
(1)
5
8
Backside
Notes:
(2)
-
Function
Heat slug, internally connected to the GND pin
1.
The function of pin 5 depends on the version:
Atmel ATA6561: VIO; Atmel ATA6560: NSIL (the VIO line and the VCC line are internally connected)
2.
Only for the DFN8 package
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
3
2.
Functional Description
The Atmel® ATA6560/ATA6561 is a stand-alone high-speed CAN transceiver compliant with the ISO 11898-2 and
11898-5 CAN standard. It provides a very low current consumption in standby mode and wake-up capability via the CAN
bus. There are two versions available, only differing in the function of pin 5:
● Atmel ATA6561: The pin 5 is the VIO pin and should be connected to the microcontroller supply voltage. This allows
direct interfacing to microcontrollers with supply voltages down to 3V and adjusts the signal levels of the TXD, RXD,
and STBY pins to the I/O levels of the microcontroller. The I/O ports are supplied by the VIO pin.
●
2.1
Atmel ATA6560: The pin 5 is the control input for silent mode NSIL allowing the ATA6560 to only receive data but not
send data via the bus. The output driver stage is disabled. The VIO line and the VCC line are internally connected,
this sets the signal levels of the TXD, RXD, STBY, and NSIL pins to levels compatible with 5V microcontrollers.
Operating Modes
The Atmel ATA6561 supports three operating modes: unpowered, standby and normal. The Atmel ATA6560 additionally has
the silent mode. These modes can be selected via the STBY and NSIL pins. See Figure 2-1 and Table 2-1 for a description
of the operating modes.
Figure 2-1. Operating Modes
ATA6560
VCC < Vuvd(VCC)
ATA6561
VCC < Vuvd(VCC) or
VIO < Vuvd(VIO)
VCC < Vuvd(VCC)
Unpowered
Mode
VCC < Vuvd(VCC) or
VIO < Vuvd(VIO)
VCC > Vuvd(VCC)
VCC < Vuvd(VCC)
STBY = 1
STBY = 1
Standby
Mode
STBY = 0 and
(NSIL = 0 or
TXD = 0)
Unpowered
Mode
VCC > Vuvd(VCC) and
VIO > Vuvd(VIO)
STBY = 1
STBY = 1
STBY = 0 and
TXD = 0
STBY = 0 and
NSIL = 1 and
Standby
Mode
STBY = 0 and
TXD = 1 and
Error = 0
TXD = 1 and
Error = 0
NSIL = 1 and
TXD = 1 and
Error = 0
Silent
Mode
VCC < Vuvd(VCC) or
VIO < Vuvd(VIO)
*
Normal
Mode
Error = 0 and
TXD = 1
Silent
Mode
Normal
Mode
Error = 1
NSIL = 0 or
Error = 1
* Silent Mode is externally not accessible
Note:
For the Atmel ATA6561 NSIL is internally set to “1”.
Table 2-1.
Operating Modes
Inputs
Mode
STBY
Unpowered
Standby
Silent (ATA6560)
Normal
Notes:
4
(3)
x
HIGH
NSIL
Outputs
CAN Driver
Pin RXD
x
x
(3)
Recessive
Recessive
x(3)
x(3)
Recessive
Active(4)
(3)
Recessive
Active(1)
(3)
Pin TXD
LOW
LOW
LOW
HIGH(2)
LOW
Dominant
LOW
LOW
(2)
HIGH
Recessive
HIGH
HIGH
x
1.
LOW if the CAN bus is dominant, HIGH if the CAN bus is recessive.
2.
Internally pulled up if not bonded out.
3.
Irrelevant
4.
Reflects the bus only for wake-up
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
2.1.1
Normal Mode
A low level on the STBY pin together with a high level on pins TXD and NSIL selects the normal mode. In this mode the
transceiver is able to transmit and receive data via the CANH and CANL bus lines (see Figure 1 on page 2). The output
driver stage is active and drives data from the TXD input to the CAN bus. The high-speed comparator (HSC) converts the
analog data on the bus lines into digital data which is output to pin RXD. The bus biasing is set to VCC/2 and the
undervoltage monitoring of VCC is active.
The slope of the output signals on the bus lines is controlled and optimized in a way that guarantees the lowest possible
electromagnetic emission (EME).
To switch the device in normal operating mode, set the STBY pin to low and the TXD pin and the NSIL pin (if applicable) to
high (see Table 2-1 on page 4, Figure 2-2 and Figure 2-3). The STBY and the NSIL pins each provide a pull-up resistor to
VIO, thus ensuring defined levels if the pins are open.
Please note that the device cannot enter Normal Mode as long as TXD is at ground level. Atmel® ATA6560 will only switch to
normal mode when all inputs are set accordingly.
The switching into normal mode is depicted in the following two figures.
Figure 2-2. Switching from Standby Mode to Normal Mode (NSIL = High)
STBY
t
TXD
t
tdel(stby-norm) =
47µs max
Operation
Mode
Normal Mode
Standby Mode
t
Figure 2-3. Switching from Silent Mode to Normal Mode
STBY
t
NSIL
t
TXD
t
tdel(sil-norm) =
10µs max
Operation
Mode
Silent Mode
Normal Mode
t
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
5
2.1.2
Silent Mode (Only with the Atmel ATA6560)
A low level on the NSIL pin (available on pin 5) and on the STBY pin selects silent mode. This receive-only mode can be
used to test the connection of the bus medium. In silent mode the Atmel ATA6560 can still receive data from the bus, but the
transmitter is disabled and therefore no data can be sent to the CAN bus. The bus pins are released to recessive state. All
other IC functions, including the high-speed comparator (HSC), continue to operate as they do in normal mode. Silent mode
can be used to prevent a faulty CAN controller from disrupting all network communications.
2.1.3
Standby Mode
A high level on the STBY pin selects standby mode. In this mode the transceiver is not able to transmit or correctly receive
data via the bus lines. The transmitter and the high-speed comparator (HSC) are switched off to reduce current consumption
and only the low- power wake-up comparator (WUC) monitors the bus lines for a valid wake-up signal. A signal change on
the bus from “Recessive” to “Dominant” followed by a dominant state longer than twake switches the RXD pin to low to signal
a wake-up request to the microcontroller.
In standby mode the bus lines are biased to ground to reduce current consumption to a minimum. The wake-up comparator
(WUC) monitors the bus lines for a valid wake-up signal. When the RXD pin switches to low to signal a wake-up request, a
transition to normal mode is not triggered until the STBY pin is forced back to low by the microcontroller. A bus dominant
time-out timer prevents the device from generating a permanent wake-up request by switching the RXD pin to high.
For Atmel® ATA6560 only: In the event the NSIL input pin is set to low in standby mode, the internal pull-up resistor causes
an additional quiescent current from VIO to GND. Atmel therefore recommends setting the NSIL pin to high in standby mode.
2.2
Fail-safe Features
2.2.1
TXD Dominant Time-Out Function
A TXD dominant time-out timer is started when the TXD pin is set to LOW. If the LOW state on the TXD pin persists for
longer than tto(dom)TXD, the transmitter is disabled, releasing the bus lines to recessive state. This function prevents a
hardware and/or software application failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when the TXD pin is set to HIGH (≥ 4µs).
2.2.2
Internal Pull-Up Structure at the TXD, NSIL, and STBY Input Pins
The TXD, STBY, and NSIL pins have an internal pull-up to VIO. This ensures a safe, defined state in case one or all of these
pins are left floating. Pull-up currents flow in these pins in all states, meaning all pins should be in high state during standby
mode to minimize the current consumption.
2.2.3
Undervoltage Detection on Pins VCC and VIO
If VVCC or VVIO drop below their respective undervoltage detection levels (Vuvd(VCC) and Vuvd(VIO) (see Section 6. “Electrical
Characteristics” on page 9), the transceiver switches off and disengages from the bus until VVCC and VVIO have recovered.
The low-power wake-up comparator is only switched off during a VCC or VIO undervoltage. The logic state of the STBY pin
is ignored until the VCC voltage or the VIO voltage has recovered.
2.2.4
Bus Wake-up Time-out Function
In standby mode a bus wake-up time-out timer is started when the CAN bus changes from recessive to dominant state. If the
dominant state on the bus persists for longer than tto_bus, the RXD pin is switched to HIGH. this function prevents a clamped
dominant bus (due to a bus short-circuit or a failure in one of the other nodes on the network) from generating a permanent
wake-up request. The bus wake-up time-out timer is reset when the CAN bus changes from dominant to recessive state.
2.2.5
Overtemperature Protection
The output drivers are protected against overtemperature conditions. If the junction temperature exceeds the shutdown
junction temperature, TJsd, the output drivers are disabled until the junction temperature drops below TJsd and pin TXD is at
high level again. The TXD condition ensures that output driver oscillations due to temperature drift are avoided.
6
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
Figure 2-4. Release of Transmission after Overtemperature Condition
Failure
Overtemp
OT
Overtemperature
t
TXD
VIO
GND
t
BUS VDIFF
(CANH-CANL)
D
R
D
R
D
R
tt
RXD
VIO
GND
t
2.2.6
Short-Circuit Protection of the Bus Pins
The CANH and CANL bus outputs are short-circuit protected, either against GND or a positive supply voltage. A currentlimiting circuit protects the transceiver against damage. If the device is heating up due to a continuous short on CANH or
CANL, the internal overtemperature protection switches the bus transmitter off.
2.2.7
RXD Recessive Clamping
This fail-safe feature prevents the controller from sending data on the bus if it’s RXD line is clamped to HIGH (e.g.,
recessive). That is, if the RXD pin cannot signalize a dominant bus condition because it is e.g, shorted to VCC, the
transmitter within ATA6560/ATA6561 is disabled to avoid possible data collisions on the bus. In normal and silent mode
(only ATA6560), the device permanently compares the state of the high-speed comparator (HSC) with the state of the RXD
pin. If the HSC indicates a dominant bus state for more than tRC_det without the RXD pin doing the same, a recessive
clamping situation is detected and the device is forced into silent mode. This fail-safe mode is released by either entering
standby or unpowered mode or if the RXD pin is showing a dominant (e.g., LOW) level again.
Figure 2-5. RXD Recessive Clamping Detection
CAN
TXD
RXD
Operation
Mode
Normal
Silent
Normal
If the clamping condition is removed and a
dominant bus is detected, the transceiver
goes back to normal mode.
ATA6560/ATA6561 [DATASHEET]
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3.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
Condition
CANH, CANL
DC voltage
Transient voltage, according to ISO 7637
part 2
Symbol
VCANH, VCANL
DC voltage on all other pins
VX
Min.
Max.
Unit
–27
+42
V
–150
+100
V
–0.3
+5,5
V
ESD according to IBEE CAN EMC
Test specification following IEC 61000-4-2
- Pin CANH, CANL
±8
kV
ESD (HBM following STM5.1 with
1.5k/100pF)
- Pin CANH, CANL to GND
±6
kV
Component Level ESD (HBM according to
ANSI/ESD STM5.1)
JESD22-A114
AEC-Q100 (002)
±4
kV
CDM ESD STM 5.3.1
±750
V
ESD machine model
AEC-Q100-RevF(003)
±200
V
Operating range for junction temperature
Storage temperature
4.
Tj
–40
+150
°C
Tstg
–55
+150
°C
Thermal Characteristics SO8
Parameters
Symbol
Min.
Typ.
Max.
Thermal resistance junction to ambient
RthJA
Thermal shutdown of the bus drivers
TJsd
150
175
195
°C
Symbol
Min.
Typ.
Max.
Unit
5.
145
Unit
K/W
Thermal Characteristics DFN8
Parameters
Thermal resistance junction to heat slug
RthJC
10
K/W
Thermal resistance junction to ambient, where heat slug
is soldered to PCB according to JEDEC
RthJA
50
K/W
Thermal shutdown of the bus drivers
TJsd
8
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
150
175
195
°C
6.
Electrical Characteristics
Tj = –40°C to +150°C; VCC = 4.5V to 5.5V; VIO = 2.8V to 5.5V; RL = 60, CL = 100pF unless specified otherwise; all voltages are
defined in relation to ground; positive currents flow into the IC.
No. Parameters
1
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Type*
Supply, Pin VCC
1.1 Supply voltage
VCC
4.5
5.5
V
A
IVCC_sil
1.9
2.5
3.0
mA
A
2
20
50
5
70
mA
mA
A
12
µA
µA
A
D
2.75
4.5
V
A
VVIO
2.8
5.5
V
A
IIO_rec
IIO_rdom
IIO_STBY
10
50
250
500
1
µA
µA
µA
A
A
A
Vuvd(VIO)
1.3
2.7
V
A
3.1 High-level input voltage
VIH
0.7 VVIO
VVIO + 0.3
V
A
3.2 Low-level input voltage
VIL
–0.3
0.3 VVIO
V
A
Rpu
75
175
kΩ
A
IL
–2
+2
µA
A
4.1 High-level input voltage
VIH
0.7  VVIO
VVIO + 0.3
V
A
4.2 Low-level input voltage
VIL
–0.3
0.3 VVIO
V
A
50
kΩ
A
+2
µA
A
10
pF
D
1.2 Supply current in silent mode Silent mode, VTXD = VVIO
1.3
Supply current in normal
mode
- recessive, VTXD = VVIO
- dominant, VTXD = 0V
IVCC_rec
IVCC_dom
1.4
Supply current in STBY
mode
VCC = VIO, VTXD = VNSIL = VIO
Ta = 25°C
IVCC_STBY
IVCC_STBY
1.5
Undervoltage detection
threshold on pin VCC
2.
I/O Level Adapter Supply, Pin VIO(1) (only with the Atmel ATA6561)
Vuvd(VCC)
2.1 Supply voltage on pin VIO
2.2 Supply current on pin VIO
2.3
Normal and silent mode
- recessive, VTXD = VVIO
- dominant, VTXD = 0V
STBY mode
Undervoltage detection
threshold on pin VIO
7
80
350
3 Mode Control Input, Pin NSIL and STBY
3.3 Pull- up resistor to VIO
VSTBY = 0V
VNSIL=0V
3.4 High-level leakage current
VSTBY = VVIO
VNSIL = VVIO
125
4 CAN Transmit Data Input, Pin TXD
4.3 Pull-up resistor to VIO
VTXD = 0V
RTXD
20
4.4 High-level leakage current
Normal mode, VTXD = VVIO
ITXD
–2
4.5 Input capacitance
CTXD
35
5
5 CAN Receive Data Output, Pin RXD
5.1 High-level output current
Normal mode, VRXD = VVIO – 0.4V,
VVIO = VVCC
IOH
–8
–1
mA
A
5.2 Low-level output current
Normal mode, VRXD = 0.4V, bus
dominant
IOL
2
12
mA
A
IIO
2.75
0.5
4.5
2.25
V
V
A
1.1  VVCC
V
B
6 Bus Lines, Pins CANH and CANL
6.1 Dominant output voltage
6.2
Transmitter dominant
voltage symmetry
VTXD = 0V, T < tto(dom)TXD
- pin CANH
- pin CANL
Vdom(TX)sym = VCANH + VCANL
Vdom(TX)sym 0.9  VVCC
3.5
1.5
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1.
Only for Atmel ATA6560; otherwise the values are part of the VCC pin specification.
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
9
6.
Electrical Characteristics (Continued)
Tj = –40°C to +150°C; VCC = 4.5V to 5.5V; VIO = 2.8V to 5.5V; RL = 60, CL = 100pF unless specified otherwise; all voltages are
defined in relation to ground; positive currents flow into the IC.
No. Parameters
Test Conditions
Symbol
Bus differential output
6.3
voltage
VTXD = 0V, T < tto(dom)TXD
RL = 45 to 65
VVCC=4.75V to 5.25V
VTXD = VVIO, receive, no load
VO(dif)bus
6.4 Recessive output voltage
Differential receiver
6.5
threshold voltage
6.6
Differential receiver
hysteresis voltage (HSC)
Min.
Typ.
Max.
Unit
Type*
1.5
3
V
–50
+50
mV
3
V
A
+0.1
V
A
A
Normal and silent modes,
VTXD = VVIO, no load
VO(rec)
2
Standby mode
VTXD = VVIO, no load
VO(rec)
–0.1
Normal and silent modes (HSC),
Vcm(CAN) = –27V to +27V
Vth(RX)dif
0.5
0.7
0.9
V
A
Standby mode (WUC),
Vcm(CAN) = –27V to +27V
Vth(RX)dif
0.4
0.7
1.0
V
B
Normal and silent modes,
Vcm(CAN) = –27V to +27V
Vhys(RX)dif
50
120
200
mV
A
0.5 VVCC
6.7 Dominant output current
VTXD = 0V, T < tto(dom)TXD, VVCC = 5V
- pin CANH, VCANH = 0V
- pin CANL, VCANL = 5V/40V
IIO(dom)
–100
35
–35
100
mA
mA
A
6.8 Recessive output current
Normal and silent modes,
VTXD = VVIO, no load,
VCANH = VCANL = –27V to +32V
IIO(rec)
–5
+5
mA
A
6.9 Leakage current
VVCC = VVIO = 0V,
VCANH = VCANL = 5V
IIO(rec)
–5
0
+5
µA
A
Ri
9
15
28
kΩ
A
ΔRi
–1
0
+1
%
A
Ri(dif)
19
30
52
k
A
Ri(dif)
20
30
52
k
B
Ci(cm)
20
pF
D
Ci(dif)
10
pF
D
6.10 Input resistance
6.11 Input resistance deviation
6.12 Differential input resistance
6.13
Between VCANH and VCANL
Tj < 125°C
Common-mode input
capacitance
6.14 Differential input capacitance
8 Transceiver Timing, Pins CANH, CANL, TXD, and RXD, see Figure 6-1 and Figure 6-2
8.1
Delay time from TXD to bus
Normal mode
dominant
td(TXD-busdom)
40
130
ns
C
8.2
Delay time from TXD to bus
Normal mode
recessive
td(TXD-busrec)
40
130
ns
C
8.3
Delay time from bus
dominant to RXD
Normal and silent modes
td(busdom-
20
100
ns
C
Delay time from bus
recessive to RXD
Normal and silent modes
20
100
ns
C
8.4
RXD)
td(busrec-RXD)
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1.
Only for Atmel ATA6560; otherwise the values are part of the VCC pin specification.
10
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
6.
Electrical Characteristics (Continued)
Tj = –40°C to +150°C; VCC = 4.5V to 5.5V; VIO = 2.8V to 5.5V; RL = 60, CL = 100pF unless specified otherwise; all voltages are
defined in relation to ground; positive currents flow into the IC.
No. Parameters
Test Conditions
Normal mode
Rising edge at pin TXD
Falling edge at pin TXD
8.5
Propagation delay from TXD
Normal mode
to RXD
RL = 120, CL = 200pF
Rising edge at pin TXD
Falling edge at pin TXD
8.6 TXD dominant time-out time VTXD = 0V, normal mode
Symbol
Min.
tPD(TXD-RXD)
40
40
Typ.
tPD(TXD-RXD)
Max.
Unit
Type*
200
200
ns
ns
A
A
300
300
ns
ns
D
D
tto(dom)TXD
0.8
3
ms
A
3
ms
A
5
µs
A
8.7 Bus wake-up time-out time
Standby Mode
tto_bus
0.8
Min. dominant time for bus
8.8
wake-up
Standby mode
twake
0.75
3
8.9
Delay time for standby to
normal mode transition
Falling edge at pin STBY
NSIL = HIGH
tdel((stby-norm)
47
µs
A
8.10
Delay time for normal mode Rising edge at pin STBY
to standby mode transition NSIL = HIGH
tdel(norm-stby)
5
µs
D
8.11
Delay time for normal mode Falling edge at pin NSIL
to silent mode transition
STBY = LOW
tdel(norm-sil)
10
µs
D
8.12
Delay time for silent mode to Rising edge at pin NSIL
normal mode transition
STBY = LOW
tdel(sil-norm)
10
µs
D
8.13
Delay time for silent mode to Rising edge at pin STBY
standby mode transition
NSIL = LOW
tdel(sil-stby)
5
µs
D
8.14
Delay time for standby mode Falling edge at pin STBY
to silent mode transition
NSIL = LOW
tdel(stby-sil)
47
µs
D
ns
D
Debouncing time for
8.15 recessive clamping state
detection
V(CANH-CANL) > 900mV
RXD = HIGH
tRC_det
90
Transceiver Timing for higher Bit Rates, Pins CANH, CANL, TXD, and RXD, see Figure 6-1 and Figure 6-3 on page 13
8.16
Recessive bit time on pin
RXD
Normal mode, tBit(TXD) = 500ns
tBit(RXD)
400
550
ns
D
Normal mode, tBit(TXD) = 200ns
tBit(RXD)
120
220
ns
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1.
Only for Atmel ATA6560; otherwise the values are part of the VCC pin specification.
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
11
Figure 6-1. Timing Test Circuit for the Atmel ATA6560/ATA6561 CAN Transceiver
+5V
+
22µF
100nF
5
VIO/NSIL
1
TXD
3
VCC
CANH
7
RL
4
RXD
GND
15pF
2
CANL
CL
6
STBY
8
Figure 6-2. CAN Transceiver Timing Diagram
HIGH
TXD
LOW
CANH
CANL
dominant
0.9V
VO(dif) (bus)
0.5V
recessive
HIGH
0.7VIO
RXD
0.3VIO
LOW
td(TXD-busdom)
td(TXD-busrec)
td(busdom-RXD)
tPD(TXD-RXD)
12
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
td(busrec-RXD)
tPD(TXD-RXD)
Figure 6-3. Can Transceiver Timing Diagram for Loop Delay Symmetry
70%
TXD
30%
30%
5 x tBit(TXD)
tBit(TXD)
tLoop,
falling edge
RXD
70%
30%
tLoop,
tBit(RXD)
rising edge
Note:
The bit time of a recessive bit after five dominant bits is measured on the RXD pin.
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
13
7.
Application Circuits
Figure 7-1. Typical Application Circuit Atmel ATA6561
3.3V
BAT
12V
100nF
VIO
Microcontroller
TXD
RXD
5V
12V
VCC
5
VDD
STBY
22µF(1)
100nF
+
3
7
CANH
CANH
8
1
ATA6561
4
6
GND
CANL
CANL
2
GND
GND
(1) The size of this capacitor depends on the used external voltage regulator.
Figure 7-2. Typical Application Circuit Atmel ATA6560
5V
22µF
(1)
+
BAT
12V
100nF
VCC
VDD
STBY
NSIL
Microcontroller
TXD
RXD
GND
8
3
7
CANH
5
ATA6560
1
4
6
CANL
(1) The size of this capacitor depends on the used external voltage regulator.
14
For DFN8 package: Heat slug must always be connected to GND.
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
CANL
2
GND
Note:
CANH
GND
8.
Ordering Information
Extended Type Number
Package
Remarks
ATA6560-GBQW
DFN8
CAN transceiver, Pb-free, 6k, taped and reeled
ATA6560-GAQW
SO8
CAN transceiver, Pb-free, 4k, taped and reeled
ATA6561-GBQW
DFN8
CAN transceiver, Pb-free, 6k, taped and reeled
ATA6561-GAQW
SO8
CAN transceiver, Pb-free, 4k, taped and reeled
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
15
9.
Package Information
Figure 9-1. SO8
E1
L
A
b
A2
A1
C
D
e
8
E
5
technical drawings
according to DIN
specifications
Dimensions in mm
1
4
COMMON DIMENSIONS
Pin 1 identity
(Unit of Measure = mm)
Symbol
MIN
NOM
MAX
A
1.5
1.65
1.8
A1
0.1
0.15
0.25
A2
1.4
1.47
1.55
D
4.8
4.9
5
E
5.8
6
6.2
E1
3.8
3.9
4
L
0.4
0.65
0.9
C
0.15
0.2
0.25
b
0.3
0.4
0.5
e
NOTE
1.27 BSC
05/08/14
TITLE
Package Drawing Contact:
[email protected]
16
Package: SO8
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
GPC
DRAWING NO.
REV.
6.543-5185.01-4
1
Figure 9-2. DFN8
Top View
D
8
E
PIN 1 ID
technical drawings
according to DIN
specifications
1
A
A3
A1
Dimensions in mm
Side View
Partially Plated Surface
Bottom View
4
COMMON DIMENSIONS
E2
1
Z
(Unit of Measure = mm)
Symbol
MIN
NOM
MAX
A
0.8
0.85
0.9
e
A1
A3
0
0.16
0.035
0.21
0.05
0.26
D2
D
2.9
3
3.1
D2
2.3
2.4
2.5
E
2.9
3
3.1
E2
1.5
1.6
1.7
L
0.35
0.4
0.45
b
e
0.25
0.3
0.65
0.35
8
5
L
Z 10:1
NOTE
b
10/11/13
TITLE
Package Drawing Contact:
[email protected]
Package: VDFN_3x3_8L
Exposed pad 2.4x1.6
GPC
DRAWING NO.
REV.
6.543-5165.03-4
1
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
17
10.
Revision History
Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this
document.
Revision No.
History
Parameter 6.2 in Section 6 “Electrical Characteristics” on page 9 updated
9288J-AUTO-04/15
18
Parameter 6.4 and 6.5 in Section 6 “Electrical Characteristics” values for standby mode
on page 10 added
ATA6560/ATA6561 [DATASHEET]
9288J–AUTO–04/15
XXXXXX
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