AT73C202 - Mature

Features
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300mA/1.8V/2.5V Switching Regulator for Baseband Supply
2.8V/80mA LDO for Baseband Pad Supply
Two 130mA/2.8V Low-noise, High PSRR RF LDO Voltage Regulators
130mA/2.7V/2.8V Baseband Low-noise, High PSRR Analog LDO Regulator
Ultra Low-power RTC LDO Voltage Regulator
Backup Battery Charger
Li-Ion or Li-polymer Battery Charger Controller
Buzzer and Vibrator Drivers
Charging LED Driver
Power Management Start-up Controller and Reset Generation
SIM Level Shifters and SIM 10mA/1.8V/2.8V LDO Voltage Regulator
Ultra-low Sleep Mode Current Consumption (17 µA typ)
Over and Under Voltage Protections
Over Temperature Protection
Low-power Mode and Sleep Mode
Straight and Easy Interfacing to any Baseband Controller
Small 5x5mm, Forty-nine Ball FBGA Package
Description
The AT73C202 is a low-cost, ultra low-power, power and battery management IC
designed to interface directly with state-of-the-art cellular phones, for example with
2.5G GSM phones. It includes all required power supplies tailored to be fully compatible with the sub-systems of recent mobile phone chipsets, including the RF, analog
and digital (DSP, microcontroller, memories) sections.
The AT73C202 integrates a step-down DC-DC converter that supplies 300 mA with
internal switches and two levels of voltage programming for the baseband core (1.8V
and 2.5V). A low-power mode is available in order to minimize standby current consumption during the “quiet” transmission periods.
In addition, the AT73C202 includes a lowcost battery charger, using a simple external
PNP transistor for Li-Ion or Li-Polymer batteries. Battery operating conditions are
maintained within safe limits under hardware control during the start-up procedure
(when the phone is turned on or a charger is plugged in). The battery pre-charge is
also integrated and self-operated by the AT73C202. On completion the fast charge
and end-of-charge procedure is transferred to the baseband software.
Power
Management for
Mobiles (PM)
AT73C202
Power and
Battery
Management
Unit for Cellular
Phone
Preliminary
The AT73C202 integrates 7 low-dropout linear regulators specifically designed to supply RF (x2), analog, memories, etc. It also includes a back-up battery charger and an
ultra low-power regulator dedicated to the baseband real-time clock (RTC) supply during sleep mode.
The hardwired start-up mechanism (power management controller state machine)
ensures safe telephone operation during the wake-up and shut-down procedures, and
during the multiple real-life operating conditions of a mobile phone (such charger plugin, plug-out, battery plug-in, plug-out, low or dead battery, etc.).
The AT73C202 is packaged into a 49 ball (7x7 matrix), 0.65mm pitch, 5mm x 5mm
outline FBGA package.
2740B–PMGMT–05/03
1
Functional Diagram
Figure 1. AT73C202 Functional Diagram
D3
GATE-CHG
D2
CHG-IN
VBAT
CHG
Charger
Controller
C3
C1
F5
E5
D4
FLASH-LED
AA-GND
Reset
Generator
BB1
EN
DC-DC
Converter
1.8V/2.5V
300mA
EN
I/O PAD LDO
2.8V/130mA
ECO-MODE
EN-ANA-B
UP-ON-OFF
C6
EN
A5
A3
B2
Analog LDO
2.7V/2.8V/130mA
VIN-REG2
A-GND
V-BCK
BAT-RTC
VIN > 2.6V
C7
GND-REG1
A-VCC
DC-ON
D6
V-CORE
V-PAD
ON-OFF
D5
RES-B
LX
VIN-REG1
B5
D1
CREF
VREF
EN
D7
V-RTC
VCC-RTC
1.5V/0.5mA
VIN-RF
V-RF1
EN-RF1
RF1 LDO
2.8V/130mA
EN-RF2
RF2 LDO
2.8V/130mA
VIN-VIB
EN-VIB
E6
C5
G1
E4
F3
2
GND-RF
V-VIB
VIBRATOR LDO
2.8V/130mA
BUZ-OUT
BUZ-GND
D-VCC
SIM-EN
SIM-1V8/2V8
SIM-VCC
F7
G4
G7
B6
B4
A7
A6
B7
B1
A1
A2
E7
B3
CLK-IN
A4
E3
SIM LDO
1.8V/2.8V/10mA
RESET-IN
DATA-IO
G2
F6
BUZ-IN
G3
F4
C2
2.4V/2.7V/2mA
V-RF2
C4
E1
D-GND
BAT-VOLT
G6
G5
LED-OUT
SIM-RST
SIM Level Shifter
SIM-CLK
SIM-IO
F1
F2
E2
AT73C202
2740B–PMGMT–05/03
AT73C202
Pin Description
Table 1. AT73C202 Pin Description
Signal
Ball
Type
Description
Charger Block
CHG-IN
D2
Power Supply
AC/DC Adapter Input
GATE-CHG
D3
O
External PNP control output
CHG
C3
I
Charger command from Base Band chip
DC-ON
D6
O
AC/DC Adapter detector output
BAT-VOLT
F5
O
Resistance Divider output
FLASH-LED
C1
I
Flash LED input
LED-OUT
C2
O
LED output (Charging phase indicator)
VBAT (VBAT1)
E1
Power Supply
Battery Charger
Power On Block
ON-OFF
D5
I
Key ON/OFF input
UP-ON-OFF
C6
I
Hold the Power ON from Base Band chip
RES-B
F6
O
Reset Open collector Output
AA-GND
E5
Ground
Analog ground
Baseband Supply Block
VIN-REG1 (VBAT2)
G6
Power Supply
Input supply for DC/DC converter
LX
F7
O
DC/DC converter Output Inductor
ECO-MODE
G5
I
DC/DC converter Output (Base Band chip Core supply)
V-CORE
G4
O
DC/DC converter Output (Base Band chip Core supply)
GND-REG1
G7
Ground
VIN-REG2 (VBAT3)
A5
EN-ANA-B
B5
I
Enable the Analog LDO
A-VCC
B4
O
Analog LDO Output (Base Band chip Analog supply)
A-GND
A7
Ground
V-PAD
B6
O
Digital LDO Output (Base Band chip Digital PAD supply)
V-RTC
B7
O
Base Band RTC supply output
V-BCK
A6
O
Back-up Battery RTC charger
Ground of DC/DC Converter
Input supply for Base Band LDO
Ground of A-VCC, V-PAD and RTC LDO
RF Supply Block
VIN-RF (V BAT4)
A3
Power Supply
EN-RF1
B2
I
Enable LDO RF1
EN-RF2
C4
I
Enable LDO RF2
V-RF1
B1
O
RF1 LDO Output
GND-RF
A2
Ground
V-RF2
A1
O
Input supply for RF LDO
Ground of RF1 & RF2 LDO
RF2 LDO Output
3
2740B–PMGMT–05/03
Table 1. AT73C202 Pin Description (Continued)
Signal
Ball
Type
Description
Vibrator and Buzzer Driver Block
VIN-VIB (VBAT5)
D7
Power Supply
EN-VIB
E6
I
Vibrator driver input (from Base Band chip)
V-VIB
E7
O
Vibrator LDO Output
BUZ-IN
C5
I
Buzzer driver input (from Base Band chip)
BUZ-OUT
B3
O
Buzzer output (connected to the buzzer)
BUZ-GND
A4
Ground
Input Vibrator LDO
Ground of Buzzer Output
SIM Interface Block
D-VCC
G1
Power Supply
Digital supply for SIM Base Band chip Interface
SIM-EN
G3
I
Input to Power ON the SIM
SIM-1V8/2V8
F4
I
Input to select the SIM Level (1.8V or 2.8V)
RESET-IN
E4
I
Reset Input from base band chip
CLK-IN
F3
I
Clock Input from base band chip
DATA-IO
G2
IO
Data Input/Output from base band chip
SIM-VCC
E3
O
SIM Power Supply (1.8V or 2.8V)
SIM-RST
F1
O
SIM Reset Output
SIM-CLK
F2
O
SIM Clock Output
SIM-IO
E2
IO
SIM Data Input/Output
Miscellaneous
CREF
C7
IO
D-GND
D1
Ground
BB1
D4
I
4
Band gap decoupling
Ground for Digital (Charger, SIM & Vibrator)
Chip Configuration:
BB1 = 0: First Platform
BB1 = 1: Second Platform
AT73C202
2740B–PMGMT–05/03
AT73C202
Application Schematic
Figure 2. AT73202 Application Schematic
T001
Charging
Device
VBATTERY
Protection
Circuit
D3
GATE-CH
BB1
Reset
Generator
G6
VIN-REG1
G5
ECO-MODE
EN
B5
C012
VBATTERY
UP-ON-OFF
D6
DC-ON
EN
I/O PAD LDO
2.8V/130mA
EN
Analog LDO
2.7V/2.8V/130mA
VIN-REG2
C7
CREF
A3
VIN-RF
VREF
EN
G4
GND-REG1
G7
V-PAD
B6
A-VCC
B4
A-GND
A7
V-BCK
A6
V-RTC
B7
V-RF1
B1
V-RF2
A1
GND-RF
A2
V-VIB
E7
BAT-RTC
2.4V/2.7V/2mA
RTC LDO
EN-RF1
C4
EN-RF2
RF2 LDO
2.8V/130mA
D7
VIN-VIB
EN-VIB
C5
BUZ-IN
G1
D-VCC
G3
SIM-EN
F4
SIM-1V8/2V8
E4
RESET-IN
F3
CLK-IN
G2
DATA-IO
C011
C002
LOGIC
Periphery
Supply
ANALOG
Supply
BUZ-OUT
SIM LDO
1.8V/2.8V/10mA
SIM Level Shifter
and
Regulator 1.8V/2.8V
Backup
Battery
R003
VIBRATOR LDO
2.8V/130mA
BUZ-GND
VCORE or
VPAD
L001
VCC-RTC
1.5V/0.5mA
RF1 LDO
2.8V/130mA
E6
V-CORE
VPAD
LOGIC
Core
Supply
C015
C6
B2
F7
B3
A4
RTC
Supply
RF1
Supply
C006
ON-OFF
VIN>2.6V
C013
LX
EN-ANA-B
D5
A5
DC-DC
Converter
1.8V/2.5V
300mA
RES-B
to Logic Reset
Input
R002
RF2
Supply
C010
D4
F6
Battery
Pack
R001
C007
AA-GND
C2
D1
D-GND
VIB
32 Ohm
BUZZER
VBATTERY
SIM-VCC
E3
SIM-RST
F1
SIM-CLK
F2
SIM-IO
E2
C009
BAT-VOLT
LED-OUT
C008
F5
E5
Charger
Controller
C001
FLASH-LED
E1
C003
C014
VBATTERY
CHG
C1
VBAT
C004
V-BCK
CHG-IN
C3
C005
C016
D2
SIM-VCC
5
2740B–PMGMT–05/03
External Components Specifications
Table 2. External Component Specifications
Symbol
Parameters
R001
4.7 kΩ, 1/8 W, 0603
R002
4.7 kΩ, 1/8 W, 0603
R003
2 kΩ, 1/8 W, 0603
C001, C003, C004, C005, C006, C007, C010,
C012
2.2µF - X5R 6.3V/10%, 0603
C002
22 µF Tantale R, TYPEA
C009, C011, C015
220 nF - X5R 10V/10%, 0603
C008, C013, C016
10 nF - X5R 10V/10%, 0402
C014
10 µF - X5R 6.3V/10%
L001
10 µH
T001
FMMT593 SOT23 PNP
6
AT73C202
2740B–PMGMT–05/03
AT73C202
Power ON Control Block
This block generates the Power ON and Power OFF for the AT73C202. Power ON is
activated when one of these conditions is true:
•
The AC/DC Charger is plugged (CHG-IN input): the DC-ON pin is then set to high
level
•
ON/OFF Key is set to high level, which sets the ON-OFF pin to high level
•
UP-ON/OFF is set to high level
To achieve all Power ON, the conditions below must be true:
•
Battery must be higher than normal operating voltage (VBATTERY > 3.2V)
•
Thermal protection is right (TJ < 120°C)
When the ON/OFF Key is pressed (tied to VBAT), the POWER-EN goes to high level and
activates the Base Band Chip Core Supply. As the Base Band Chip detects the
ON/OFF, it must drive UP-ON/OFF to high level in order to maintain the POWER-EN at
high level and the ON/OFF key can be released. When the ON/OFF key is pressed
again to power off, the base band chip releases the UP-ON/OFF pin to low level.
Note that UP-ON/OFF can also be generated as a wake-up alarm when the phone is in
OFF mode (the UP-ON/OFF pin is supplied by the back-up battery on V-RTC (1.0V to
1.8V).
Charger Controller Block There are three specific phases of battery charging:
•
Pre-charge when VBAT < 3.2V with 50 mA pulsed current stopped by either software
or hardware if VBAT > 3.6V or the software crashes.
•
Fast charge with CO current by software
•
Pulse charging with C O current for end of charge by software.
Note: CO equals 600 mA when the battery capacity equals 600mAH.
Fast charging and pulse charging use only one switch. The pre-charging will be done
using a pulse charging CO during 100 ms each second.
Pre-charging Phase
When the Base Band Chip is powered OFF and battery voltage is under 3.2V, the
charge must be performed by the AT73C202. To ensure no damage occurs, the current
is limited to 50 mA or nominal capacity divided by 10 (CO / 10).
When the base band chip is powered ON and sets CHG at high level the pre-charge
phase is finished.
In case of a software crash after power on, a watchdog timer of 10s will set the RES-B to
"0" and turn off the device.
Pulse & Fast charging
In this phase, the base band chip controls the charge through the CHG pin and monitors
the battery voltage and temperature through BAT-VOLT on the AT73C202 and temperature through any available temperature sensor in the battery pack.
When Battery voltage is under 4.1V, the charger is always active (CHG is high level). As
soon as battery voltage exceeds 4.1V, the software enters into a pulse charging phase.
The pulse charging stops when battery voltage reaches 4.2V.
FLASH-LED Description
During the pre-charging phase, the phone is OFF. To indicate the pre-charging is currently running, a LED driver (LED-OUT, open drain) is turned on every second for
100ms. During the fast charge and pulse charging, the Baseband can control the LED
driver through the FLASH-LED pin.
7
2740B–PMGMT–05/03
Absolute Maximum Ratings
Operating Temperature (Industrial).......-40°C to +85°C
*NOTICE:
Storage Temperature............................-55°C to + 150°C
Power Supply Input
VBAT and VIN-REGX Pins .........................-0.3V to +6.5V
Power Supply Input CHG-IN.................... ....-0.3V to +8V
Stresses beyond those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or other conditions beyond those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
I/O Input (all except to power supply) . -0.3V to VMAX+0.3
Recommended
Operating Conditions
Table 3. Recommended Operating Conditions
Parameter
Conditions
Operating Temperature
Min
Maw
Unit
-40
85
°C
Power Supply Input
VBAT and V IN-REGX pins
3.0
4.5
V
Power Supply Input
CHG-IN
4.6
5.5
V
Power Supply Current
Consumption
Table 4. Power Supply Current Consumption on VBAT (Fully Charged Backup Battery)
Mode
Condition
Typ
Max
Unit
MODE1 (sleep)
1.2V < VBAT < 2.5V
6.8
8
µA
MODE2 (sleep)
2.5 V <VBAT < 3.2 V
17
28.4
µA
MODE3 (sleep)
3.2 V < VBAT < 4.6 V and Power
OFF
17
28.4
µA
3.2 V < VBAT < 4.6 V and Power
ON
57.5
81.4
µA
MODE4 (standby)
(Idle without RX or TX burst)
8
AT73C202
2740B–PMGMT–05/03
AT73C202
Electrical
Characteristics
Charger Interface
General conditions unless otherwise noted: VIN = V IN(min) to VIN(max), TAMB = -40°C to
+85°C
Table 5. Charger Interface Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
25
30
45
mA
60
80
100
ms
0.9
1
1.1
s
5.5
V
GATE-CHG External Transistor
ISINK
Sink Current
Internal Timer Source (second solution)
TON
ON Time
T
Period
External Transistor is Closed
CHG-IN Input Supply
VIN
Input Voltage
V-CORE DC to DC
4.6
TAMB = -20°C to 85°C, VBAT = 3V to 4.2V unless otherwise specified.
COUT = 22 µF Tantalum, LOUT = 10 µH.
Table 6. V-CORE(1) DC to DC Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Output Voltage
PWM Mode
(BB1 = 1, ECO-MODE = 0)
1.80
1.90
2.0
V
VOUT
Output Voltage
PWM Mode
(BB1 = 1, ECO-MODE = 0)
2.45
2.50
2.55
V
IOUT (1)
Output Current
PWM Mode
(ECO-MODE = 0)
150
300
mA
IOFF
Standby Current
0.1
1
µA
EFF
Efficiency
IOUT = 10 mA to 200 mA @1.9V
90
%
∆VDCLD
Static Load Regulation
PWM Mode (10% to 90% of
IOUT(MAX)
50
mV
∆VTRLD
transient Load Regulation
PWM Mode (10% to 90% of
IOUT(MAX),TR = TF = 5µs
50
mV
∆VDCLE
Static Line Regulation
PWM Mode (10% to 90% of
IOUT(MAX), 3.2V to 4.2V)
20
mV
∆VTRLE
transient Line Regulation
PWM Mode (10% to 90% of
IOUT(MAX), 3.2V to 4.2V)
35
mV
VOUT
Output Voltage
LDO Mode
(BB1 = 0, ECO-MODE = 1)
1.75
1.85
1.95
V
VOUT
Output Voltage
LDO Mode
(BB1 = 1, ECO-MODE = 1)
2.35
2.40
2.45
V
IOUT
Output Current
LDO Mode (ECO-MODE = 1)
10
mA
VDROP
Dropout Voltage
LDO Mode (ECO-MODE = 1)
400
mV
VOUT
(1)
9
2740B–PMGMT–05/03
Table 6. V-CORE(1) DC to DC Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
IQC
Quiescent Current
LDO Mode (ECO-MODE = 1)
∆VDCLD
Static Load Regulation
∆VTRLD
Typ
Max
Unit
11
14
µA
LDO Mode (0 to 10 mA)
50
mV
transient Load Regulation
LDO Mode (0 to 10 mA),
TR = TF = 5µs
10
mV
∆VDCLE
Static Line Regulation
LDO Mode (3.2V to 4.2V)
8
mV
∆VTRLE
transient Line Regulation
LDO Mode (3.2V to 4.2V)
15
mV
PSRR
Ripple Rejection
LDO Mode up to 1 KHz
∆VLPFP
Overshoot Voltage
Voltage drop from LDO (LP) to
DC-DC(FP)
∆VFPLP
Undershoot Voltage
Voltage drop from DC-DC (FP) to
LDO (LP)
Note:
Min
40
45
0
-15
dB
10
0
mV
mV
1. VOUT and IOUT refer to V-CORE.
Table 7. V-CORE DC to DC External Components
Symbol
Parameter
COUT
Output Capacitor Value
CESR
Output Capacitor ESR
LOUT
Output Inductor Value
LESR
Output Inductor ESR
10
Conditions
Min
Typ
Max
Unit
17
22
26
µF
100
mΩ
12
µH
1.1
Ω
8
At 100 KHz
10
AT73C202
2740B–PMGMT–05/03
AT73C202
A-VCC – Analog
TAMB = -20°C to 85°C, VBAT = 3V to 4.2V unless otherwise specified.
Table 8. A-VCC(1)– Analog Electrical Characteristics
Symbol
Parameter
Conditions
VBAT
Operating Supply Voltage
All VIN, All T °C, Line, Load
Output Voltage
BB1 = 0
2.65
VOUT
Output Voltage
BB1 = 1
2.75
VINT
Internal Supply Voltage
IOUT (1)
Output Current
IQC
Quiescent Current
DVOUT
Line Regulation
VBAT: 3V to 3.4V, IOUT = 130 mA
3
mV
DVPEAK
Line Regulation Transient
Same as above, TR = TF = 5 µs
4
mV
DVOUT
Load Regulation
10% - 90% IOUT, VBAT = 3V
10
mV
10% - 90%IOUT, VBAT = 5.0V
15
mV
10% - 90% IOUT, VBAT = 5.5V
15
mV
VOUT
(1)
Min
Typ
Max
Unit
5.5
V
2.7
2.75
V
2.80
2.85
V
2.6
V
80
130
mA
195
236
µA
3
2.4
DVPEAK
Load Regulation Transient
Same as above, TR = TF = 5 µs
15
mV
PSRR
Ripple rejection
F = 217Hz – VBAT = 3.6V
70
dB
VN
Output Noise
BW: 10 Hz to 100 kHz
29
µVRMS
TR
Rise Time
100% IOUT, 10% - 90% VOUT
TF
Fall Time
ISD
Shut Down Current
Note:
50
µs
1
µA
1. VOUT and IOUT refer to A-VCC.
Table 9. A-VCC – Analog External Components
Symbol
Parameter
COUT
Output Capacitor Value
CESR
Output Capacitor ESR
Conditions
100 KHz
Min
Typ
Max
Unit
1.98
2.2
2.42
µF
50
mΩ
11
2740B–PMGMT–05/03
V-PAD – PAD Supply
TAMB = -20°C to 85°C, VBAT = 3V to 4.2V unless otherwise specified.
Table 10. V-PAD(1)– PAD Supply Electrical Characteristics
Symbol
VOUT
IOUT
Parameter
(1)
Conditions
Output Voltage Full Power Mode
(1)
Min
Typ
Max
Unit
2.74
2.8
2.86
V
50
80
mA
10
mA
Output Current Full Power Mode
IOUT
Output Current Low Power Mode
IQC
Quiescent Current FP Mode
25
30
36
µA
IQC
Quiescent Current LP Mode
9.75
11.5
13.75
µA
DVOUT
Line Regulation FP Mode
1
mV
DVPEAK
Line Regulation Transient FP Mode VBAT: from 5V to 5.4V and from 3.4V
to 3V, IOUT = 80 mA,
TR = TF = 5 µs
3
mV
DVOUT
Line Regulation LP Mode
3
mV
DVPEAK
Line Regulation Transient LP Mode VBAT: from 5V to 5.4V and from 3.4V
to 3V, IOUT = 5 mA,
TR = TF = 5 µs
4
mV
DVOUT
Load Regulation FP Mode
5
(4 at 5.5V)
mV
DVPEAK
Load Regulation Transient FP Mode from 0 to IOUT(MAX) & from 90% to
10% IOUT(MAX), TR = TF = 5 µs,
VBAT = 3.4V
23
mV
DVOUT
Load Regulation LP Mode
from 0 to 80mA & from 90% to 10%
IOUT(MAX), VBAT = 3.4V
5
(10 at 5.5V)
mV
PSRR
Ripple Rejection
F = 217Hz
VN
Output Noise FP mode
BW: 10 Hz to 100 kHz
80
µVRMS
VN
Output Noise LP Mode
BW: 10 Hz to 100 kHz
300
µVRMS
TR
Rise Time FP
IOUT = IOUT(MAX)
70
130
µs
TR
Rise Time LP
IOUT = IOUT(MAX)
50
170
µs
ISD
Shut Down Current
1
µA
VBAT
Operating Supply Voltage
5.5
V
VSAUV
Internal Operating Supply Voltage
2.8
2.86
V
ISC
Short Circuit Current
50
80
mA
Min
Typ
Max
Unit
1.98
2.2
2.42
µF
50
mΩ
Note:
VBAT: 3.4V to 3V, IOUT = 80 mA
VBAT: 3.4V to 3V, IOUT = 5 mA
from 0 to 80mA & from 90% to 10%
IOUT(MAX), V BAT = 3.4V
40
45
3
2.74
dB
1. VOUT and IOUT refer to V-PAD.
Table 11. V-PAD – PAD Supply External Components
Symbol
Parameter
COUT
Output Capacitor Value
CESR
Output Capacitor ESR
12
Conditions
100 KHz
AT73C202
2740B–PMGMT–05/03
AT73C202
Backup Battery LDO
(V-BCK)
TAMB = -20°C to 85°C, VBAT = 3V to 4.2V unless otherwise specified.
Table 12. Backup Battery LDO (V-BCK)(1) Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOUT
(1)
Output Voltage
BB1 = 0
2.4
2.45
2.50
V
VOUT
(1)
Output Voltage
BB1 = 1
2.65
2.7
2.75
V
2
5
mA
50
mV
9.7
µA
IOUT
(1)
Output Current
VDROP
Dropout Voltage
IQC
Quiescent Current
PSRR
Ripple Rejection
TR
Rise Time
Note:
4.8
6.6
40
110
dB
320
µs
1. VOUT and IOUT refer to V-BCK.
Table 13. Backup Battery LDO (V-BCK) External Components
Symbol
Parameter
COUT
Output Capacitor Value
CESR
Output Capacitor ESR
RTC LDO
(V-RTC)
Conditions
Min
Typ
Max
Unit
1.98
2.2
2.42
µF
100
mΩ
100 KHz
TAMB = -20°C to 85°C, VBAT = 3V to 4.2V unless otherwise specified.
Table 14. RTC LDO (V-RTC)(1) Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Output Voltage
BB1 = 0
1.45
1.50
1.55
V
Output Current
0.5
mA
VDROP
Dropout Voltage
50
mV
IQC
Quiescent Current
6.6
9.7
µA
ISD
Shutdown Current
0.1
1
µA
PSRR
Ripple Rejection
40
TR
Rise time
VOUT
(1)
BB1 = 1 (not used)
IOUT
(1)
Note:
4.8
110
dB
320
µs
1. VOUT and IOUT refer to V-RTC
Table 15. RTC LDO (V-RTC) External Components
Symbol
Parameter
COUT
Output Capacitor Value
CESR
Output Capacitor ESR
Conditions
100 KHz
Min
Typ
Max
Unit
198
220
242
nF
100
mΩ
13
2740B–PMGMT–05/03
RF LDOs (V-RF1
and V-RF2)
Table 16. RF LDOs (V-RF1 and V-RF2)(1) Electrical Characteristics
Symbol
Parameter
Conditions
VBAT
Operating Supply Voltage
All VIN, All T°C, Line, Load
VINT
Min
Typ
3
Max
Unit
5.5
V
Operating Internal Supply Voltage
2.4
2.5
2.6
V
Output Voltage
2.74
2.8
2.86
V
Output Current
80
130
mA
IQC
Quiescent Current
195
236
µA
DVOUT
Line Regulation
VBAT: 3V to 3.4V, IOUT = 130 mA
3
2
mV
DVPEAK
Line Regulation Transient
Same as above, TR = TF = 5 µs
4
2.85
mV
DVOUT
Load Regulation
10% - 90% IOUT, VBAT = 3V
10
1
mV
10% - 90% IOUT, VBAT = 5.0V
15
1
mV
10% - 90% IOUT, VBAT = 5.5V
15
1
mV
1.2
2.4
mV
VOUT
IOUT
(1)
(1)
DVPEAK
Load Regulation Transient
Same as above, TR = TF = 5 µs
PSRR
Ripple Rejection
F=217Hz – VBAT = 3.6V
VN
Output Noise
BW: 10 Hz to 100 kHz
TR
Rise Time
100% IOUT, 10% - 90% VOUT
ISD
Note:
70
73
29
Shut Down Current
dB
37
µVRMS
50
µs
1
µA
1. VOUT and IOUT refer to V-RF1/V-RF2.
Table 17. RF LDOs (V-RF1 and V-RF2) External Components
Symbol
Parameter
COUT
Output Capacitor Value
CESR
Output Capacitor ESR
14
Conditions
100 KHz
Min
Typ
Max
Unit
1.98
2.2
2.42
µF
50
mΩ
AT73C202
2740B–PMGMT–05/03
AT73C202
Buzzer Open Drain
General Conditions (unless otherwise noted): VIN = V IN(min) to VIN(max), TA = -40°C to
+85°C
Table 18. Buzzer Open Drain Electrical Characteristics(1)
Symbol
Parameter
Conditions
VOL(1)
Low Output Voltage
IOL = 100 mA
(1)
IOL
TON
(1)
TOFF
(1)
Note:
Min
Typ
Max
Unit
0.4
V
Low Output Current
100
mA
Turn-on Time
10
µs
Turn-off Time
10
µs
1. VOL, IOL, IOH, TON and TOFF refer to Buz-Out.
Vibrator
General Conditions (unless otherwise noted): VIN = V IN(min) to VIN(max), TA = -40°C to
+85°C, COUT = 2.2µF to Y5V.
Table 19. Vibrator Electrical Characteristics(1)
Symbol
VOUT
IOUT
(1)
(1)
VDROP
IQC
Note:
Parameter
Output Voltage
Output Current
Conditions
Min
Typ
Max
Unit
2.74
2.80
2.86
V
100
Dropout Voltage
Quiescent Current
195
mA
280
mV
236
µA
1. VOUT and IOUT refer to V-VIB.
15
2740B–PMGMT–05/03
Digital Pin Parameters
Conditions: TAMB = -20°C to 85°C, VBAT = 3V to 4.2V unless otherwise specified
Table 20. Digital Pins.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC-ON
VOL
Output Low Voltage
GND
VOH
Output High Voltage
V-PAD
IOH
Output Current
1
mA
IOL
Output Current
1
mA
IOH
Leakage Current
1
µA
ON/OFF
VIH
High input voltage
IIH(Max) = 20 µA
VIL
Low input voltage
IIL(Max) = 20 µA
IIL
IIH
0.7x VBAT
VBAT
GND
V
0.3 x VBAT
V
Low input current
0.1
µA
High input current
0.1
µA
UP-ON/OFF
VIH
High input voltage
IIH(Max) = 20 µA
VIL
Low input voltage
IIL(Max) = 20 µA
IIL
IIH
0.7x VRTC
V-BCK
GND
V
0.3x VRTC
V
Low input current
0.1
µA
High input current
0.1
µA
ECO-MODE
VIH
High input voltage
VIL
Low input voltage
IIL
Low input current
IIH
High input current
1.5
IIL(Max) = 20 µA
V-PAD
GND
RES-B
V
0.6
V
0.1
µA
0.1
µA
0.2
V
1
µA
1
mA
100
ms
(1)
VOL
Output Low Voltage
IOH
Output Leakage Current
IOL
Output Current
TRESET
Output Delay Time
ISS
Supply Current
4
5
µA
IOFF
Standby Current
0.1
1
µA
GND
0.6
V
IOL=1 mA and VPAD = VPAD(MAX)
0.1
20
CHG
VIL
Input Low Voltage
VIH
Input High Voltage
IIL
Input Low Current
0.1
µA
IIH
Input High Current
0.1
µA
RDOWN
Pull-down resistance
1.8
MΩ
16
1.5
CHG pin
1
V-PAD
1.5
V
AT73C202
2740B–PMGMT–05/03
AT73C202
Table 20. Digital Pins. (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
60
80
100
ms
0.9
1
1.1
s
0.4
V
FLASH-LED & LED-OUT Pins
TON
ON Time
T
Period
VOL
Low Output Voltage
IOL
Low Output Current
5
mA
IOH
Leakage Current
1
µA
VIL
Low Input Voltage
0.4
V
VIH
High Input Voltage
IIL
Input Low Current
0.1
µA
IIH
Input High Current
0.1
µA
RDOWN
Pull-down resistance
1.8
MΩ
External Transistor is closed
IOUT = 5 mA
1.5
FLASH-LED pin
V
1
1.5
0.7 x VCORE
V-PAD
EN-RF1, EN-RF2
VIH
High input voltage
IIH(Max) = 20 µA
VIL
Low input voltage
IIL(Max) = 20 µA
IIL
GND
V
0.3 x VCORE
V
Low input current
0.1
µA
IIH
High input current
0.1
µA
RDOWN
Pull-down resistance
1.8
MΩ
1
1.5
1.5
V-PAD
BUZ-IN
VIH
High Input Voltage
IIH(Max) = 20 µA
VIL
Low Input Voltage
IIL(Max) = 20 µA
IIH
High input current
IIL
RDOWN
GND
V
0.6
V
BUZ-IN pin
0.1
µA
Low input current
BUZ-IN pin
0.1
µA
Pull-down resistance
BUZ-IN pin
1.8
MΩ
1
1.5
1.5
V-PAD
EN_VIB
VIH
High input voltage
IIH(Max) = 20 µA (EN-VIB)
VIL
Low input voltage
IIL(Max) = 20 µA (EN-VIB)
IIL
Low input current
IIH
RDOWN
Note:
GND
V
0.6
V
(EN-VIB)
0.1
µA
High input current
(EN-VIB)
0.1
µA
Pull-down resistance
EN-VIB pin
1.8
MΩ
1
1.5
1. VIN = 1.2V to V PAD(MAX). The reset generator has an open collector output. It is enabled only when VCORE is active.
17
2740B–PMGMT–05/03
SIM Interface
Conditions are DVCC = 1.8V or 2.8V, tA = -40°C to +85°C, C DVCC = 100 nF, CSIM-VCC =
100 nF
Table 21. SIM Interface Electrical Characteristics.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Power Supply
DVCC
Digital Supply Voltage
Mandatory
IDVCC
DVCC Operating Current
CLK_IN at 3.25 MHz
VSIM-VCC
SIM-VCC Output Voltage
ISIM-VCC < 10 mA
SIM-EN = DVCC
SIM-1V8/2V8 = DVCC
VSIM-VCC
SIM-VCC Output Voltage
ISIM-VCC < 10mA
SIM-EN = DVCC
SIM-1V8/2V8 = GND
ISIM-VCC
SIM-VCC Operating Current
ISHDN
1.65
3.0
V
2.5
10
µA
1.71
1.8
1.89
V
2.74
2.8
2.86
V
ISIM-VCC -> SIM card = 0
ISIM-CLK = 3.25 MHz
25
100
µA
Total Shutdown Current
ISIM-VCC + IDVCC with
SIM-EN = GND
0.1
1
µA
IQC
SIM_LDO Quiescent
Current
Low-power Mode
8
9.5
µA
IQC
SIM_LDO Quiescent
Current
Full-power Mode
60
µA
IOUT
Output Current
ISC
Short Circuit Current
10
mA
40
mA
Digital Interface (RESET-IN, CLOCK-IN, DATA-IO)
IIH , IIL
Input current
CLK-IN, RST-IN, SIM-EN, SIM1V8/2V8
-0.1
0.1
µA
IIH
Input current
DATA-IO
-20
20
µA
IIL
Input current
DATA-IO
1
mA
VIH
High input voltage
CLK-IN, RST-IN, DATA-IO,
SIM-EN, SIM-1V8/2V8
VIL
Low input voltage
CLK-IN, RST-IN, DATA-IO,
SIM-EN, SIM-1V8/2V8
VOH
High output voltage
DATA-IO, source current = 20 µA
0.7x
DVCC
V
VOH
High output voltage
DATA-IO, source current = 5 µA
0.8x
DVCC
V
VOL
Low output voltage
DATA-IO, sink current = 200 µA
RDATA-IO
Pull-up resistance
Between DATA-IO and DVCC
TR TF
Rise and fall time
DATA-IO loaded with 30 pF
18
0.7x
DVCC
V
0.3x
DVCC
13
V
0.4
V
20
28
kΩ
1.3
2
µs
AT73C202
2740B–PMGMT–05/03
AT73C202
Table 21. SIM Interface Electrical Characteristics. (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SIM Interface (SIM-RST, SIM-CLK, SIM-DATA)
(1)
VIH
High input voltage
SIM-DATA with IIH(Max) = ± 20 µA
VIL
Low input voltage
SIM-DATA with IIL(Max) = 1 mA
VOH
High output voltage
SIM-DATA, source current = 20 µA
VOL
Low output voltage
SIM-DATA, sink current = 200 µA
VOH
High output voltage
SIM-RST, SIM-CLK with source
current = 20µA (1)
VOL
Low output voltage
SIM-RST, SIM-CLK with sink current
= 200 µA
0.4
V
IIH
High input current
SIM-DATA
20
µA
IIL
Low input current
SIM-DATA
1
mA
VSD
Shutdown output voltage
SIM-DATA, SIM-CLK, SIM-RST,
SIM-VCC with SIM-EN = GND, with
sink current = 200 µA
0.4
V
RSIM-DATA
Pull-up resistance
Between SIM-DATA and SIM-VCC
14
kΩ
T R, T F
Rise and fall time
SIM-DATA, SIM-RST loaded with
50 pF
1
µs
T R, T F
Rise and fall time
SIM-CLK loaded with 50 pF
18
ns
Maximum frequency
SIM-CLK loaded with 50 pF
5
MHz
FSIM-CLK
Note:
0.7xSVCC
V
0.3
(1)
0.8xSVCC
V
0.4
0.9xSVCC
6.5
V
V
V
10
1. SIM-VCC = SVCC
19
2740B–PMGMT–05/03
Package Outline (Top View)
Figure 3. Forty-nine Ball FBGA Package (Top VIew)
1
2
V-RF2
3
GND-RF
VIN-RF
4
5
6
BUZ-GND
VIN-REG2
4
5
7
V-BCK
A-GND
A
1
2
3
EN-RF1
V-RF1
BUZ-OUT
A-VCC
6
EN-ANA-B
7
V-PAD
V-RTC
B
1
2
FLASH-LED
3
LED-OUT
4
CHG
5
EN-RF2
6
BUZ-IN
7
UP-ON-OFF
CREF
C
1
2
D-GND
3
CHG-IN
4
GATE-CHG
5
BB1
6
ON-OFF
7
DC-ON
VIN-VIB
D
1
2
VBAT
3
SIM-IO
4
SIM-VCC
5
RESET-IN
6
AA-GND
7
EN-VIB
V-VIB
E
1
2
SIM-RST
3
SIM-CLK
4
CLK-IN
5
SIM-1V8/2V8
6
BAT-VOLT
7
RES-B
LX
F
1
2
D-VCC
DATA-IO
3
4
SIM-EN
5
V-CORE
ECO-MODE
6
VIN-REG1
7
GND-REG1
G
20
AT73C202
2740B–PMGMT–05/03
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2740B–PMGMT–05/03
0M
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