Download Datasheet

TSX920, TSX921, TSX922,
TSX923
10 MHz rail-to-rail CMOS 16 V operational amplifiers
Datasheet - production data
Applications
Communications
Process control
Test equipment
Description
The TSX92x single and dual operational
amplifiers (op amps) offer excellent AC
characteristics such as 10 MHz gain bandwidth,
17 V/ms slew rate, and 0.0003 % THD+N. These
features make the TSX92x family particularly
well-adapted for communications, I/V amplifiers
for ADCs, and active filtering applications.
Their rail-to-rail input and output capability, while
operating on a wide supply voltage range of 4 V
to 16 V, allows these devices to be used in a
wide range of applications. Automotive
qualification is available as these devices can be
used in this market segment.
Features
Rail-to-rail input and output
Wide supply voltage: 4 V - 16 V
Gain bandwidth product: 10 MHz typ at 16 V
Low power consumption: 2.8 mA typ per
amplifier at 16 V
Unity gain stable
Low input bias current: 10 pA typ
High tolerance to ESD: 4 kV HBM
Extended temperature range:
-40 °C to 125 °C
Automotive qualification
Related products
Shutdown mode is available on the single
(TSX920) and dual (TSX923) versions enabling
an important current consumption reduction while
this function is active.
The TSX92x family is available in SMD packages
featuring a high level of integration. The DFN8
package, used in the TSX922, with a typical size
of 2x2 mm and a maximum height of 0.8 mm
offers even greater package size reduction.
Table 1: Device summary
Op-amp
version
With shutdown
mode
Without
shutdown mode
Single
TSX920
TSX921
Dual
TSX923
TSX922
See the TSX5 series for low-power features
See the TSX6 series for micro-power
features
See the TSX929 series for higher speeds
See the TSV9 series for lower voltages
January 2016
DocID024310 Rev 4
This is information on a product in full production.
1/32
www.st.com
Contents
TSX920, TSX921, TSX922, TSX923
Contents
1
Package pin connections................................................................ 3
2
Absolute maximum ratings and operating conditions ................. 4
3
4
Electrical characteristics ................................................................ 5
Electrical characteristic curves .................................................... 11
5
Application information ................................................................ 17
6
5.1
Operating voltages .......................................................................... 17
5.2
Rail-to-rail input ............................................................................... 17
5.3
Input pin voltage range .................................................................... 17
5.4
Input offset voltage drift over temperature ....................................... 18
5.5
Long term input offset voltage drift .................................................. 18
5.6
Capacitive load................................................................................ 20
5.7
High-side current sensing ............................................................... 21
5.8
High-speed photodiode ................................................................... 22
Package information ..................................................................... 23
6.1
SOT23-5 package information ........................................................ 24
6.2
SOT23-6 package information ........................................................ 25
6.3
MiniSO8 package information ......................................................... 26
6.4
SO8 package information ................................................................ 27
6.5
DFN8 2x2 package information ....................................................... 28
6.6
MiniSO10 package information ....................................................... 29
7
Ordering information..................................................................... 30
8
Revision history ............................................................................ 31
2/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
1
Package pin connections
Package pin connections
Figure 1: Pin connections (top view)
DocID024310 Rev 4
3/32
Absolute maximum ratings and operating
conditions
2
TSX920, TSX921, TSX922, TSX923
Absolute maximum ratings and operating conditions
Table 2: Absolute maximum ratings (AMR)
Symbol
VCC
Parameter
Supply voltage
(1)
Vid
Differential input voltage
Vin
Input voltage
Iin
Tstg
Tj
Rthja
Input current
(2)
(3)
Storage temperature
Maximum junction temperature
Thermal resistance junction to
(4)(5)
ambient
MM: machine model
Unit
18
V
±VCC
mV
(VCC-)- 0.2 to (VCC+) + 0.2
V
10
mA
-65 to 150
HBM: human body model
ESD
Value
150
SOT23-5
250
SOT23-6
240
MiniSO8
190
SO8
125
DFN8 2x2
57
MiniSO10
113
(6)
°C/W
4000
(7)
100
CDM: charged device model
°C
(8)
V
1500
Latch-up immunity
200
mA
Notes:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
All voltage values, except the differential voltage are with respect to network ground terminal.
The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
Input current must be limited by a resistor in series with the inputs.
Rth are typical values.
Short-circuits can cause excessive heating and destructive dissipation.
According to JEDEC standard JESD22-A114F
According to JEDEC standard JESD22-A115A
According to ANSI/ESD STM5.3.1
Table 3: Operating conditions
Symbol
4/32
Parameter
VCC
Supply voltage
Vicm
Common mode input voltage range
Toper
Operating free air temperature range
Value
4 to 16
DocID024310 Rev 4
(VCC-) - 0.1 to (VCC+) + 0.1
-40 to 125
Unit
V
°C
TSX920, TSX921, TSX922, TSX923
3
Electrical characteristics
Electrical characteristics
Table 4: Electrical characteristics at VCC+ = 4.5 V with VCC- = 0 V, Vicm = VCC/2,
Tamb = 25 °C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Vio
Parameter
Input offset voltage
Conditions
Min.
Typ.
Vicm = 2 V (all order codes except
TSX922IYST and TSX922IYDT)
4
Tmin < Top < Tmax
5
Vicm = 2 V (TSX922IYST,
TSX922IYDT order codes only)
5
Tmin < Top < Tmax
∆Vio/∆T
∆Vio
Iib
Input offset voltage drift
Long-term input offset
(1)(2)
voltage drift
Input bias current
Max.
Unit
mV
6.5
All order codes except TSX922IYST
and TSX922IYDT
2
10
TSX922IYST and TSX922IYDT
order codes only
2
15
TSX920/TSX921
6
TSX922/TSX923
9
Vout = VCC/2
10
μV/°C
Tmin < Top < Tmax
nV/√month
100
200
Vout = VCC/2
10
100
pA
Iio
Input offset current
RIN
Input resistance
1
TΩ
CIN
Input capacitance
8
pF
CMRR
Avd
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Large signal voltage gain
Tmin < Top < Tmax
Vicm = -0.1 V to 2 V, VOUT = VCC/2
61
Tmin < Top < Tmax
59
Vicm = -0.1 V to 4.6 V, VOUT = VCC/2
59
Tmin < Top < Tmax
57
RL= 2 kΩ, Vout = 0.3 V to 4.2 V
100
Tmin < Top < Tmax
90
RL= 10 kΩ, Vout = 0.2 V to 4.3 V
100
Tmin < Top < Tmax
90
RL= 2 kΩ tο VCC/2
VOH
High level output voltage
200
82
72
112
50
Tmin < Top < Tmax
RL= 10 kΩ tο VCC/2
VOL
Low level output voltage
10
Tmin < Top < Tmax
DocID024310 Rev 4
16
mV from
VCC+
20
42
Tmin < Top < Tmax
RL= 10 kΩ tο VCC/2
80
100
Tmin < Top < Tmax
RL= 2 kΩ tο VCC/2
dB
108
80
100
9
16
mV
20
5/32
Electrical characteristics
Symbol
Parameter
Isink
Iout
Isource
ICC
GBP
Min.
Typ.
Vout = 4.5 V
16
21
Tmin < Top < Tmax
13
Vout = 0 V
16
Tmin < Top < Tmax
13
No load, Vout = VCC/2
Gain bandwidth product
RL = 10 kΩ, CL = 20 pF, G = 20 dB
Unity gain frequency
ɸm
Phase margin
Gm
Gain margin
SR-
Conditions
Supply current
(per amplifier)
FU
SR+
TSX920, TSX921, TSX922, TSX923
Max.
21
2.9
Tmin < Top < Tmax
mA
3.4
3.5
9
MHz
9.3
RL = 10 kΩ, CL = 20 pF
Unit
60
Degrees
6.7
dB
Positive slew rate
Av = 1, Vout = 0.5 to 4.0 V, measured
between 10 % to 90 %
14.7
Negative slew rate
Av = 1, Vout = 4.0 to 0.5 V, measured
between 90 % to 10 %
17.2
f = 10 kHz
17.9
f = 100 kHz
12.9
8.1
µVpp
0.002
%
en
Equivalent input noise
voltage
∫en
Low-frequency peak-topeak input noise
Bandwidth: f = 0.1 to 10 Hz
THD+N
Total harmonic distortion
+ noise
f = 1 kHz, Av = 1, RL = 10 kΩ,
Vout = 2 Vrms
V/μs
nV√Hz
Shutdown characteristics (TSX920 and TSX923 only)
ICC_shdn
Supply current in
shutdown mode
(per amplifier)
SHDN = VCC-
7
Tmin < Top < Tmax
15
20
ton
Amplifier turn-on time
9
toff
Amplifier turn-off time
0.7
µΑ
µs
Notes:
(1)
Typical value is based on the Vio drift observed after 1000 h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration (see Section 5.5: "Long
term input offset voltage drift").
(2)
When used in comparator mode, with high differential input voltage, during a long period of time with VCC close to 16 V and
Vicm>VCC/2, Vio can experience a permanent drift of a few mV drift. This phenomenon is notably worse at low temperatures.
6/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
Electrical characteristics
Table 5: Electrical characteristics at VCC+ = 10 V with VCC- = 0 V, Vicm = VCC/2,
Tamb = 25 °C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Vio
Parameter
Input offset voltage
Conditions
Min.
Typ.
Vicm = 2 V (all order codes except
TSX922IYST and TSX922IYDT)
4
Tmin < Top < Tmax
5
Vicm = 2 V (TSX922IYST and
TSX922IYDT order codes only)
5
Tmin < Top < Tmax
∆Vio/∆T
∆Vio
Iib
Input offset voltage drift
Long-term input offset
(1)(2)
voltage drift
Input bias current
Max.
Unit
mV
6.5
All order codes except TSX922IYST
and TSX922IYDT
2
TSX922IYST and TSX922IYDT
order codes only
2
TSX920/TSX921
92
TSX922/TSX923
128
Vout = VCC/2
10
10
μV/°C
Tmin < Top < Tmax
15
nV/√month
100
200
Vout = VCC/2
10
100
pA
Iio
Input offset current
RIN
Input resistance
1
TΩ
CIN
Input capacitance
8
pF
CMRR
Avd
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Large signal voltage gain
Tmin < Top < Tmax
200
Vicm = -0.1 V to 7 V, VOUT = VCC/2
72
Tmin < Top < Tmax
70
Vicm = -0.1 V to 10.1 V,
VOUT = VCC/2
64
Tmin < Top < Tmax
62
RL= 2 kΩ, Vout = 0.3 V to 9.7 V
100
Tmin < Top < Tmax
90
RL= 10 kΩ, Vout = 0.2 V to 9.8 V
100
Tmin < Top < Tmax
90
RL= 2 kΩ tο VCC/2
VOH
High-level output voltage
85
75
dB
107
117
94
Tmin < Top < Tmax
130
RL= 10 kΩ tο VCC/2
31
Tmin < Top < Tmax
Low-level output voltage
80
Tmin < Top < Tmax
Iout
Isource
RL= 10 kΩ tο VCC/2
14
40
mV
50
Vout = 10 V
50
Tmin < Top < Tmax
42
Vout = 0 V
75
Tmin < Top < Tmax
70
DocID024310 Rev 4
mV from
VCC+
110
130
Tmin < Top < Tmax
Isink
40
50
RL= 2 kΩ tο VCC/2
VOL
110
55
82
mA
7/32
Electrical characteristics
Symbol
ICC
GBP
TSX920, TSX921, TSX922, TSX923
Parameter
Conditions
Supply current
(per amplifier)
No load, Vout = VCC/2
Gain bandwidth product
RL = 10 kΩ, CL = 20 pF, G = 20 dB
FU
Unity gain frequency
ɸm
Phase margin
Gm
Gain margin
Min.
Typ.
Max.
3.1
3.6
Tmin < Top < Tmax
3.6
10
56
Degrees
6
dB
SR+
Positive slew rate
Av = 1, Vout = 0.5 to 9.5 V,
measured between 10 % to 90 %
17.7
SR-
Negative slew rate
Av = 1, Vout = 9.5 to 0.5 V,
measured between 90 % to 10 %
19.6
f = 10 kHz
16.8
f = 100 kHz
12
en
Equivalent input noise
voltage
∫en
Low-frequency peak-topeak input noise
Bandwidth: f = 0.1 to 10 Hz
THD+N
Total harmonic distortion
+ noise
f = 1 kHz, Av = 1, RL = 10 kΩ,
Vout = 2 Vrms
mA
MHz
11.2
RL = 10 kΩ, CL = 20 pF
Unit
V/μs
nV√Hz
8.64
µVpp
0.0006
%
Shutdown characteristics (TSX920 and TSX923 only)
ICC_shdn
Supply current in
shutdown mode
(per amplifier)
SHDN = VCC-
7
Tmin < Top < Tmax
15
20
ton
Amplifier turn-on time
2.4
toff
Amplifier turn-off time
0.35
µΑ
µs
Notes:
(1)
Typical value is based on the Vio drift observed after 1000 h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration (see Section 5.5: "Long
term input offset voltage drift").
(2)
When used in comparator mode, with high differential input voltage, during a long period of time with VCC close to 16 V and
Vicm>VCC/2, Vio can experience a permanent drift of a few mV drift. This phenomenon is notably worse at low temperatures.
8/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
Electrical characteristics
Table 6: Electrical characteristics at VCC+ = 16 V with VCC- = 0 V, Vicm = VCC/2,
Tamb = 25 °C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Vio
Parameter
Input offset voltage
Conditions
Min.
Typ.
Vicm = 2 V (all order codes except
TSX922IYST and TSX922IYDT)
4
Tmin < Top < Tmax
5
Vicm = 2 V (TSX922IYST and
TSX922IYDT order codes only)
5
Tmin < Top < Tmax
∆Vio/∆T
∆Vio
Iib
Input offset voltage drift
Long-term input offset
(1)(2)
voltage drift
Input bias current
Max.
Unit
mV
6.5
All order codes except TSX922IYST
and TSX922IYDT
2
TSX922IYST and TSX922IYDT
order codes only
2
10
μV/°C
TSX920/TSX921
1.73
TSX922/TSX923
2.26
Vout = VCC/2
10
Tmin < Top < Tmax
15
nV/√month
100
200
Vout = VCC/2
10
100
pA
Iio
Input offset current
RIN
Input resistance
1
TΩ
CIN
Input capacitance
8
pF
CMRR
SVRR
Avd
Common mode rejection
ratio 20 log (ΔVic/ΔVio)
Supply voltage rejection
ratio
Large signal voltage gain
Tmin < Top < Tmax
Vicm = -0.1 V to 13 V, VOUT = VCC/2
73
Tmin < Top < Tmax
71
Vicm = -0.1 V to 16.1 V,
VOUT = VCC/2
67
Tmin < Top < Tmax
65
VCC = 4.5 V tο 16 V
73
Tmin < Top < Tmax
71
RL= 2 kΩ, Vout = 0.3 V to 15.7 V
100
Tmin < Top < Tmax
90
RL= 10 kΩ, Vout = 0.2 V to 15.8 V
100
Tmin < Top < Tmax
90
RL= 2 kΩ tο VCC/2
VOH
High-level output voltage
200
85
76
85
105
113
150
Tmin < Top < Tmax
RL= 10 kΩ tο VCC/2
VOL
Low-level output voltage
43
Tmin < Top < Tmax
DocID024310 Rev 4
50
mV from
VCC+
70
140
Tmin < Top < Tmax
RL= 10 kΩ tο VCC/2
200
230
Tmin < Top < Tmax
RL= 2 kΩ tο VCC/2
dB
200
230
30
50
mV
70
9/32
Electrical characteristics
Symbol
Parameter
Isink
Iout
Isource
ICC
GBP
Min.
Typ.
Vout = 16 V
45
50
Tmin < Top < Tmax
40
Vout = 0 V
65
Tmin < Top < Tmax
60
No load, Vout = VCC/2
Gain bandwidth product
RL = 10 kΩ, CL = 20 pF, G = 20 dB
Unity gain frequency
ɸm
Phase margin
Gm
Gain margin
SR-
Conditions
Supply current
(per amplifier)
FU
SR+
TSX920, TSX921, TSX922, TSX923
74
2.8
Tmin < Top < Tmax
RL = 10 kΩ, CL = 20 pF
Unit
mA
3.4
3.4
10
MHz
12
55
Degrees
5.9
dB
Positive slew rate
Av = 1, Vout = 0.5 to 15.5 V,
measured between 10 % to 90 %
16.2
Negative slew rate
Av = 1, Vout = 15.5 to 0.5 V,
measured between 90 % to 10 %
17.2
f = 10 kHz
16.5
f = 100 kHz
11.8
8.58
µVpp
0.0003
%
en
Equivalent input noise
voltage
∫en
Low-frequency peak-topeak input noise
Bandwidth: f = 0.1 to 10 Hz
THD+N
Total harmonic distortion
+ noise
f = 1 kHz, Av = 1, RL = 10 kΩ,
Vout = 4 Vrms
tS
Max.
Setting time
V/μs
Gain = 1, 100 mV input voltage,
0.1 % of final value
245
Gain = 1, 100 mV input voltage,
1 % of final value
178
nV√Hz
ns
Shutdown characteristics (TSX920 and TSX923 only)
ICC_shdn
Supply current in
shutdown mode
(per amplifier)
SHDN = VCC-
7
15
µΑ
Tmin < Top < Tmax
20
ton
Amplifier turn-on time
1.5
toff
Amplifier turn-off time
0.2
µs
Notes:
(1)
Typical value is based on the Vio drift observed after 1000 h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration (see Section 5.5: "Long
term input offset voltage drift").
(2)
When used in comparator mode, with high differential input voltage, during a long period of time with VCC close to 16 V and
Vicm>VCC/2, Vio can experience a permanent drift of a few mV drift. This phenomenon is notably worse at low temperatures.
10/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
4
Electrical characteristic curves
Electrical characteristic curves
Figure 2: Supply current vs.supply voltage
Figure 3: Distribution of input offset voltage
at VCC = 4.5 V
Figure 4: Distribution of input offset voltage
at VCC = 10 V
Figure 5: Distribution of input offset voltage
at VCC = 16 V
Figure 6: Input offset voltage vs. temperature
at VCC = 16 V
Figure 7: Distribution of input offset voltage drift over
temperature
DocID024310 Rev 4
11/32
Electrical characteristic curves
TSX920, TSX921, TSX922, TSX923
Figure 8: Input offset voltage vs. common-mode voltage
at VCC = 4 V
Figure 9: Input offset voltage vs. common-mode voltage
at VCC = 16 V
Figure 10: Output current vs. output voltage
at VCC = 4 V
Figure 11: Output current vs. output voltage
at VCC = 10 V
Figure 12: Output current vs. output voltage
at VCC = 16 V
Figure 13: Output rail linearity
12/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
Electrical characteristic curves
Figure 14: Open loop gain vs. frequency
Figure 15: Bode diagram vs. temperature for VCC = 4 V
Figure 16: Bode diagram vs. temperature
for VCC = 10 V
Figure 17: Bode diagram vs. temperature
for VCC = 16 V
Figure 18: Bode diagram at VCC = 16 V with low
common-mode voltage
Figure 19: Bode diagram at VCC = 16 V with high
common-mode voltage
DocID024310 Rev 4
13/32
Electrical characteristic curves
TSX920, TSX921, TSX922, TSX923
Figure 20: Bode diagram at VCC = 16 V and
RL = 10 kΩ, CL = 47 pF
Figure 21: Bode diagram at VCC = 16 V and
RL = 10 kΩ, CL = 120 pF
Figure 22: Bode diagram at VCC = 16 V and
RL = 2.2 kΩ, CL = 20 pF
Figure 23: Slew rate vs. supply voltage and temperature
Figure 24: Overshoot vs. capacitive load without
feedback capacitor
Figure 25: Closed loop gain vs. frequency with different
gain resistors
14/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
Electrical characteristic curves
Figure 26: Large step response
Figure 27: Small step response
Figure 28: Small step response with feedback
capacitor CF
Figure 29: Output impedance vs. frequency in closed
loop configuration
Figure 30: Noise vs. frequency with 16 V supply voltage
Figure 31: 0.1 to 10 Hz noise
DocID024310 Rev 4
15/32
Electrical characteristic curves
TSX920, TSX921, TSX922, TSX923
Figure 32: THD+N vs. frequency at VCC = 16 V
Figure 33: THD+N vs. output voltage at VCC = 16 V
Figure 34: Power supply rejection ratio (PSRR) vs.
frequency
Figure 35: Crosstalk vs. frequency between operators
on TSX922 at VCC = 16 V
Figure 36: Startup time after standby released
for VCC = 4 V
Figure 37: Startup time after standby released
for VCC = 16 V
16/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
Application information
5
Application information
5.1
Operating voltages
The TSX92x operational amplifiers can operate from 4 V to 16 V. The parameters are fully
specified at 4.5 V, 10 V, and 16 V power supplies. However, parameters are very stable in
the full VCC range. Additionally, main specifications are guaranteed in the extended
temperature range from -40 to 125 °C.
5.2
Rail-to-rail input
The TSX92x series is designed with two complementary PMOS and NMOS input
differential pairs. The device has a rail-to-rail input and the input common mode range is
extended from (VCC-) - 0.1 V to (VCC+) + 0.1 V. However, the performance of this device is
clearly optimized for the PMOS differential pairs (which means from (V CC-) - 0.1 V to
(VCC+) - 2 V).
Beyond (VCC+) - 2 V, the operational amplifier is still functional but with downgraded
performances (see Figure 19). Performances are still suitable for a large number of
applications requiring the rail-to-rail input feature.
The TSX92x operational amplifiers are designed to prevent phase reversal.
5.3
Input pin voltage range
The TSX92x operational amplifiers have internal ESD diode protections on the inputs.
These diodes are connected between the input and each supply rail to protect MOSFETs
inputs from electrostatic discharges.
Thus, if the input pin voltage exceeds the power supply by 0.5 V, the ESD diodes become
conductive and excessive current could flow through them. To prevent any permanent
damage, this current must be limited to 10 mA. This can be done by adding a resistor in
series with the input pin (Figure 38: "Limiting input current with a series resistor"). The
resistor value has to be calculated for a 10 mA current limitation on the input pins.
Figure 38: Limiting input current with a series resistor
DocID024310 Rev 4
17/32
Application information
5.4
TSX920, TSX921, TSX922, TSX923
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to offset value measured at 25 °C. The operational amplifier is one of the
main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effect of temperature variations.
The maximum input voltage drift over temperature is computed using Equation 1.
Equation 1
∆Vio
V T – Vio 25 °C
= max io
∆T
T – 25 °C
with T = -40 °C and 125 °C.
The datasheet maximum value is guaranteed by a measurement on a representative
sample size ensuring a Cpk (process capability index) greater than 2.
5.5
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
AFV = e
β . V S – VU
Where:
AFV is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in
Equation 3.
Equation 3
AFT = e
Ea
1
1
------ .
–
k
TU TS
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
18/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
Application information
-5
-1
k is the Boltzmann constant (8.6173 x 10 eV.K )
TU is the temperature of the die when VU is used (K)
TS is the temperature of the die under temperature stress (K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and
the temperature acceleration factor (Equation 4).
Equation 4
AF = AFT × AFV
AF is calculated using the temperature and voltage defined in the mission profile of the
product. The AF value can then be used in Equation 5 to calculate the number of months of
use equivalent to 1000 hours of reliable stress duration.
Equation 5
Months = AF × 1000 h × 12 months / 24 h × 365.25 days
To evaluate the op amp reliability, a follower stress condition is used where VCC is defined
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at
different measurement conditions (see Equation 6).
Equation 6
VCC = maxVop with Vicm = VCC 2
The long term drift parameter (ΔVio), estimating the reliability performance of the product, is
obtained using the ratio of the Vio (input offset voltage value) drift over the square root of
the calculated number of months (Equation 7).
Equation 7
∆Vio =
Vio dr ift
month s
Where Vio drift is the measured drift value in the specified test conditions after 1000 h
stress duration.
DocID024310 Rev 4
19/32
Application information
5.6
TSX920, TSX921, TSX922, TSX923
Capacitive load
Driving a large capacitive load can cause stability issues. Increasing the load capacitance
produces gain peaking in the frequency response, with overshooting and ringing in the step
response. It is usually considered that with a gain peaking higher than 2.3 dB the op-amp
might become unstable. Generally, the unity gain configuration is the worst configuration
for stability and the ability to drive large capacitive loads. Figure 39: "Stability criteria with a
serial resistor" shows the serial resistor (Riso) that must be added to the output, to make
the system stable.
Figure 39: Stability criteria with a serial resistor
Figure 40: Test configuration for Riso
20/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
5.7
Application information
High-side current sensing
TSX92x rail to rail input devices can be used to measure a small differential voltage on a
high side shunt resistor and translate it into a ground referenced output voltage. The gain is
fixed by external resistance.
Figure 41: High-side current sensing configuration
Vout can be expressed as follows:
Equation 8
Vou t = Rshun t × I 1 –
Rg2
Rg2 + Rf2
1+
Rg2 × Rf2
Rf1
Rf1
Rf1
+ Ip
– l n × Rf1 – Vio 1 +
× 1+
R
R
Rg1
Rg1
Rg1
g2 + f2
Assuming that Rf2 = Rf1 = Rf and Rg2 = Rg1 = Rg, Equation 8 can be simplified as follows:
Equation 9
Vout = Rshunt × I
Rf
Rf
– Vio 1 +
+ Rf × I io
Rg
Rg
With the TSX92x operational amplifiers, the high side current measurement must be made
by respecting the common mode voltage of the amplifier: (VCC-) - 0.1 V to (VCC+) + 0.1 V. If
the application requires a higher common voltage please refer to the TSC high side current
sensing family.
DocID024310 Rev 4
21/32
Application information
5.8
TSX920, TSX921, TSX922, TSX923
High-speed photodiode
The TSX92x series is an excellent choice for current to voltage (I-V) conversions. Due to
the CMOS technology, the input bias currents are extremely low. Moreover, the low noise
and high unity-gain bandwidth of the TSX92x operational amplifiers make them particularly
suitable for high-speed photodiode preamplifier applications.
The photodiode is considered as a capacitive current source. The input capacitance, C IN,
includes the parasitic input Common mode capacitance, CCM (3pF), and the input
differential mode capacitance, CDIFF (8pF). CIN acts in parallel with the intrinsic capacitance
of the photodiode, CD. At higher frequencies, the capacitors affect the circuit response. The
output capacitance of a current sensor has a strong effect on the stability of the op-amp
feedback loop.
CF stabilizes the gain and limits the transimpedance bandwidth. To ensure good stability
and to obtain good noise performance, CF can be set as shown in Equation 10.
Equation 10
where,
CIN = CCM + CDIFF = 11 pF
CDIFF is the differential input capacitance: 8 pF typical
CCM is the Common mode input capacitance: 3 pF typical
CD is the intrinsic capacitance of the photodiode
CSMR is the parasitic capacitance of the surface mount RF resistor: 0.2 pF typical
FGBP is the gain bandwidth product: 10 MHz at 16 V
RF fixes the gain as shown in Equation 11.
Equation 11
VOUT = RF x ID
Figure 42: High-speed photodiode
22/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
DocID024310 Rev 4
23/32
Package information
6.1
TSX920, TSX921, TSX922, TSX923
SOT23-5 package information
Figure 43: SOT23-5 package outline
Table 7: SOT23-5 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
0.90
1.20
1.45
0.035
0.047
0.057
A2
0.90
1.05
1.30
0.035
0.041
0.051
B
0.35
0.40
0.50
0.014
0.016
0.020
C
0.09
0.15
0.20
0.004
0.006
0.008
D
2.80
2.90
3.00
0.110
0.114
0.118
A
A1
24/32
Inches
0.15
0.006
D1
1.90
0.075
e
0.95
0.037
E
2.60
2.80
3.00
0.102
0.110
0.118
F
1.50
1.60
1.75
0.059
0.063
0.069
L
0.10
0.35
0.60
0.004
0.014
0.024
K
0 degrees
10 degrees
0 degrees
DocID024310 Rev 4
10 degrees
TSX920, TSX921, TSX922, TSX923
6.2
Package information
SOT23-6 package information
Figure 44: SOT23-6 package outline
Table 8: SOT23-6 mechanical data
Dimensions
Ref.
Millimeters
Min.
A
Typ.
0.90
A1
Inches
Max.
Min.
1.45
0.035
Typ.
Max.
0.057
0.10
0.004
A2
0.90
1.30
0.035
0.051
b
0.35
0.50
0.013
0.019
c
0.09
0.20
0.003
0.008
D
2.80
3.05
0.110
0.120
E
1.50
1.75
0.060
0.069
e
0.95
0.037
H
2.60
3.00
0.102
0.118
L
0.10
0.60
0.004
0.024
θ
0°
10 °
0°
10 °
DocID024310 Rev 4
25/32
Package information
6.3
TSX920, TSX921, TSX922, TSX923
MiniSO8 package information
Figure 45: MiniSO8 package outline
Table 9: MiniSO8 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.1
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.030
0.22
0.40
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.80
3.00
3.20
0.11
0.118
0.126
E
4.65
4.90
5.15
0.183
0.193
0.203
E1
2.80
3.00
3.10
0.11
0.118
0.122
0.80
0.016
e
L
0.85
0.65
0.40
0.60
0.006
0.033
0.024
0.95
0.037
L2
0.25
0.010
ccc
0°
0.037
0.026
L1
k
26/32
Inches
8°
0.10
DocID024310 Rev 4
0°
0.031
8°
0.004
TSX920, TSX921, TSX922, TSX923
6.4
Package information
SO8 package information
Figure 46: SO8 package outline
Table 10: SO8 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
1.75
0.069
A1
0.10
A2
1.25
b
0.28
0.48
0.011
0.019
c
0.17
0.23
0.007
0.010
D
4.80
4.90
5.00
0.189
0.193
0.197
E
5.80
6.00
6.20
0.228
0.236
0.244
E1
3.80
3.90
4.00
0.150
0.154
0.157
e
0.25
Max.
0.004
0.010
0.049
1.27
0.050
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
L1
k
ccc
1.04
1°
0.040
8°
0.10
DocID024310 Rev 4
1°
8°
0.004
27/32
Package information
6.5
TSX920, TSX921, TSX922, TSX923
DFN8 2x2 package information
Figure 47: DFN8 2x2 package outline
Table 11: DFN8 2x2 mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.70
0.75
0.80
0.028
0.030
0.031
A1
0.00
0.02
0.05
0.000
0.001
0.002
b
0.15
0.20
0.25
0.006
0.008
0.010
D
2.00
0.079
E
2.00
0.079
e
0.50
0.020
L
0.045
0.55
0.65
N
28/32
0.018
8
DocID024310 Rev 4
0.022
0.026
TSX920, TSX921, TSX922, TSX923
6.6
Package information
MiniSO10 package information
Figure 48: MiniSO10 package outline
Table 12: MiniSO-10 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
1.10
Max.
0.043
A1
0.05
0.10
0.15
0.002
0.004
0.006
A2
0.78
0.86
0.94
0.031
0.034
0.037
b
0.25
0.33
0.40
0.010
0.013
0.016
c
0.15
0.23
0.30
0.006
0.009
0.012
D
2.90
3.00
3.10
0.114
0.118
0.122
E
4.75
4.90
5.05
0.187
0.193
0.199
E1
2.90
3.00
3.10
0.114
0.118
0.122
e
L
0.50
0.40
L1
k
aaa
0.55
0.020
0.70
0.016
6°
0°
0.95
0°
3°
0.022
0.028
0.037
0.10
DocID024310 Rev 4
3°
6°
0.004
29/32
Ordering information
7
TSX920, TSX921, TSX922, TSX923
Ordering information
Table 13: Order codes
Order code
Temperature range
TSX920ILT
(1)
SΟΤ23-5
(1)
SO8
TSX922IDT
TSX922IYDT
Packing
SOT23-6
TSX921ILT
TSX921IYLT
Package
-40 °C to 125 °C
TSX922IST
TSX922IQ2T
MiniSO8
Marking
K304
K305
TSX922I
Tape and reel
SX922IY
K305
DFN8 2x2
K26
TSX922IYST
(1)
MiniSO8 (automotive grade)
K312
TSX922IYDT
(1)
SO8 (automotive grade)
SX922IY
MiniSO10
K305
TSX923IST
Notes:
(1)
Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to
AEC Q001 & Q 002 or equivalent.
30/32
DocID024310 Rev 4
TSX920, TSX921, TSX922, TSX923
8
Revision history
Revision history
Table 14: Document revision history
Date
Revision
12-Apr-2013
1
Initial release
2
Added TSX920,TSX922, TSX923 devices.
Added packages for TSX920,TSX922, and TSX923.
Added shutdown characteristics in Table 4, Table 5, and Table 6.
Added Figure 35, Figure 36, and Figure 37.
Updated Table 13 for new order codes.
3
Added long-term input offset voltage drift parameter in Table 4, Table 5,
and Table 6.
Added Section 5.4: Input offset voltage drift over temperature in
Section 5: Application information.
Added Section 5.5: Long-term input offset voltage drift section in
Section 5: Application information.
27-Jun-2013
10-Dec-2013
14-Jan-2016
4
Changes
Updated document layout
Table 4, Table 5, and Table 6: updated Vio and DVio/DT parameters
Table 7: updated inches dimension "B" (typ) and "L" (typ and max) to
align with rounded-off values of POA.
Table 10: updated minimum mm dimensions for "k"
Table 13: "Order codes": added order codes TSX922IYST and
TSX922IYDT.
DocID024310 Rev 4
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TSX920, TSX921, TSX922, TSX923
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
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DocID024310 Rev 4
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