RHR61, RHR64 Rad-hard, low-power, rail-to-rail CMOS operational amplifiers Datasheet - production data Ceramic Flat-8 RHR61 1 Features 8 NC NC -IN - VCC+ +IN + OUT VCC- NC 4 Single and quad CMOS operational amplifiers (op amp) Unity gain stable on 100 pF load Very low power supply: 1.5 V to 5.5 V Very low consumption: 60 µA max Low offset voltage: 1 mV max Low input bias: 1 pA Input and output rail-to-rail 100 krad TID (high-dose rate) SEL immune at 120 MeV.cm²/mg SET characterized Description 5 The upper metallic lid is electrically connected to pin 5 (NC) only. Ceramic Flat-14 RHR64 The RHR61 and RHR64 devices are pure CMOS single and quad op amps respectively. The RHR61 is packaged in a flat hermetic 8-lead and the RHR64 in a flat hermetic 14-lead. Both devices are guaranteed in radiation and over the temperature range -55 °C to 125 °C. They are for general use in any space application. Table 1: Device summary Parameter RHR61K1 RHR64K1 SMD (1) — — Quality level 14 OUT4 _ 13 -IN4 + 12 +IN4 Engineering model OUT1 1 -IN1 2 _ +IN1 3 + VCC+ 4 11 VCC- +IN2 5 + + 10 +IN3 -IN2 6 _ _ 9 -IN3 Notes: OUT2 7 8 OUT3 (1)SMD: standard microcircuit drawing (2)EPPL = ESA preferred part list Flat-8, 0.50 g Package, mass EPPL (2) Temp. range Flat-14, 0.70 g — — -55 °C to 125 °C The upper metallic lid is electrically connected to pin 11 (VCC-) only. May 2016 DocID027171 Rev 1 This is information on a product in full production. 1/19 www.st.com Contents RHR61, RHR64 Contents 1 Absolute maximum ratings and operating conditions ................. 3 2 Electrical characteristics ................................................................ 4 3 4 Electrical characteristic curves ...................................................... 8 Radiations ...................................................................................... 12 5 Package information ..................................................................... 13 5.1 Ceramic Flat-8 package information ............................................... 14 5.2 Ceramic Flat-14 package information ............................................. 15 6 Ordering information..................................................................... 16 7 Shipping information .................................................................... 17 8 Revision history ............................................................................ 18 2/19 DocID027171 Rev 1 RHR61, RHR64 1 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Table 2: Absolute maximum ratings Symbol Parameter VCC Supply voltage (1) Vid Differential input voltage (2) Vin Input voltage (3) Tstg Storage temperature Value 6 ±VCC V (VCC-) - 0.2 to (VCC+) + 0.2 -65 to 150 Tj Maximum junction temperature Thermal resistance junction-toambient (4)(5) Ceramic Flat-8 125 Rthja Ceramic Flat-14 120 Thermal resistance junction-tocase (4)(5) Ceramic Flat-8 40 Ceramic Flat-14 20 Rthjc Unit HBM: human body model MM: machine model °C 150 °C/W (6) 4 (7) kV 300 ESD CDM: charged device model (8) RHR61 700 RHR64 1300 Latch-up immunity V 200 mA Notes: (1)All voltage values, except differential voltage are measured with respect to network ground terminal (2)Differential (3)V CC - Vin must not exceed 6 V (4)Short (5)R th voltages are the non-inverting input terminal with respect to the inverting input terminal circuits can cause excessive heating and destructive dissipation are typical values (6)Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. (7)Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. (8)Charged device model: all pins and package are charged together to the specified voltage and then discharged directly to ground through only one pin. This is done for all pins. Table 3: Operating conditions Symbol Parameter VCC Supply voltage Vicm Common-mode input voltage Tamb Operating free-air temperature range Value 1.5 to 5.5 DocID027171 Rev 1 (VCC-) - 0.1 to (VCC+) + 0.1 -55 to 125 Unit V °C 3/19 Electrical characteristics 2 RHR61, RHR64 Electrical characteristics Table 4: VCC+ = 1.8 V, VCC- = 0 V, Vicm = 0.9 V, Tamb = 25 °C, and load (RL) connected to 0.9 V (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio DVio Offset voltage 1 -55 °C < Tamb < 125 °C 3 μV/°C Input offset voltage drift 4 Iio Input offset current (Vout = 0.9 V) 1 70 1 150 Iib Input bias current (Vout = 0.9 V) 1 70 1 150 CMR Common mode rejection ratio 20 log (ΔVic/ΔVio) Avd Large signal voltage gain VOH High-level output voltage VOL Low-level output voltage Isink Iout Isource ICC Supply current (per channel) -55 °C < Tamb < 125 °C -55 °C < Tamb < 125 °C 0 V to 0.9 V, Vout = 0.9 V 70 -55 °C < Tamb < 125 °C 67 0 V to 1.8 V, Vout = 0.9 V 56 -55 °C < Tamb < 125 °C 53 RL = 10 kΩ, Vout = 0.5 V to 1.3 V 83 -55 °C < Tamb < 125 °C 78 RL = 10 kΩ 35 -55 °C < Tamb < 125 °C 50 RL = 10 kΩ mV pA 74 dB 95 5 4 -55 °C < Tamb < 125 °C 35 mV 50 Vο = 1.8 V 6 -55 °C < Tamb < 125 °C 4 Vο = 0 V 6 -55 °C < Tamb < 125 °C 4 No load, Vout = 0.9 V 12 mA 10 50 -55 °C < Tamb < 125 °C 60 62 µA AC performance GBP Gain bandwidth product RL = 2 kΩ, CL = 100 pF 600 -55 °C < Tamb < 125 °C 300 740 kHz ɸm Phase margin RL = 2 kΩ, CL = 100 pF 48 Degrees Gm Gain margin RL = 2 kΩ, CL = 100 pF 11 dB Slew rate VIN = 0.5 V to VCC -0.5V, 10 % to 90 %, RL = 2 kΩ, CL = 100 pF, Av = 1 0.2 -55 °C < Tamb < 125 °C 0.15 SR en 4/19 Equivalent input noise voltage 0.27 f = 1 kHz 65 f = 10 kHz 50 DocID027171 Rev 1 V/μs nV/√Hz RHR61, RHR64 Electrical characteristics Table 5: VCC+ = 3.3 V, VCC- = 0 V, Vicm = 1.65 V, Tamb = 25 °C, and load (RL) connected to 1.65 V (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio DVio Iio Iib CMR Avd VOH VOL Offset voltage -55 °C < Tamb < 125 °C 3 Input offset voltage drift Input offset current Input bias current Common mode rejection ratio 20 log (ΔVic/ΔVio) Large signal voltage gain High-level output voltage Low-level output voltage Isink Iout Isource ICC 1 Supply current (per channel) μV/°C 4 -55 °C < Tamb < 125 °C -55 °C < Tamb < 125 °C 0 V to 1.65 V, Vout = 1.65 V 75 -55 °C < Tamb < 125 °C 72 0 V to 3.3 V, Vout = 1.65 V 60 -55 °C < Tamb < 125 °C 56 RL = 10 kΩ, Vout = 0.5 V to 2.8 V 87 -55 °C < Tamb < 125 °C 82 RL = 10 kΩ 35 -55 °C < Tamb < 125 °C 50 RL = 10 kΩ mV 1 70 1 150 1 70 1 150 pA 79 dB 98 6 7 -55 °C < Tamb < 125 °C 35 mV 50 Vο = 3.3 V 30 -55 °C < Tamb < 125 °C 25 Vο = 0 V 30 -55 °C < Tamb < 125 °C 25 No load, Vout = 1.75 V 45 mA 45 55 -55 °C < Tamb < 125 °C 64 66 µA AC performance GBP Gain bandwidth product RL = 2 kΩ, CL = 100 pF 610 -55 °C < Tamb < 125 °C 310 820 kHz ɸm Phase margin RL = 2 kΩ, CL = 100 pF 50 Degrees Gm Gain margin RL = 2 kΩ, CL = 100 pF 11 dB Slew rate VIN = 0.5 V to VCC -0.5V, 10 % to 90 %, RL = 2 kΩ, CL = 100 pF, Av = 1 0.22 -55 °C < Tamb < 125 °C 0.17 SR en Equivalent input noise voltage 0.29 f = 1 kHz 65 f = 10 kHz 50 DocID027171 Rev 1 V/μs nV/√Hz 5/19 Electrical characteristics RHR61, RHR64 Table 6: VCC+ = 5 V, VCC- = 0 V, Vicm = 2.5 V, Tamb = 25 °C, and RL connected to 2.5 V (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio DVio Offset voltage Input offset current (Vout = 2.5 V) Iib Input bias current (Vout = 2.5 V) SVR Common mode rejection ratio 20 log (ΔVic/ΔVio) Supply voltage rejection ratio 20 log (ΔVCC/ΔVio) Avd Large signal voltage gain VOH High-level output voltage VOL Low-level output voltage Isink Iout Isource ICC -55 °C < Tamb < 125 °C 3 Input offset voltage drift Iio CMR 1 Supply current (per channel) μV/°C 4 -55 °C < Tamb < 125 °C -55 °C < Tamb < 125 °C 0 V to 2.5 V, Vout = 2.5 V 77 -55 °C < Tamb < 125 °C 74 0 V to 5.0 V, Vout = 2.5 V 63 -55 °C < Tamb < 125 °C 58 VCC = 1.8 to 5 V 75 -55 °C < Tamb < 125 °C 70 RL = 10 kΩ, Vout = 0.5 V to 4.5 V 88 -55 °C < Tamb < 125 °C 83 RL = 10 kΩ 35 -55 °C < Tamb < 125 °C 50 RL = 10 kΩ mV 1 70 1 150 1 70 1 150 pA 83 dB 102 98 7 6 -55 °C < Tamb < 125 °C 35 mV 50 Vο = 5 V 40 -55 °C < Tamb < 125 °C 35 Vο = 0 V 40 Tmin < Tamb < Tmax 35 No load, Vout = 2.5 V 69 mA 69 59 -55 °C < Tamb < 125 °C 69 72 µA AC performance GBP Gain bandwidth product RL= 2 kΩ, CL= 100 pF 630 -55 °C < Tamb < 125 °C 330 920 kHz ɸm Phase margin RL = 2 kΩ, CL = 100 pF 50 Degrees Gm Gain margin RL = 2 kΩ, CL = 100 pF 12 dB Slew rate VIN = 0.5 V to VCC -0.5V, 10 % to 90 %, RL = 2 kΩ, CL = 100 pF, Av = 1 0.25 -55 °C < Tamb < 125 °C 0.20 SR en 6/19 Equivalent input noise voltage 0.34 f = 1 kHz 65 f = 10 kHz 50 DocID027171 Rev 1 V/μs nV/√Hz RHR61, RHR64 Symbol THD+en Electrical characteristics Parameter Total harmonic distortion Conditions Min. G = 1, f = 1 kHz, RL = 100 kΩ, Vout = 2 Vpp Typ. Max. Unit 0.002 % Table 7: Electrical characteristics after 100 krad, VCC+ = 1.8 V, VCC- = 0 V, Vicm = 0.9 V, Tamb = 25 °C, and load (RL) connected to VCC/2 (unless otherwise specified). Min. and max. values obtained on a sample size of 10 parts from 2 different lots (2x5). Non listed parameters are not impacted by the dose. Symbol Parameter Conditions Min. Typ. Output voltage Vio CMR (1) Common mode rejection ratio 20 log (ΔVic/ΔVio) Large signal voltage gain Avd Isource ICC 0 V to 1.8 V, Vout = 0.9 V 51 RL = 10 kΩ, Vout = 0.5 V to 1.3 V 81 VO = 0 V 1.5 Output source current Supply current (per channel) Max. Unit 1.7 mV dB — mA No load, Vout = 0.9 V 84 µA Notes: (1)The CMR from 0 V to VCC/2 has not been characterized in radiation Table 8: Electrical characteristics after 100 krad, VCC+ = 5 V, VCC- = 0 V, Vicm = 2.5 V, Tamb = 25 °C, and load (RL) connected to VCC/2 (unless otherwise specified). Min. and max. values obtained on a sample size of 10 parts from 2 different lots (2x5). Non listed parameters are not impacted by the dose. Symbol Parameter Conditions Min. Typ. Output voltage Vio CMR (1) Common mode rejection ratio 20 log (ΔVic/ΔVio) 0 V to 5 V, Vout = 2.5 V 62 SVR Supply voltage rejection ratio 20 log (ΔVCC/ΔVio) VCC = 1.8 V to 5 V 71 RL = 10 kΩ, Vout = 0.5 V to 4.5 V 87 Large signal voltage gain Isink Output sink current VO = 5 V 35 Output source current VO = 0 V 32 ICC Supply current (per channel) Unit 1.5 mV dB — Avd Isource Max. mA No load, Vout = 2.5 V 106 µA Notes: (1)The CMR from 0 V to VCC/2 has not been characterized in radiation DocID027171 Rev 1 7/19 Electrical characteristic curves 3 RHR61, RHR64 Electrical characteristic curves Figure 2: Input offset voltage vs input common-mode voltage at VCC = 1.5 V Figure 1: Supply current vs supply voltage 400 40 Vicm=Vcc/2 T=125°C 30 Input Offset Voltage (µV) Supp ly Curren t (µA) 35 T=25°C 25 T=-55°C T=-40°C 20 15 10 0 -200 -400 T=125°C -800 0 0 1 2 3 4 5 Supply Voltage (V) Figure 3: Input offset voltage vs input common-mode voltage at VCC = 5 V 0.0 T=-55°C 0.2 0.4 0.6 0.8 1.0 1.2 Input Common Mode Voltage (V) 1.6 0 Input Offset Voltage (µV) Vcc=5V 200 T=125°C 0 T=25°C T=-40°C T=-55°C -200 -400 1.4 -25 -50 -75 -100 -125 -150 -175 T=-55°C T=-40°C T=25°C T=125°C Vcc=1.5V Rl=2kΩ -200 -225 0 1 2 3 4 Input Common Mode Voltage (V) 5 -250 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 Output Voltage (V) Figure 5: Input offset voltage vs output voltage at VCC = 5 V 125 100 75 50 25 0 -25 -50 -75 -100 -125 -150 -175 -200 -225 0.5 Figure 6: VOH vs supply voltage 45 Output swing from Vcc+ (mV) Input Offset Voltage (µV) T=-40°C Figure 4: Input offset voltage vs output voltage at VCC = 1.5 V 400 8/19 T=25°C -600 5 Input Offset Voltage (µV) Vcc=1.5V 200 T=-55°C T=-40°C T=25°C T=125°C Vcc=5V Rl=2k Ω 1.0 1.5 2.0 2.5 3.0 Output Voltage (V) 3.5 4.0 40 35 30 25 20 15 T=-55°C T=-40°C T=125°C Rl=2kΩ 5 4.5 T=25°C 10 0 1.5 DocID027171 Rev 1 2.0 2.5 3.0 3.5 4.0 Vcc (V) 4.5 5.0 5.5 RHR61, RHR64 Electrical characteristic curves Figure 8: Output current vs output voltage at VCC = 5 V Figure 7: VOL vs supply voltage 100 80 35 Sink Vid=-1V 60 Output Current (mA) Output swing from Vcc- (mV) 40 30 25 20 15 10 T=-55°C T=25°C T=-40°C 40 0 -40 T=125°C -60 2.5 3.0 3.5 4.0 Vcc (V) 4.5 5.0 -100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Output Voltage (V) 5.5 Figure 10: Bode diagram at VCC = 5 V Figure 9: Bode diagram at VCC = 1.5 V 60 60 0 Phase 40 Source Vid=1V -80 Rl=2kΩ 2.0 T=125°C T=25°C T=-40°C T=-55°C -20 5 0 1.5 Vcc=5V 20 T=-55°C T=-40°C T=25°C T=125°C 0 -30 Phase 40 -60 T=-55°C T=-40°C T=25°C T=125°C -60 0 -180 Vcc=1.5V Vicm=0.75V Rl=2kΩ Cl=100pF Gain=100 -20 -240 0 -180 Vcc=5V Vicm=2.5V Rl=2kΩ Cl=100pF Gain=100 -20 -270 -300 10k -120 Gain -210 -40 1k 20 100k -240 -40 -300 1k 1M 10k 100k 1M Frequency(Hz) Frequency(Hz) Figure 11: Slew rate vs supply voltage Figure 12: Negative slew rate vs supply voltage 0.5 3 0.4 T=-55°C 2 0.3 T=-40°C T=25°C T=125°C 0.2 1 0.1 0.0 T=125°C T=25°C T=-40°C T=-55°C Vicm=Vcc/2 Vload=Vcc/2 Rl=2kΩ Cl=100pF -0.1 -0.2 -0.3 Voltage (V) Slew rate (V/µs) Phase (°) -150 Gain (dB) Gain (dB) -120 Gain Phase (°) -90 20 Vcc=5V Vicm=Vcc/2 Rl=2kΩ Cl=100pF 0 -1 -2 -0.4 -0.5 1.5 -3 2.0 2.5 3.0 3.5 4.0 Supply Voltage (V) 4.5 5.0 5.5 DocID027171 Rev 1 0 5 10 15 Time (µs) 9/19 Electrical characteristic curves RHR61, RHR64 Figure 14: Phase margin vs output current at VCC = 1.5 V Figure 13: Positive slew rate vs supply voltage 100 3 90 Output Voltage (V) 2 80 70 1 60 50 0 T=125°C T=25°C T=-40°C T=-55°C -1 -2 40 30 Vcc=5V Vicm=Vcc/2 Rl=2kΩ Cl=100pF 20 10 -3 0 10 20 0 -1.0 30 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 Time (µs) Figure 16: Noise vs frequency 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 -1.0 Equivalent Input Noise Voltage (nV/VHz) Figure 15: Phase margin vs output current at VCC = 5 V -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1000 Vicm=2.5V 100 Vicm=4.5V 10 10 1.0 Figure 17: Small step Vcc=5V T=25°C 100 1000 Frequency (Hz) 10000 100000 Figure 18: Power supply rejection ratio vs frequency 100 0.20 + PSRR PSRR (dB) Output Voltage (V) 80 0.10 Vcc=5V Vicm=2.5V Rl=2k Ω Cl=100pF T=25°C 0.00 -0.10 -0.20 -1 10/19 60 40 20 0 1 2 Time (µs) 3 4 5 0 10 DocID027171 Rev 1 - PSRR Vcc=5V Vicm=2.5V Gain=1 Rl=2kΩ Cl=100pF Vosc=100mVPP T=25°C 100 1k Frequency (Hz) 10k 100k RHR61, RHR64 Electrical characteristic curves Figure 19: Total harmonic distortion and noise vs frequency and Rload Figure 20: Total harmonic distortion and noise vs frequency and input voltage 0.1 1 Vicm=Vcc/2 Gain=1 Vin=1Vpp BW=80kHz T=25°C Vcc=1.5V Rl=2kΩ Vin=200mVpp Vin=50mVpp Vcc=5.5V Rl=2kΩ THD + N (%) THD + N (%) 1 Vcc=1.5V Rl=10kΩ 0.01 0.1 Vin=3Vpp 0.01 Vicm=Vcc/2 Gain=1 Vin=1Vpp BW=80kHz Rl=2kΩ T=25°C Vcc=5.5V Rl=10kΩ 1E-3 1E-3 100 1000 Frequency (Hz) 100 10000 1 1 0.1 0.1 Vicm=Vcc/2 0.01 Gain=1 f=1kHz BW=22kHz Rl=2kΩ T=25°C 1E-3 0.01 3.3V 5V 5V 0.1 1 Output Voltage (Vpp) 5.5V 10 1.8V 3.3V 0.01 1.8V 10000 Figure 22: Total harmonic distortion and noise vs output voltage at Rload = 100 kΩ THD + N (%) THD + N (%) Figure 21: Total harmonic distortion and noise vs output voltage at Rload = 2 kΩ 1000 Frequency (Hz) 1E-3 0.01 DocID027171 Rev 1 Vicm=Vcc/2 Gain=1 f=1kHz BW=22kHz Rl=100kΩ T=25°C 5.5V 0.1 1 Output Voltage (Vpp) 10 11/19 Radiations 4 RHR61, RHR64 Radiations Total ionizing dose (MIL-STD-883 TM 1019) The products guaranteed by radiation within the RHA QML-V system, fully comply with the MIL-STD-883 TM 1019 specification. The RHR61 and RHR64 are RHA QML-V tested and characterized in full compliance with the MIL-STD-883 specification, condition B (between 10 and 100 mrad/s). All parameters provided in Table 4, Table 5, and Table 6 apply to pre-irradiation, Table 7 and Table 8 apply to post-irradiation as follows: All tests are performed in accordance with MIL-PRF-38535 and the test method 1019 of the MIL-STD-883 for total ionizing dose (TID). The initial characterization is performed in qualification only on both biased and unbiased parts. Each wafer lot is tested in the worst bias case condition, based on the results obtained during the initial qualification. Heavy ions The behavior of the product when submitted to heavy ions is not tested in production. Heavy ion trials are performed on qualification lots only. Table 9: Radiations Type Characteristics Value Unit TID Low-dose rate (36 to 360 rad/h) up to: 100 krad SEL immunity up to: (with a particle angle of 60 ° at 125 °C) 120 SEL immunity up to: (with a particle angle of 0 ° at 125 °C) 60 SET immunity (at 25 °C) Characterized Heavy ions 12/19 DocID027171 Rev 1 MeV.cm²/mg RHR61, RHR64 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID027171 Rev 1 13/19 Package information 5.1 RHR61, RHR64 Ceramic Flat-8 package information Figure 23: Ceramic Flat-8 package outline Pin n° 1 identification The upper metallic lid is electrically connected to pin 5 only. No other pin is electrically connected to the metallic lid nor to the IC die inside the package. Table 10: Ceramic Flat-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. Max. Min. Typ. Max. A 2.24 2.44 2.64 0.088 0.096 0.104 b 0.38 0.43 0.48 0.015 0.017 0.019 c 0.10 0.13 0.16 0.004 0.005 0.006 D 6.35 6.48 6.61 0.250 0.255 0.260 E 6.35 6.48 6.61 0.250 0.255 0.260 E2 4.32 4.45 4.58 0.170 0.175 0.180 E3 0.88 1.01 1.14 0.035 0.040 0.045 e 1.27 L 6.51 Q 0.66 S1 0.92 N 14/19 Inches 0.050 7.38 0.256 0.79 0.92 0.026 0.031 0.036 1.12 1.32 0.036 0.044 0.052 08 DocID027171 Rev 1 0.291 08 RHR61, RHR64 5.2 Package information Ceramic Flat-14 package information Figure 24: Ceramic Flat-14 package outline b e c L E3 8 14 E E2 7 1 E3 L Q S1 A D The upper metallic lid is electrically connected to pin 11 (VCC-) only. Table 11: Ceramic Flat-14 package mechanical data Dimensions Ref. Millimeters Min. Typ. Inches Max. Min. Typ. Max. A 2.31 2.72 0.091 0.107 b 0.38 0.48 0.015 0.019 c 0.10 0.18 0.004 0.007 D 9.27 9.73 0.365 0.383 E 6.19 6.50 0.244 0.256 E2 E3 3.68 0.145 0.76 e 0.030 1.27 0.050 L 6.86 7.62 0.250 0.300 Q 0.66 1.14 0.026 0.045 S1 0.13 0.005 DocID027171 Rev 1 15/19 Ordering information 6 RHR61, RHR64 Ordering information Table 12: Ordering information Order code Description Temperature range RHR61K1 Engineering model -55 °C to 125 °C RHR64K1 Package Marking (1) Ceramic Flat-8 RHR61K1 Ceramic Flat-14 RHR64K1 Notes: (1)Specific marking only. Complete marking includes the following: - ST logo - Date code (date the package was sealed) in YYWWA (year, week, and lot index of week) - Country of origin (FR = France). 16/19 DocID027171 Rev 1 Packing Strip pack RHR61, RHR64 7 Shipping information Shipping information Date code The date code is structured as shown below: EM xyywwz where: x (EM only) = 3 and the assembly location is Rennes, France yy = last two digits of the year ww = week digits z = lot index in the week DocID027171 Rev 1 17/19 Revision history 8 RHR61, RHR64 Revision history Table 13: Document revision history 18/19 Date Revision 11-May-2016 1 Changes Initial release DocID027171 Rev 1 RHR61, RHR64 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID027171 Rev 1 19/19